Re: [PATCH] perf kvm/riscv: Fix event key collision between interrupts and exceptions

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Using the compiler predefined macro `__riscv_xlen` in a static array initializer causes build failures on non-RISC-V architectures and breaks cross-architecture analysis.
--

commit e5247b904831a2084b1e8757d98d388a7fc008c0
Author: Fangyu Yu <fangyu.yu@linux.alibaba.com>

perf kvm/riscv: Fix event key collision between interrupts and exceptions

This commit updates the RISC-V KVM stat exit-reason decoding to use the
full scause value, avoiding key collisions between interrupts and exceptions.
It splits the TRAP macro into TRAP_EXC and TRAP_IRQ to encode interrupts
with the architecture-specific IRQ bit matching the hardware value.

> diff --git a/tools/perf/util/kvm-stat-arch/kvm-stat-riscv.c b/tools/perf/util/kvm-stat-arch/kvm-stat-riscv.c
> index 967bba261a475..829096a41a3b2 100644
> --- a/tools/perf/util/kvm-stat-arch/kvm-stat-riscv.c
> +++ b/tools/perf/util/kvm-stat-arch/kvm-stat-riscv.c
> @@ -23,10 +23,8 @@ static const char * const __kvm_events_tp[] = {
>  static void event_get_key(struct perf_sample *sample,
>  			  struct event_key *key)
>  {
> -	int xlen = 64; // TODO: 32-bit support.
> -
>  	key->info = 0;
> -	key->key = perf_sample__intval(sample, kvm_exit_reason(EM_RISCV)) & ~CAUSE_IRQ_FLAG(xlen);
> +	key->key = perf_sample__intval(sample, kvm_exit_reason(EM_RISCV));

[Severity: Medium]
Does this code introduce a regression by preventing dynamic cross-architecture
bitness decoding when analyzing traces? With the dynamic mask removed here,
the lookup now depends entirely on the statically sized table.

[ ... ]

> diff --git a/tools/perf/util/kvm-stat-arch/riscv_trap_types.h b/tools/perf/util/kvm-stat-arch/riscv_trap_types.h
> index aa5d24fab4ee3..da1f1ce55326c 100644
> --- a/tools/perf/util/kvm-stat-arch/riscv_trap_types.h
> +++ b/tools/perf/util/kvm-stat-arch/riscv_trap_types.h
> @@ -38,20 +38,21 @@
>  #define EXC_VIRTUAL_INST_FAULT 22
>  #define EXC_STORE_GUEST_PAGE_FAULT 23
>  
> -#define TRAP(x) { x, #x }
> +#define TRAP_EXC(x) { x, #x }
> +#define TRAP_IRQ(x) { (x) | CAUSE_IRQ_FLAG(__riscv_xlen), #x }

[Severity: Medium]
Does using the compiler predefined macro __riscv_xlen in this static array
initializer cause a regression by breaking the build on non-RISC-V
architectures?

When building perf cross-platform, this macro is not defined on hosts like
x86_64 or ARM64, and the static initialization in riscv_exit_reasons expands
this macro.

Also, does baking the host's compile-time word size into TRAP_IRQ introduce a
regression for cross-platform analysis? For example, if a 64-bit perf binary
processes a 32-bit KVM trace, it will expect bit 63 to be set for interrupts,
which would fail to decode 32-bit KVM events using bit 31.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260704023608.24971-1-fangyu.yu@linux.alibaba.com?part=1