From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Alistair Francis" <alistair@alistair23.me>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v2 2/8] hw/arm/aspeed: Use Aspeed2700SCUState for AST2700 users
Date: Tue, 7 Jul 2026 06:09:23 +0000 [thread overview]
Message-ID: <20260707060919.350637-3-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260707060919.350637-1-jamin_lin@aspeedtech.com>
Now that Aspeed2700SCUState has been introduced, update the AST1700 and
AST27x0 SoCs to instantiate the AST2700-specific SCU subclass instead of
the generic AspeedSCUState.
Also update the AST27x0 FC board to link the SSP/TSP coprocessors to the
AST2700 SCU instance.
This prepares the AST2700 platform for subsequent patches that move
AST2700-specific SCU functionality into the subclass.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
include/hw/arm/aspeed_ast1700.h | 2 +-
include/hw/arm/aspeed_soc.h | 1 +
hw/arm/aspeed_ast27x0-fc.c | 4 ++--
hw/arm/aspeed_ast27x0.c | 16 ++++++++--------
4 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/include/hw/arm/aspeed_ast1700.h b/include/hw/arm/aspeed_ast1700.h
index f7bd4e8650..39c5977cf1 100644
--- a/include/hw/arm/aspeed_ast1700.h
+++ b/include/hw/arm/aspeed_ast1700.h
@@ -41,7 +41,7 @@ struct AspeedAST1700SoCState {
MemoryRegion sram;
AspeedSMCState spi;
AspeedADCState adc;
- AspeedSCUState scu;
+ Aspeed2700SCUState scu;
AspeedGPIOState gpio;
AspeedSGPIOState sgpiom[AST1700_SGPIO_NUM];
AspeedI2CState i2c;
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 41dc04e293..cd68c7f1ca 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -151,6 +151,7 @@ struct Aspeed27x0SoCState {
AspeedINTCState intcioexp[ASPEED_IOEXP_NUM];
GICv3State gic;
MemoryRegion dram_empty;
+ Aspeed2700SCUState scu;
};
#define TYPE_ASPEED27X0_SOC "aspeed27x0-soc"
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index 7d9fade68d..8d49bb95d6 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -158,7 +158,7 @@ static bool ast2700fc_ssp_init(MachineState *machine, Error **errp)
object_property_set_link(OBJECT(&s->ssp), "sram",
OBJECT(&psp->sram), &error_abort);
object_property_set_link(OBJECT(&s->ssp), "scu",
- OBJECT(&psp->scu), &error_abort);
+ OBJECT(&s->ca35.scu), &error_abort);
if (!qdev_realize(DEVICE(&s->ssp), NULL, errp)) {
return false;
}
@@ -190,7 +190,7 @@ static bool ast2700fc_tsp_init(MachineState *machine, Error **errp)
object_property_set_link(OBJECT(&s->tsp), "sram",
OBJECT(&psp->sram), &error_abort);
object_property_set_link(OBJECT(&s->tsp), "scu",
- OBJECT(&psp->scu), &error_abort);
+ OBJECT(&s->ca35.scu), &error_abort);
if (!qdev_realize(DEVICE(&s->tsp), NULL, errp)) {
return false;
}
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index dddd7d2106..dd6dd0377c 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -435,12 +435,12 @@ static void aspeed_soc_ast2700_init(Object *obj)
object_initialize_child(obj, "gic", &a->gic, gicv3_class_name());
- object_initialize_child(obj, "scu", &s->scu, TYPE_ASPEED_2700_SCU);
- qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev",
+ object_initialize_child(obj, "scu", &a->scu, TYPE_ASPEED_2700_SCU);
+ qdev_prop_set_uint32(DEVICE(&a->scu), "silicon-rev",
sc->silicon_rev);
- object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu),
+ object_property_add_alias(obj, "hw-strap1", OBJECT(&a->scu),
"hw-strap1");
- object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu),
+ object_property_add_alias(obj, "hw-prot-key", OBJECT(&a->scu),
"hw-prot-key");
object_initialize_child(obj, "scuio", &s->scuio, TYPE_ASPEED_2700_SCUIO);
@@ -808,10 +808,10 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
sc->memmap[ASPEED_DEV_VBOOTROM], &s->vbootrom);
/* SCU */
- if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&a->scu), errp)) {
return;
}
- aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scu), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->scu), 0,
sc->memmap[ASPEED_DEV_SCU]);
/* SCU1 */
@@ -929,7 +929,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]);
hwaddr wdt_offset = sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize;
- object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu),
+ object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&a->scu),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) {
return;
@@ -1032,7 +1032,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
aspeed_soc_ast2700_get_irq(s, ASPEED_DEV_EMMC));
/* Timer */
- object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu),
+ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&a->scu),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), errp)) {
return;
--
2.43.0
next prev parent reply other threads:[~2026-07-07 6:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 6:09 [PATCH v2 0/8] Refactor AST2700 SCU preparation for coprocessors Jamin Lin
2026-07-07 6:09 ` [PATCH v2 1/8] hw/misc/aspeed_scu: Introduce Aspeed2700SCUState Jamin Lin
2026-07-07 9:27 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` Jamin Lin [this message]
2026-07-07 9:28 ` [PATCH v2 2/8] hw/arm/aspeed: Use Aspeed2700SCUState for AST2700 users Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 3/8] hw/arm/aspeed_ast27x0: Move SCU link into AST27x0 coprocessors Jamin Lin
2026-07-07 6:09 ` [PATCH v2 4/8] hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO Jamin Lin
2026-07-07 9:22 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 5/8] hw/arm/aspeed_ast27x0: Pass realized PSP SoC to SSP/TSP initialization Jamin Lin
2026-07-07 9:27 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 6/8] hw/arm/ast27x0: Share single SCUIO instance across PSP, SSP, and TSP Jamin Lin
2026-07-07 9:24 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 7/8] hw/arm/ast27x0: Share FMC controller with SSP " Jamin Lin
2026-07-07 9:26 ` Philippe Mathieu-Daudé
2026-07-07 6:09 ` [PATCH v2 8/8] hw/ssi/aspeed_smc: Add Data FIFO-based flash access support for AST2700 Jamin Lin
2026-07-08 22:59 ` [PATCH v2 0/8] Refactor AST2700 SCU preparation for coprocessors Philippe Mathieu-Daudé
2026-07-09 22:53 ` Philippe Mathieu-Daudé
2026-07-09 23:12 ` Philippe Mathieu-Daudé
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