* [PATCH v2 0/5] riscv: dts: spacemit: serial/i2c/ethernet improvements for the K3 Pico-ITX board
@ 2026-06-23 20:43 ` Aurelien Jarno
0 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Yixun Lan
Cc: Aurelien Jarno, open list:RISC-V ARCHITECTURE:Keyword:riscv,
open list:RISC-V SPACEMIT SoC Support:Keyword:spacemit
This patch series tries to improve the K3 Pico-ITX board DTS by configuring the
default baud rate for the serial port, enabling the 24c02 eeprom on i2c2,
adding aliases for i2c2 and i2c8 ports, and enabling power saving features on
the RTL8211F PHY.
Changes in v2:
- Collect Reviewed-by tag
- Fix issues reported by Sashiko AI in patch 2
- Link to v1: https://lore.kernel.org/linux-riscv/20260620062238.3199108-1-aurelien@aurel32.net
Aurelien Jarno (5):
riscv: dts: spacemit: set console baud rate on K3 Pico-ITX board
riscv: dts: spacemit: enable the i2c2 adapter on K3 Pico-ITX board
riscv: dts: spacemit: add 24c02 eeprom on K3 Pico-ITX board
riscv: dts: spacemit: add i2c aliases on K3 Pico-ITX board
riscv: dts: spacemit: improve RTL8211F PHY configuration on K3
Pico-ITX board
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 42 +++++++++++++++++++-
arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 11 +++++
2 files changed, 52 insertions(+), 1 deletion(-)
--
2.53.0
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH v2 1/5] riscv: dts: spacemit: set console baud rate on K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
@ 2026-06-23 20:43 ` Aurelien Jarno
-1 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Guodong Xu
Cc: Aurelien Jarno, Guodong Xu,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
Because the default console's baud rate is not set, defconfig kernels do
not have any serial output on this platform. Set the baud rate to
115200, matching what is used by U-Boot etc on this platform.
Fixes: 7a6131804986 ("riscv: dts: spacemit: add K3 Pico-ITX board support")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Guodong Xu <docular.xu@gmail.com>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
v2:
- Collect Reviewed-by tag
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index b89c1521e6649..509cebc0c9568 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -18,7 +18,7 @@ aliases {
};
chosen {
- stdout-path = "serial0";
+ stdout-path = "serial0:115200n8";
};
memory@100000000 {
--
2.53.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 1/5] riscv: dts: spacemit: set console baud rate on K3 Pico-ITX board
@ 2026-06-23 20:43 ` Aurelien Jarno
0 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Guodong Xu
Cc: Aurelien Jarno, Guodong Xu,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
Because the default console's baud rate is not set, defconfig kernels do
not have any serial output on this platform. Set the baud rate to
115200, matching what is used by U-Boot etc on this platform.
Fixes: 7a6131804986 ("riscv: dts: spacemit: add K3 Pico-ITX board support")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Guodong Xu <docular.xu@gmail.com>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
v2:
- Collect Reviewed-by tag
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index b89c1521e6649..509cebc0c9568 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -18,7 +18,7 @@ aliases {
};
chosen {
- stdout-path = "serial0";
+ stdout-path = "serial0:115200n8";
};
memory@100000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 2/5] riscv: dts: spacemit: enable the i2c2 adapter on K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
@ 2026-06-23 20:43 ` Aurelien Jarno
-1 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
Define I2C2 pinctrl properties, and enable it on the K3 Pico-ITX board.
It will be used by the 24c02 eeprom.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 6 ++++++
arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 11 +++++++++++
2 files changed, 17 insertions(+)
v2:
- Rename pinctrl subnode from i2c2-0-pins to i2c2-1-pins
- Add a missing space after bias-pull-up
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index 509cebc0c9568..5fe9041ec5702 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -43,6 +43,12 @@ reg_aux_vcc5v: regulator-aux-vcc5v {
};
};
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_1_cfg>;
+ status = "okay";
+};
+
&i2c8 {
pinctrl-names = "default";
pinctrl-0 = <&i2c8_cfg>;
diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
index 3ee1471f37985..50dc124c097f9 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
@@ -78,6 +78,17 @@ gmac1-phy-0-pins {
};
};
+ /omit-if-no-ref/
+ i2c2_1_cfg: i2c2-1-cfg {
+ i2c2-1-pins {
+ pinmux = <K3_PADCONF(46, 5)>, /* i2c2 scl */
+ <K3_PADCONF(47, 5)>; /* i2c2 sda */
+
+ bias-pull-up = <0>;
+ drive-strength = <25>;
+ };
+ };
+
/omit-if-no-ref/
i2c8_cfg: i2c8-cfg {
i2c8-pins {
--
2.53.0
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 2/5] riscv: dts: spacemit: enable the i2c2 adapter on K3 Pico-ITX board
@ 2026-06-23 20:43 ` Aurelien Jarno
0 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
Define I2C2 pinctrl properties, and enable it on the K3 Pico-ITX board.
It will be used by the 24c02 eeprom.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 6 ++++++
arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 11 +++++++++++
2 files changed, 17 insertions(+)
v2:
- Rename pinctrl subnode from i2c2-0-pins to i2c2-1-pins
- Add a missing space after bias-pull-up
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index 509cebc0c9568..5fe9041ec5702 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -43,6 +43,12 @@ reg_aux_vcc5v: regulator-aux-vcc5v {
};
};
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_1_cfg>;
+ status = "okay";
+};
+
&i2c8 {
pinctrl-names = "default";
pinctrl-0 = <&i2c8_cfg>;
diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
index 3ee1471f37985..50dc124c097f9 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
@@ -78,6 +78,17 @@ gmac1-phy-0-pins {
};
};
+ /omit-if-no-ref/
+ i2c2_1_cfg: i2c2-1-cfg {
+ i2c2-1-pins {
+ pinmux = <K3_PADCONF(46, 5)>, /* i2c2 scl */
+ <K3_PADCONF(47, 5)>; /* i2c2 sda */
+
+ bias-pull-up = <0>;
+ drive-strength = <25>;
+ };
+ };
+
/omit-if-no-ref/
i2c8_cfg: i2c8-cfg {
i2c8-pins {
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 3/5] riscv: dts: spacemit: add 24c02 eeprom on K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
@ 2026-06-23 20:43 ` Aurelien Jarno
-1 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
The K3 Pico-ITX board includes a 24c02 eeprom, that stores the product
name, the part name, the MAC address of the network interfaces and the
board's serial number. These values are also exposed via an
onie,tlv-layout nvmem layout.
The eeprom is marked as read-only since its contents are not supposed to
be modified.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 30 ++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index 5fe9041ec5702..0a0c221c99e74 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -47,6 +47,36 @@ &i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_1_cfg>;
status = "okay";
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <8>;
+ read-only;
+ size = <256>;
+ status = "okay";
+
+ nvmem-layout {
+ compatible = "onie,tlv-layout";
+
+ mac-address {
+ #nvmem-cell-cells = <1>;
+ };
+
+ num-macs {
+ };
+
+ part-number {
+ };
+
+ product-name {
+ };
+
+ serial-number {
+ };
+
+ };
+ };
};
&i2c8 {
--
2.53.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 3/5] riscv: dts: spacemit: add 24c02 eeprom on K3 Pico-ITX board
@ 2026-06-23 20:43 ` Aurelien Jarno
0 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V SPACEMIT SoC Support,
open list:RISC-V SPACEMIT SoC Support
The K3 Pico-ITX board includes a 24c02 eeprom, that stores the product
name, the part name, the MAC address of the network interfaces and the
board's serial number. These values are also exposed via an
onie,tlv-layout nvmem layout.
The eeprom is marked as read-only since its contents are not supposed to
be modified.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 30 ++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index 5fe9041ec5702..0a0c221c99e74 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -47,6 +47,36 @@ &i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_1_cfg>;
status = "okay";
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <8>;
+ read-only;
+ size = <256>;
+ status = "okay";
+
+ nvmem-layout {
+ compatible = "onie,tlv-layout";
+
+ mac-address {
+ #nvmem-cell-cells = <1>;
+ };
+
+ num-macs {
+ };
+
+ part-number {
+ };
+
+ product-name {
+ };
+
+ serial-number {
+ };
+
+ };
+ };
};
&i2c8 {
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 4/5] riscv: dts: spacemit: add i2c aliases on K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
@ 2026-06-23 20:43 ` Aurelien Jarno
-1 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V ARCHITECTURE,
open list:RISC-V SPACEMIT SoC Support
Add i2c aliases for i2c2 and i2c8 on K3 Pico-ITX board. This is useful
to keep a stable number for the /dev entries after loading the i2c-dev
module.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index 0a0c221c99e74..bf64b6c6f867f 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -14,6 +14,8 @@ / {
aliases {
ethernet0 = ð0;
+ i2c2 = &i2c2;
+ i2c8 = &i2c8;
serial0 = &uart0;
};
--
2.53.0
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 4/5] riscv: dts: spacemit: add i2c aliases on K3 Pico-ITX board
@ 2026-06-23 20:43 ` Aurelien Jarno
0 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yixun Lan, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V ARCHITECTURE,
open list:RISC-V SPACEMIT SoC Support
Add i2c aliases for i2c2 and i2c8 on K3 Pico-ITX board. This is useful
to keep a stable number for the /dev entries after loading the i2c-dev
module.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index 0a0c221c99e74..bf64b6c6f867f 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -14,6 +14,8 @@ / {
aliases {
ethernet0 = ð0;
+ i2c2 = &i2c2;
+ i2c8 = &i2c8;
serial0 = &uart0;
};
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 5/5] riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
@ 2026-06-23 20:43 ` Aurelien Jarno
-1 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V ARCHITECTURE,
open list:RISC-V SPACEMIT SoC Support
Vendor kernel enabled ALDPS (Advanced Link Down Power Saving) on the
RTL8211F PHY to save power when link down.
Vendor kernel also disabled the 125MHz clkout clock signal, and indeed
the schematics confirms that it only goes to a test point (TP14), so
let's do the same.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index bf64b6c6f867f..e12d798b48a49 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -234,6 +234,8 @@ phy0: phy@1 {
reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
+ realtek,aldps-enable;
+ realtek,clkout-disable;
};
};
};
--
2.53.0
_______________________________________________
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 5/5] riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
@ 2026-06-23 20:43 ` Aurelien Jarno
0 siblings, 0 replies; 18+ messages in thread
From: Aurelien Jarno @ 2026-06-23 20:43 UTC (permalink / raw)
To: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yixun Lan
Cc: Aurelien Jarno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V ARCHITECTURE,
open list:RISC-V SPACEMIT SoC Support
Vendor kernel enabled ALDPS (Advanced Link Down Power Saving) on the
RTL8211F PHY to save power when link down.
Vendor kernel also disabled the 125MHz clkout clock signal, and indeed
the schematics confirms that it only goes to a test point (TP14), so
let's do the same.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index bf64b6c6f867f..e12d798b48a49 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -234,6 +234,8 @@ phy0: phy@1 {
reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
+ realtek,aldps-enable;
+ realtek,clkout-disable;
};
};
};
--
2.53.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 5/5] riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
(?)
@ 2026-06-23 21:39 ` sashiko-bot
-1 siblings, 0 replies; 18+ messages in thread
From: sashiko-bot @ 2026-06-23 21:39 UTC (permalink / raw)
To: Aurelien Jarno; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Adding vendor-specific properties (`realtek,aldps-enable` and `realtek,clkout-disable`) to a PHY node with a generic `compatible` string bypasses DT schema validation and perpetuates probing fragility.
--
commit 06c0a01ebf26666aceea3d45a75bbed3025600af
Author: Aurelien Jarno <aurelien@aurel32.net>
riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
This commit enables ALDPS and disables the clkout signal on the RTL8211F
PHY for the K3 Pico-ITX board to save power and match hardware schematics.
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> index 532c72006ef1f..2476f5585a200 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> @@ -226,6 +226,8 @@ phy0: phy@1 {
> reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
> reset-assert-us = <10000>;
> reset-deassert-us = <10000>;
> + realtek,aldps-enable;
> + realtek,clkout-disable;
[Severity: Medium]
Will adding these vendor-specific properties without specifying a Realtek
PHY ID in the compatible string bypass device tree schema validation?
The realtek,rtl82xx.yaml schema is only selected if a Realtek PHY ID is
present. Since the phy0 node only specifies ethernet-phy-ieee802.3-c22, the
validation tools will ignore the new Realtek-specific properties, meaning
typos or invalid types could pass silently during dtbs_check.
Also, since this node uses reset-gpios, if the PHY is kept in reset by
hardware or the bootloader, could the MDIO framework fail to read its ID
and probe it unless the exact PHY ID is provided in the compatible string?
Would it be better to update the compatible string to include the specific
PHY ID (such as ethernet-phy-id001c.c916) alongside the generic one to
ensure proper schema validation and reliable probing?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260623204431.498700-1-aurelien@aurel32.net?part=5
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 5/5] riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
@ 2026-07-07 7:56 ` Yixun Lan
-1 siblings, 0 replies; 18+ messages in thread
From: Yixun Lan @ 2026-07-07 7:56 UTC (permalink / raw)
To: Aurelien Jarno
Cc: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V ARCHITECTURE,
open list:RISC-V SPACEMIT SoC Support
Hi Aurelien,
On 22:43 Tue 23 Jun , Aurelien Jarno wrote:
> Vendor kernel enabled ALDPS (Advanced Link Down Power Saving) on the
> RTL8211F PHY to save power when link down.
for ALDPS, tested here do noticed it will configure RTL8211F PHY's
RTL8211F_PHYCR1 register via rtl8211f_config_aldps()
And plug out then in the cable, the network(eth0) will come back and still
works fine, although I have no power consumption meter to test, but I think
it deserves:
Tested-by: Yixun Lan <dlan@kernel.org>
>
> Vendor kernel also disabled the 125MHz clkout clock signal, and indeed
> the schematics confirms that it only goes to a test point (TP14), so
> let's do the same.
>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
> arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> index bf64b6c6f867f..e12d798b48a49 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> @@ -234,6 +234,8 @@ phy0: phy@1 {
> reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
> reset-assert-us = <10000>;
> reset-deassert-us = <10000>;
> + realtek,aldps-enable;
> + realtek,clkout-disable;
> };
> };
> };
> --
> 2.53.0
>
--
Yixun Lan (dlan)
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 5/5] riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
@ 2026-07-07 7:56 ` Yixun Lan
0 siblings, 0 replies; 18+ messages in thread
From: Yixun Lan @ 2026-07-07 7:56 UTC (permalink / raw)
To: Aurelien Jarno
Cc: linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:RISC-V ARCHITECTURE,
open list:RISC-V SPACEMIT SoC Support
Hi Aurelien,
On 22:43 Tue 23 Jun , Aurelien Jarno wrote:
> Vendor kernel enabled ALDPS (Advanced Link Down Power Saving) on the
> RTL8211F PHY to save power when link down.
for ALDPS, tested here do noticed it will configure RTL8211F PHY's
RTL8211F_PHYCR1 register via rtl8211f_config_aldps()
And plug out then in the cable, the network(eth0) will come back and still
works fine, although I have no power consumption meter to test, but I think
it deserves:
Tested-by: Yixun Lan <dlan@kernel.org>
>
> Vendor kernel also disabled the 125MHz clkout clock signal, and indeed
> the schematics confirms that it only goes to a test point (TP14), so
> let's do the same.
>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
> arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> index bf64b6c6f867f..e12d798b48a49 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> @@ -234,6 +234,8 @@ phy0: phy@1 {
> reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
> reset-assert-us = <10000>;
> reset-deassert-us = <10000>;
> + realtek,aldps-enable;
> + realtek,clkout-disable;
> };
> };
> };
> --
> 2.53.0
>
--
Yixun Lan (dlan)
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 0/5] riscv: dts: spacemit: serial/i2c/ethernet improvements for the K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
@ 2026-07-07 6:18 ` Yixun Lan
-1 siblings, 0 replies; 18+ messages in thread
From: Yixun Lan @ 2026-07-07 6:18 UTC (permalink / raw)
To: Aurelien Jarno
Cc: linux-kernel, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, open list:RISC-V ARCHITECTURE:Keyword:riscv,
open list:RISC-V SPACEMIT SoC Support:Keyword:spacemit
hi Aurelien,
On 22:43 Tue 23 Jun , Aurelien Jarno wrote:
> This patch series tries to improve the K3 Pico-ITX board DTS by configuring the
> default baud rate for the serial port, enabling the 24c02 eeprom on i2c2,
> adding aliases for i2c2 and i2c8 ports, and enabling power saving features on
> the RTL8211F PHY.
>
> Changes in v2:
> - Collect Reviewed-by tag
> - Fix issues reported by Sashiko AI in patch 2
> - Link to v1: https://lore.kernel.org/linux-riscv/20260620062238.3199108-1-aurelien@aurel32.net
>
for the series, looks good, so
Reviewed-by: Yixun Lan <dlan@kernel.org>
>
> Aurelien Jarno (5):
> riscv: dts: spacemit: set console baud rate on K3 Pico-ITX board
> riscv: dts: spacemit: enable the i2c2 adapter on K3 Pico-ITX board
> riscv: dts: spacemit: add 24c02 eeprom on K3 Pico-ITX board
> riscv: dts: spacemit: add i2c aliases on K3 Pico-ITX board
> riscv: dts: spacemit: improve RTL8211F PHY configuration on K3
> Pico-ITX board
>
> arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 42 +++++++++++++++++++-
> arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 11 +++++
> 2 files changed, 52 insertions(+), 1 deletion(-)
>
> --
> 2.53.0
>
--
Yixun Lan (dlan)
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 0/5] riscv: dts: spacemit: serial/i2c/ethernet improvements for the K3 Pico-ITX board
@ 2026-07-07 6:18 ` Yixun Lan
0 siblings, 0 replies; 18+ messages in thread
From: Yixun Lan @ 2026-07-07 6:18 UTC (permalink / raw)
To: Aurelien Jarno
Cc: linux-kernel, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, open list:RISC-V ARCHITECTURE:Keyword:riscv,
open list:RISC-V SPACEMIT SoC Support:Keyword:spacemit
hi Aurelien,
On 22:43 Tue 23 Jun , Aurelien Jarno wrote:
> This patch series tries to improve the K3 Pico-ITX board DTS by configuring the
> default baud rate for the serial port, enabling the 24c02 eeprom on i2c2,
> adding aliases for i2c2 and i2c8 ports, and enabling power saving features on
> the RTL8211F PHY.
>
> Changes in v2:
> - Collect Reviewed-by tag
> - Fix issues reported by Sashiko AI in patch 2
> - Link to v1: https://lore.kernel.org/linux-riscv/20260620062238.3199108-1-aurelien@aurel32.net
>
for the series, looks good, so
Reviewed-by: Yixun Lan <dlan@kernel.org>
>
> Aurelien Jarno (5):
> riscv: dts: spacemit: set console baud rate on K3 Pico-ITX board
> riscv: dts: spacemit: enable the i2c2 adapter on K3 Pico-ITX board
> riscv: dts: spacemit: add 24c02 eeprom on K3 Pico-ITX board
> riscv: dts: spacemit: add i2c aliases on K3 Pico-ITX board
> riscv: dts: spacemit: improve RTL8211F PHY configuration on K3
> Pico-ITX board
>
> arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 42 +++++++++++++++++++-
> arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 11 +++++
> 2 files changed, 52 insertions(+), 1 deletion(-)
>
> --
> 2.53.0
>
--
Yixun Lan (dlan)
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 0/5] riscv: dts: spacemit: serial/i2c/ethernet improvements for the K3 Pico-ITX board
2026-06-23 20:43 ` Aurelien Jarno
` (6 preceding siblings ...)
(?)
@ 2026-07-14 9:10 ` Yixun Lan
-1 siblings, 0 replies; 18+ messages in thread
From: Yixun Lan @ 2026-07-14 9:10 UTC (permalink / raw)
To: linux-kernel, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Aurelien Jarno
Cc: Yixun Lan, linux-riscv, spacemit
On Tue, 23 Jun 2026 22:43:44 +0200, Aurelien Jarno wrote:
> This patch series tries to improve the K3 Pico-ITX board DTS by configuring the
> default baud rate for the serial port, enabling the 24c02 eeprom on i2c2,
> adding aliases for i2c2 and i2c8 ports, and enabling power saving features on
> the RTL8211F PHY.
>
> Changes in v2:
> - Collect Reviewed-by tag
> - Fix issues reported by Sashiko AI in patch 2
> - Link to v1: https://lore.kernel.org/linux-riscv/20260620062238.3199108-1-aurelien@aurel32.net
>
> [...]
Applied, thanks!
[1/5] riscv: dts: spacemit: set console baud rate on K3 Pico-ITX board
https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux.git/commit/?id=84a9b686f24490e9340961c913072df7fc9518a1
[2/5] riscv: dts: spacemit: enable the i2c2 adapter on K3 Pico-ITX board
https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux.git/commit/?id=e08ab32f61b1fc7c35253b708f3840530a2c13cc
[3/5] riscv: dts: spacemit: add 24c02 eeprom on K3 Pico-ITX board
https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux.git/commit/?id=6e59ab1a2b4539cda3677d4927a08609be28de6c
[4/5] riscv: dts: spacemit: add i2c aliases on K3 Pico-ITX board
https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux.git/commit/?id=ca259920d5551b0c68e5dc188a2f0118baa151ec
[5/5] riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux.git/commit/?id=ccbfb13d278abbde13e544316e961d3ab03a77c8
Best regards,
--
Yixun Lan <dlan@kernel.org>
^ permalink raw reply [flat|nested] 18+ messages in thread