All of lore.kernel.org
 help / color / mirror / Atom feed
From: Yixun Lan <dlan@kernel.org>
To: Zhengyu He <hezhy472013@gmail.com>
Cc: Han Xu <han.xu@nxp.com>, Mark Brown <broonie@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	linux-spi@vger.kernel.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
	Wei Fu <wefu@redhat.com>, Cody Kang <cody.kang.hk@outlook.com>
Subject: Re: [PATCH v2 2/2] riscv: dts: spacemit: add QSPI support for K3 Pico-ITX
Date: Tue, 7 Jul 2026 10:56:36 +0000	[thread overview]
Message-ID: <20260707105636-GKH35811@kernel.org> (raw)
In-Reply-To: <20260521-k3-pico-itx-qspi-v2-for-next-20260521-v2-2-52bce26e5fd8@gmail.com>

Hi Zhengyu,

since I'm requesting some changes, so along with the title, suggest
riscv: dts: spacemit: k3: Add QSPI support for Pico-ITX board

On 22:44 Thu 21 May     , Zhengyu He wrote:
> Add K3 QSPI controller node into k3.dtsi, and add related pinmux
> configuration.
It's obvious..
> 
> Enable QSPI on Pico-ITX board, and describe the NOR flash which wires
> to it.
> 
How about combine above and simplify
Enable QSPI with proper pinmux on Pico-ITX board, and describe the NOR flash
 which wires to it.

> Signed-off-by: Cody Kang <cody.kang.hk@outlook.com>
> Signed-off-by: Zhengyu He <hezhy472013@gmail.com>
> ---
> Changes in v2:
> - Add "spacemit,k1-qspi" fallback to the K3 QSPI compatible.
> - Reordered Signed-off-by trailers.
> ---
>  arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 58 ++++++++++++++++++++++++++++
>  arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 21 ++++++++++
>  arch/riscv/boot/dts/spacemit/k3.dtsi         | 17 ++++++++
>  3 files changed, 96 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> index b89c1521e664..e90e17895bb2 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> @@ -200,6 +200,64 @@ phy0: phy@1 {
>  	};
>  };
>  
> +&pinctrl {
> +	qspi-cfg {
as you've already defined te label, which make it possible to reduce one indention

&qspi_cfg {
 ..
}

> +		qspi-pins {
> +			power-source = <1800>;
> +		};
> +
> +		qspi-cs0-pins {
> +			power-source = <1800>;
> +		};
> +	};
> +};
> +

-- 
Yixun Lan (dlan)

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Yixun Lan <dlan@kernel.org>
To: Zhengyu He <hezhy472013@gmail.com>
Cc: Han Xu <han.xu@nxp.com>, Mark Brown <broonie@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	linux-spi@vger.kernel.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
	Wei Fu <wefu@redhat.com>, Cody Kang <cody.kang.hk@outlook.com>
Subject: Re: [PATCH v2 2/2] riscv: dts: spacemit: add QSPI support for K3 Pico-ITX
Date: Tue, 7 Jul 2026 10:56:36 +0000	[thread overview]
Message-ID: <20260707105636-GKH35811@kernel.org> (raw)
In-Reply-To: <20260521-k3-pico-itx-qspi-v2-for-next-20260521-v2-2-52bce26e5fd8@gmail.com>

Hi Zhengyu,

since I'm requesting some changes, so along with the title, suggest
riscv: dts: spacemit: k3: Add QSPI support for Pico-ITX board

On 22:44 Thu 21 May     , Zhengyu He wrote:
> Add K3 QSPI controller node into k3.dtsi, and add related pinmux
> configuration.
It's obvious..
> 
> Enable QSPI on Pico-ITX board, and describe the NOR flash which wires
> to it.
> 
How about combine above and simplify
Enable QSPI with proper pinmux on Pico-ITX board, and describe the NOR flash
 which wires to it.

> Signed-off-by: Cody Kang <cody.kang.hk@outlook.com>
> Signed-off-by: Zhengyu He <hezhy472013@gmail.com>
> ---
> Changes in v2:
> - Add "spacemit,k1-qspi" fallback to the K3 QSPI compatible.
> - Reordered Signed-off-by trailers.
> ---
>  arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 58 ++++++++++++++++++++++++++++
>  arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 21 ++++++++++
>  arch/riscv/boot/dts/spacemit/k3.dtsi         | 17 ++++++++
>  3 files changed, 96 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> index b89c1521e664..e90e17895bb2 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
> @@ -200,6 +200,64 @@ phy0: phy@1 {
>  	};
>  };
>  
> +&pinctrl {
> +	qspi-cfg {
as you've already defined te label, which make it possible to reduce one indention

&qspi_cfg {
 ..
}

> +		qspi-pins {
> +			power-source = <1800>;
> +		};
> +
> +		qspi-cs0-pins {
> +			power-source = <1800>;
> +		};
> +	};
> +};
> +

-- 
Yixun Lan (dlan)

  parent reply	other threads:[~2026-07-07 10:56 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-21 14:44 [PATCH v2 0/2] spi: enable the SpacemiT K3 SoC QSPI Zhengyu He
2026-05-21 14:44 ` Zhengyu He
2026-05-21 14:44 ` [PATCH v2 1/2] spi: dt-bindings: fsl-qspi: support SpacemiT K3 Zhengyu He
2026-05-21 14:44   ` Zhengyu He
2026-05-21 19:46   ` Conor Dooley
2026-05-21 19:46     ` Conor Dooley
2026-05-21 14:44 ` [PATCH v2 2/2] riscv: dts: spacemit: add QSPI support for K3 Pico-ITX Zhengyu He
2026-05-21 14:44   ` Zhengyu He
2026-06-20  6:23   ` Aurelien Jarno
2026-06-20  6:23     ` Aurelien Jarno
2026-07-07 10:56   ` Yixun Lan [this message]
2026-07-07 10:56     ` Yixun Lan
2026-05-21 20:56 ` (subset) [PATCH v2 0/2] spi: enable the SpacemiT K3 SoC QSPI Mark Brown
2026-05-21 20:56   ` Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260707105636-GKH35811@kernel.org \
    --to=dlan@kernel.org \
    --cc=alex@ghiti.fr \
    --cc=aou@eecs.berkeley.edu \
    --cc=broonie@kernel.org \
    --cc=cody.kang.hk@outlook.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=han.xu@nxp.com \
    --cc=hezhy472013@gmail.com \
    --cc=imx@lists.linux.dev \
    --cc=krzk+dt@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=palmer@dabbelt.com \
    --cc=pjw@kernel.org \
    --cc=robh@kernel.org \
    --cc=spacemit@lists.linux.dev \
    --cc=wefu@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.