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* Ethtool is missing C2C link modes
@ 2026-07-10 21:45 D H, Siddaraju
  2026-07-10 22:54 ` Andrew Lunn
  2026-07-13 23:18 ` Eric Joyner
  0 siblings, 2 replies; 6+ messages in thread
From: D H, Siddaraju @ 2026-07-10 21:45 UTC (permalink / raw)
  To: Maxime Chevallier, Andrew Lunn, Michal Kubecek,
	netdev@vger.kernel.org
  Cc: Chintalapalle, Balaji, Das, Shubham, Srinivasan, Vijay,
	Samudrala, Sridhar, Keller, Jacob E, Nguyen, Anthony L,
	singhai.anjali55@gmail.com, Brandeburg, Jesse

Hello Linux Ethernet team, Maxime, Andrew & Michal,

The IEEE AUI chip-to-chip (C2C) is the accepted standard for connecting
chips that handle subfunctions within the OSI physical layer. Just to
pick, the C2C is widely used when connecting Ethernet SoCs with retimers
and PCS SerDes terminated external-phys to offload PHY sublayer functions.

With the existing ethtool link modes, we were not able to fit these C2C
interfaces on any others (we fitted **SGMII interfaces to baseT link modes)
and we see this as a gap. If you acknowledge this, we plan to send an
RFC patch to define below listed C2C link modes to ethtool.

	10G_SFI_C2C		SFF-8418
	25G_AUI_C2C		IEEE 802.3 Annex 109A
	CAUI4 C2C		IEEE 802.3 Annex 83D
	LAUI2-C2C		IEEE 802.3 Annex 135B
	50GAUI-1 C2C		IEEE 802.3 Annex 135F
	200GAUI-4 C2C		IEEE 802.3 Annex 120D
	100GAUI-1 C2C		IEEE 802.3ck Annex 120F
	200GAUI-2 C2C		IEEE 802.3ck Clause 162
	400GAUI-4 C2C		IEEE 802.3ck Clause 163

- Thank you,
Siddaraju D H



^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Ethtool is missing C2C link modes
  2026-07-10 21:45 Ethtool is missing C2C link modes D H, Siddaraju
@ 2026-07-10 22:54 ` Andrew Lunn
  2026-07-11  6:31   ` David Laight
  2026-07-13 23:18 ` Eric Joyner
  1 sibling, 1 reply; 6+ messages in thread
From: Andrew Lunn @ 2026-07-10 22:54 UTC (permalink / raw)
  To: D H, Siddaraju
  Cc: Maxime Chevallier, Michal Kubecek, netdev@vger.kernel.org,
	Chintalapalle, Balaji, Das, Shubham, Srinivasan, Vijay,
	Samudrala, Sridhar, Keller, Jacob E, Nguyen, Anthony L,
	singhai.anjali55@gmail.com, Brandeburg, Jesse

On Fri, Jul 10, 2026 at 09:45:43PM +0000, D H, Siddaraju wrote:
> Hello Linux Ethernet team, Maxime, Andrew & Michal,
> 
> The IEEE AUI chip-to-chip (C2C) is the accepted standard for connecting
> chips that handle subfunctions within the OSI physical layer. Just to
> pick, the C2C is widely used when connecting Ethernet SoCs with retimers
> and PCS SerDes terminated external-phys to offload PHY sublayer functions.

It cannot be that widely used if Linux does not support it yet :-)

> With the existing ethtool link modes, we were not able to fit these C2C
> interfaces on any others (we fitted **SGMII interfaces to baseT link modes)
> and we see this as a gap. If you acknowledge this, we plan to send an
> RFC patch to define below listed C2C link modes to ethtool.
> 
> 	25G_AUI_C2C		IEEE 802.3 Annex 109A

So 109 is about 25GBASE-R. We have the following link modes for that:

       ETHTOOL_LINK_MODE_25000baseCR_Full_BIT  = 31,
       ETHTOOL_LINK_MODE_25000baseKR_Full_BIT  = 32,
       ETHTOOL_LINK_MODE_25000baseSR_Full_BIT  = 33,

Why break the pattern? Why not add:

       ETHTOOL_LINK_MODE_25000baseC2C_Full_BIT

Is C2C that different to CR, KR, DR?

> 	200GAUI-4 C2C		IEEE 802.3 Annex 120D
> 	100GAUI-1 C2C		IEEE 802.3ck Annex 120F
> 	200GAUI-2 C2C		IEEE 802.3ck Clause 162
> 	400GAUI-4 C2C		IEEE 802.3ck Clause 163

If you look at the existing pattern for link modes which need to
specify the number of lanes:

        ETHTOOL_LINK_MODE_800000baseCR8_Full_BIT
        ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT
	ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT

why put the number in the middle?

Since you are breaking the existing pattern, it would be good to
include a justification why you picked your pattern.

Also, an architecture question...

It sounds like you use this between the MAC and the PCS. The PCS can
then be connected to a PHY, and the PHY then has a line side. (I'm
being a bit loose with the terms here, i should probably be saying
PMA, PMD etc.)

Should ethtool be saying:

Settings for eth0:
	Supported ports: [ TP	 MII ]
	Supported link modes:   25000baseC2C

or should it be reporting:

Settings for eth0:
	Supported ports: [ TP	 MII ]
	Supported link modes:   25000baseSR

I _think_ ethtool reports the media, not some intermediary format.

Is ETHTOOL_LINK_MODE_25000baseC2C_Full_BIT actually needed? I suppose
one use case would be when you directly connect two MACs together, PMA
to PMA. So a 25G NIC directly connected to a switch port, with no
'media' in the middle. Then ethtool probably should report
25000baseC2C.

	Andrew

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Ethtool is missing C2C link modes
  2026-07-10 22:54 ` Andrew Lunn
@ 2026-07-11  6:31   ` David Laight
  2026-07-11  8:42     ` Maxime Chevallier
  0 siblings, 1 reply; 6+ messages in thread
From: David Laight @ 2026-07-11  6:31 UTC (permalink / raw)
  To: Andrew Lunn
  Cc: D H, Siddaraju, Maxime Chevallier, Michal Kubecek,
	netdev@vger.kernel.org, Chintalapalle, Balaji, Das, Shubham,
	Srinivasan, Vijay, Samudrala, Sridhar, Keller, Jacob E,
	Nguyen, Anthony L, singhai.anjali55@gmail.com, Brandeburg, Jesse

On Sat, 11 Jul 2026 00:54:00 +0200
Andrew Lunn <andrew@lunn.ch> wrote:

> On Fri, Jul 10, 2026 at 09:45:43PM +0000, D H, Siddaraju wrote:
> > Hello Linux Ethernet team, Maxime, Andrew & Michal,
> > 
> > The IEEE AUI chip-to-chip (C2C) is the accepted standard for connecting
> > chips that handle subfunctions within the OSI physical layer. Just to
> > pick, the C2C is widely used when connecting Ethernet SoCs with retimers
> > and PCS SerDes terminated external-phys to offload PHY sublayer functions.  
> 
> It cannot be that widely used if Linux does not support it yet :-)

It also seems like something that is fixed for a physical board.
So while a common MAC driver would need to be told how to configure
its output, the user wouldn't be changing the value so it would
be more of a DT parameter than an ethtool one.

...
> Also, an architecture question...
> 
> It sounds like you use this between the MAC and the PCS. The PCS can
> then be connected to a PHY, and the PHY then has a line side. (I'm
> being a bit loose with the terms here, i should probably be saying
> PMA, PMD etc.)
> 
> Should ethtool be saying:
> 
> Settings for eth0:
> 	Supported ports: [ TP	 MII ]
> 	Supported link modes:   25000baseC2C
> 
> or should it be reporting:
> 
> Settings for eth0:
> 	Supported ports: [ TP	 MII ]
> 	Supported link modes:   25000baseSR
> 
> I _think_ ethtool reports the media, not some intermediary format.

You'd want to use ethtool to set the final link parameters of the
external phy?
So I think you's still want to be able to select (say) 100MHDX
for a TP link.

Remember the history.
The parameter was originally used to select between the the AUI, COAX and TP
connectors on a 10M ethernet card.
Then the internal TP gained extra speeds.
We then get MII for external 10M and 100M PHY, later RGMII for external Ge PHY.
But you rarely get boards (not MAC chips) that have a choice of interfaces
any more.

> Is ETHTOOL_LINK_MODE_25000baseC2C_Full_BIT actually needed? I suppose
> one use case would be when you directly connect two MACs together, PMA
> to PMA. So a 25G NIC directly connected to a switch port, with no
> 'media' in the middle. Then ethtool probably should report
> 25000baseC2C.

That might be similar to using RGMII crossover to connect to MAC together
(Which does get used on-board).
I'm not sure how we selected that, but overloading the media is 'sort of'
ok because there is no media in that case.

	David

> 
> 	Andrew
> 


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Ethtool is missing C2C link modes
  2026-07-11  6:31   ` David Laight
@ 2026-07-11  8:42     ` Maxime Chevallier
  2026-07-14 13:29       ` D H, Siddaraju
  0 siblings, 1 reply; 6+ messages in thread
From: Maxime Chevallier @ 2026-07-11  8:42 UTC (permalink / raw)
  To: David Laight, Andrew Lunn
  Cc: D H, Siddaraju, Michal Kubecek, netdev@vger.kernel.org,
	Chintalapalle, Balaji, Das, Shubham, Srinivasan, Vijay,
	Samudrala, Sridhar, Keller, Jacob E, Nguyen, Anthony L,
	singhai.anjali55@gmail.com, Brandeburg, Jesse

Hi,

On 7/11/26 08:31, David Laight wrote:
> On Sat, 11 Jul 2026 00:54:00 +0200
> Andrew Lunn <andrew@lunn.ch> wrote:
> 
>> On Fri, Jul 10, 2026 at 09:45:43PM +0000, D H, Siddaraju wrote:
>>> Hello Linux Ethernet team, Maxime, Andrew & Michal,
>>>
>>> The IEEE AUI chip-to-chip (C2C) is the accepted standard for connecting
>>> chips that handle subfunctions within the OSI physical layer. Just to
>>> pick, the C2C is widely used when connecting Ethernet SoCs with retimers
>>> and PCS SerDes terminated external-phys to offload PHY sublayer functions.  
>>
>> It cannot be that widely used if Linux does not support it yet :-)
> 
> It also seems like something that is fixed for a physical board.
> So while a common MAC driver would need to be told how to configure
> its output, the user wouldn't be changing the value so it would
> be more of a DT parameter than an ethtool one.
> 
> ...
>> Also, an architecture question...
>>
>> It sounds like you use this between the MAC and the PCS. The PCS can
>> then be connected to a PHY, and the PHY then has a line side. (I'm
>> being a bit loose with the terms here, i should probably be saying
>> PMA, PMD etc.)
>>
>> Should ethtool be saying:
>>
>> Settings for eth0:
>> 	Supported ports: [ TP	 MII ]
>> 	Supported link modes:   25000baseC2C
>>
>> or should it be reporting:
>>
>> Settings for eth0:
>> 	Supported ports: [ TP	 MII ]
>> 	Supported link modes:   25000baseSR
>>
>> I _think_ ethtool reports the media, not some intermediary format.
> 
> You'd want to use ethtool to set the final link parameters of the
> external phy?
> So I think you's still want to be able to select (say) 100MHDX
> for a TP link.
> 
> Remember the history.
> The parameter was originally used to select between the the AUI, COAX and TP
> connectors on a 10M ethernet card.
> Then the internal TP gained extra speeds.
> We then get MII for external 10M and 100M PHY, later RGMII for external Ge PHY.
> But you rarely get boards (not MAC chips) that have a choice of interfaces
> any more.

Note that there's ongoing work[1] to better support nics with multiple connectors,
which also includes reporting what the 'media-side' of a MAC / PHY can do :

[1]: https://lore.kernel.org/netdev/20260701110427.143945-1-maxime.chevallier@bootlin.com/#t

Taking the example of a combo-port (SFP + RJ45), it would look like that :

 ethtool --show-ports eth1

Port for eth1:
	Port id: 1
	Supported link modes:  10baseT/Half 10baseT/Full
	                       100baseT/Half 100baseT/Full
	                       1000baseT/Full
	                       10000baseT/Full
	                       2500baseT/Full
	                       5000baseT/Full
	Port type: mdi

Port for eth1:
	Port id: 2
	Supported MII interfaces : 10gbase-r
	Port type: sfp

or even

# ethtool --show-ports eth3

Port for eth3:
	Port id: 1
	Supported MII interfaces : sgmii, 1000base-x, 2500base-x
	Port type: sfp


Now, with this infrastucture also comes the ability to list the media-side
interfaces that are not MDI but rather MII.

The main goal is combo-port support, but also media-converters, e.g. things
like :

MAC ------ PHY ------- <something>
     rgmii      sgmii

(for now, the ongoing series focus on supporting this through SFP, but extending
that to other link types is something I'd like to achieve)

As Andrew says, when you use "ethtool ethX", the list you get is the media-side
modes that you can use at the connector, so it's an aggregated list of the MDI
that are usable based on the MAC, PCS, PHY you're using (MAC and PCS would limit
speed/encoding, PHY defines the actual MDI modes)

For the C2C modes, it's not clear to me if these are MDI modes, i.e:

  ETHTOOL_LINK_MODE_25000baseC2C

Or a phy_interface_t, i.e:

  PHY_INTERFACE_MODE_25GAUI

We already have XAUI and RXAUI as phy_interface_t as of today, so it looks like
we don't want an ethool linkmode for that but rather a phy_interface_t

Maxime


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Ethtool is missing C2C link modes
  2026-07-10 21:45 Ethtool is missing C2C link modes D H, Siddaraju
  2026-07-10 22:54 ` Andrew Lunn
@ 2026-07-13 23:18 ` Eric Joyner
  1 sibling, 0 replies; 6+ messages in thread
From: Eric Joyner @ 2026-07-13 23:18 UTC (permalink / raw)
  To: D H, Siddaraju, Maxime Chevallier, Andrew Lunn, Michal Kubecek,
	netdev@vger.kernel.org
  Cc: Chintalapalle, Balaji, Das, Shubham, Srinivasan, Vijay,
	Samudrala, Sridhar, Keller, Jacob E, Nguyen, Anthony L,
	singhai.anjali55@gmail.com, Brandeburg, Jesse

On 7/10/2026 2:45 PM, D H, Siddaraju wrote:
> Hello Linux Ethernet team, Maxime, Andrew & Michal,
> 
> The IEEE AUI chip-to-chip (C2C) is the accepted standard for connecting
> chips that handle subfunctions within the OSI physical layer. Just to
> pick, the C2C is widely used when connecting Ethernet SoCs with retimers
> and PCS SerDes terminated external-phys to offload PHY sublayer functions.
> 
> With the existing ethtool link modes, we were not able to fit these C2C
> interfaces on any others (we fitted **SGMII interfaces to baseT link modes)
> and we see this as a gap. If you acknowledge this, we plan to send an
> RFC patch to define below listed C2C link modes to ethtool.
> 
> 	10G_SFI_C2C		SFF-8418
> 	25G_AUI_C2C		IEEE 802.3 Annex 109A
> 	CAUI4 C2C		IEEE 802.3 Annex 83D
> 	LAUI2-C2C		IEEE 802.3 Annex 135B
> 	50GAUI-1 C2C		IEEE 802.3 Annex 135F
> 	200GAUI-4 C2C		IEEE 802.3 Annex 120D
> 	100GAUI-1 C2C		IEEE 802.3ck Annex 120F
> 	200GAUI-2 C2C		IEEE 802.3ck Clause 162
> 	400GAUI-4 C2C		IEEE 802.3ck Clause 163
> 
> - Thank you,
> Siddaraju D H
> 

I'll piggyback on this thread because I have a related question about missing
ethtool link modes: what about entries for various Active Cable types? e.g. AOC,
ACC, and AEC for the appropriate speeds.

I see some drivers (like i40e and ice) detect these and map them to SR or DA/CR
types, but I don't see them do it in a consistent pattern, either. I couldn't
find anything that suggested a precedent on how to handle these.

- Eric

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: Ethtool is missing C2C link modes
  2026-07-11  8:42     ` Maxime Chevallier
@ 2026-07-14 13:29       ` D H, Siddaraju
  0 siblings, 0 replies; 6+ messages in thread
From: D H, Siddaraju @ 2026-07-14 13:29 UTC (permalink / raw)
  To: Maxime Chevallier, David Laight, Andrew Lunn
  Cc: Michal Kubecek, netdev@vger.kernel.org, Chintalapalle, Balaji,
	Das, Shubham, Srinivasan, Vijay, Samudrala, Sridhar,
	Keller, Jacob E, Nguyen, Anthony L, singhai.anjali55@gmail.com,
	Brandeburg, Jesse

Thank you Andrew, David for bringing up all your questions.
We feel we are trending towards Maxime's intermediate link & reporting
changes but for completeness, we will start answering the open questions,
so you guys can also come up to speed and help make better design choices.

The typical AUI-C2C looks like this
RS <-MII-> PCS - PMA <-AUI-C2C-> PMA ... PMA <-AUI-C2C-> PMA - PMD <-MDI->

Andrew: Is C2C that different to CR, KR, DR?
Siddaraju: Chip-to-Chip(C2C) is simplified version of the complex KR.
	IEEE defined C2C to connect chips that cannot do KR/CR/.., especially
	the complex ANLT state-machine to negotiate, adjust equalizers, etc.

Andrew: Why break the pattern? NNbaseXY vs NN-AUI-C2C
Siddaraju: baseR is an end-to-end physical layer type that clearly defines
	the	interface & components stating from MAC RS(Reconciliation Sublayer)
	till the PMD + MDI signallings. AUI is an intermediate electrical interface
	layer(simplified KR) that connects 2 PMAs (PMA <=== AUI ===> PMA).
	AUI is a split function design approach where subfunction implementation
	from multiple vendors come together to exploit their domain expertise
	to produce a best Ethernet interconnect.

Andrew: Lane numbering at the end-to-end and other patterns..
Siddaraju: The names were just a clean copy-paste from IEEE specs Andrew.
	That was to give a clear pointings to specs and avoid confusions with
	rename/rewordings. Yes, will follow the conventions for the ethtool
	patch sets.

Andrew: I _think_ ethtool reports the media, not some intermediary format.
	Is ETHTOOL_LINK_MODE_25000baseC2C_Full_BIT actually needed? 
Siddaraju: We are here to find out that Andrew :).
	If we are following the strict convention that ethtool link modes
	report & represents the end-to-end flow "ONLY", then yes, AUI doesn't
	fit there. We are exploring phy_interface_t for intermediate interfaces
	and we hope we don't hit any roadblocks. Let's see.

David: fixed, *** more of a DT parameter than an ethtool one.
Siddaraju: I don't think so David, AUI-C2C is not a fixed/one-time config.
	All the HW offload chips that we came across so far and connects over
	AUI are multi-speed capable and depending on the MDI line rate,
	the AUI also needs reconfig/runtime	update to match the speed.
	Say if the SFP is 25G, AUI needs to be set to 25G-AUI-C2C and
	if SFP is 50G, we need 50G-AUI1-C2C.

David: Remember the history......
Siddaraju: Thank you David for highlighting this. We are in alignment with
	you and we are following a strict process to review and gain as much as
	history and conventions especially when dealing with Ethernet. We are
	reaching to multiple folks internally and Vijay Srinivasan(also CC'ed)
	is one such key contributors for us.
	From SW point of view, we are reaching to our internal Linux mailing
	threads and finally coming here for final guidance.
	
Eric: what about AOC, ACC, AEC, etc..?
Siddaraju: that's next for us Eric. We will definitely keep this in mind
	especially while modelling these offloaders.

Maxime: there's ongoing work[1] to *support nics with multiple connectors..
Siddaraju: Thanks Maksim. We are exploring and evaluating this. Meanwhile, 
	hope the above C2C related details helps you make more finer
	recommendation and we hope to hear more.

- Thank you,
Siddaraju D H

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2026-07-14 13:29 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-07-10 21:45 Ethtool is missing C2C link modes D H, Siddaraju
2026-07-10 22:54 ` Andrew Lunn
2026-07-11  6:31   ` David Laight
2026-07-11  8:42     ` Maxime Chevallier
2026-07-14 13:29       ` D H, Siddaraju
2026-07-13 23:18 ` Eric Joyner

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