From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "peterx@redhat.com" <peterx@redhat.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Philippe Mathieu-Daudé" <philmd@mailo.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Troy Lee" <troy_lee@aspeedtech.com>,
"flwu@google.com" <flwu@google.com>,
"nabihestefan@google.com" <nabihestefan@google.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v7 06/10] hw/usb/hcd-ehci: Implement 64-bit siTD descriptor addressing
Date: Mon, 13 Jul 2026 03:27:14 +0000 [thread overview]
Message-ID: <20260713032704.3583103-7-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260713032704.3583103-1-jamin_lin@aspeedtech.com>
EHCI supports 64-bit control data structure addressing when the
64-bit Addressing Capability bit in HCCPARAMS is set. In that mode,
the CTRLDSSEGMENT register provides the upper 32 bits that are
concatenated with 32-bit link pointer values to form full 64-bit
descriptor addresses (EHCI 1.0, section 2.3.5 and Appendix B).
siTD link pointers are stored as 32-bit values and must be expanded
to full 64-bit descriptor addresses when 64-bit mode is enabled.
Update the siTD traversal path to use ehci_get_desc_addr() when
following link pointers.
When 64-bit capability is disabled, descriptor addresses remain
32-bit and existing behaviour is unchanged.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/usb/hcd-ehci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index 1a286c32e6..9a80c74972 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -1823,7 +1823,7 @@ static int ehci_state_fetchsitd(EHCIState *ehci, int async)
warn_report("Skipping active siTD");
}
- ehci_set_fetch_addr(ehci, async, sitd.next);
+ ehci_set_fetch_addr(ehci, async, ehci_get_desc_addr(ehci, sitd.next));
ehci_set_state(ehci, async, EST_FETCHENTRY);
return 1;
}
--
2.43.0
next prev parent reply other threads:[~2026-07-13 3:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 3:27 [PATCH v7 00/10] hw/usb/ehci: Add 64-bit descriptor addressing support Jamin Lin
2026-07-13 3:27 ` [PATCH v7 01/10] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit with migration compatibility Jamin Lin
2026-07-13 7:19 ` Philippe Mathieu-Daudé
2026-07-13 3:27 ` [PATCH v7 02/10] hw/usb/hcd-ehci: Add property to advertise 64-bit addressing capability Jamin Lin
2026-07-13 3:27 ` [PATCH v7 03/10] hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing Jamin Lin
2026-07-13 3:27 ` [PATCH v7 04/10] hw/usb/hcd-ehci: Implement 64-bit qTD " Jamin Lin
2026-07-13 3:27 ` [PATCH v7 05/10] hw/usb/hcd-ehci: Implement 64-bit iTD " Jamin Lin
2026-07-13 3:27 ` Jamin Lin [this message]
2026-07-13 3:27 ` [PATCH v7 07/10] hw/usb/hcd-ehci: Add ctrldssegment-default property Jamin Lin
2026-07-13 3:27 ` [PATCH v7 08/10] hw/arm/aspeed_ast27x0: Set EHCI ctrldssegment-default Jamin Lin
2026-07-13 3:27 ` [PATCH v7 09/10] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing Jamin Lin
2026-07-13 3:27 ` [PATCH v7 10/10] tests/functional/aarch64/test_aspeed_ast2700: Add USB EHCI test for AST2700 A1/A2 Jamin Lin
2026-07-14 12:18 ` [PATCH v7 00/10] hw/usb/ehci: Add 64-bit descriptor addressing support Cédric Le Goater
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