From: sashiko-bot@kernel.org
To: "Sneh Mankad" <sneh.mankad@oss.qualcomm.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 1/7] dt-bindings: interrupt-controller: mpm: Document power-domains property
Date: Mon, 13 Jul 2026 10:36:05 +0000 [thread overview]
Message-ID: <20260713103605.D6DF41F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260713-b4-shikra_lpm_addition-v1-1-3d858df2cbbf@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The commit incorrectly removes the `#power-domain-cells` provider property and replaces it with a consumer property (`power-domains`), breaking schema validation for existing device trees and misrepresenting the hardware architecture.
- [Low] The modified example code introduces an unresolved phandle (`&cluster_pd`), which causes `make dt_binding_check` to fail.
--
--- Patch [1]: [PATCH 1/7] dt-bindings: interrupt-controller: mpm: Document power-domains property ---
commit eb530c220bf421a5d64eb53cfa4eaaad646e6a1d
Author: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
dt-bindings: interrupt-controller: mpm: Document power-domains property
This commit removes the #power-domain-cells property and replaces it with a
power-domains property for the MPM device binding schema.
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml
> index ebb40c48950ab..3f9645fbc3c20 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml
[ ... ]
> @@ -68,8 +68,8 @@ properties:
> - description: MPM pin number
> - description: GIC SPI number for the MPM pin
>
> - '#power-domain-cells':
> - const: 0
> + power-domains:
> + maxItems: 1
[Severity: Medium]
Does this change accurately reflect the hardware architecture?
Looking at the driver implementation in drivers/irqchip/irq-qcom-mpm.c,
qcom_mpm_probe() registers a PM domain provider:
ret = of_genpd_add_provider_simple(np, genpd);
This driver natively implements a PM domain provider, which relies on the
#power-domain-cells property being present in the device tree.
Additionally, existing in-tree device trees (such as agatti.dtsi) currently
declare #power-domain-cells = <0>; in their mpm nodes. Removing this
provider property and replacing it with a consumer property will likely cause
dtbs_check to fail for those existing boards.
>
> required:
> - compatible
[ ... ]
> @@ -113,6 +113,6 @@ examples:
> <24 79>,
> <86 183>,
> <91 260>;
> - #power-domain-cells = <0>;
> + power-domains = <&cluster_pd>;
[Severity: Low]
Is the cluster_pd phandle defined in this example block?
Adding an unresolved phandle reference to the examples section typically
causes the dtc compiler to fail with a 'Reference to non-existent node
or label' error when running make dt_binding_check.
> };
> };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713-b4-shikra_lpm_addition-v1-0-3d858df2cbbf@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-07-13 10:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 10:25 [PATCH 0/7] Register MPM under CPU cluster power domain to manage RPM notification Sneh Mankad
2026-07-13 10:25 ` [PATCH 1/7] dt-bindings: interrupt-controller: mpm: Document power-domains property Sneh Mankad
2026-07-13 10:36 ` sashiko-bot [this message]
2026-07-13 11:26 ` Konrad Dybcio
2026-07-13 15:11 ` Marc Zyngier
2026-07-13 10:25 ` [PATCH 2/7] irqchip/irq-qcom-mpm: Register MPM under CPU cluster power domain Sneh Mankad
2026-07-13 10:41 ` sashiko-bot
2026-07-13 10:25 ` [PATCH 3/7] irqchip/irq-qcom-mpm: Prepare common access path for timer and pin regs Sneh Mankad
2026-07-13 10:39 ` sashiko-bot
2026-07-13 10:25 ` [PATCH 4/7] irqchip/irq-qcom-mpm: Program wakeup timer when CPU cluster goes to LPM Sneh Mankad
2026-07-13 10:38 ` sashiko-bot
2026-07-13 15:18 ` Marc Zyngier
2026-07-13 10:25 ` [PATCH 5/7] arm64: dts: qcom: sm6375: Make MPM device as part of CPU cluster domain Sneh Mankad
2026-07-13 10:40 ` sashiko-bot
2026-07-13 10:25 ` [PATCH 6/7] arm64: dts: qcom: agatti: Do not mark MPM as power domain Sneh Mankad
2026-07-13 10:39 ` sashiko-bot
2026-07-13 10:25 ` [PATCH 7/7] arm64: dts: qcom: shikra: Add CPU idle states Sneh Mankad
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260713103605.D6DF41F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=sneh.mankad@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.