From: sashiko-bot@kernel.org
To: "Jia Wang" <wangjia@ultrarisc.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 2/3] PCI: ultrarisc: get and enable DP1000 PCIe clocks
Date: Tue, 14 Jul 2026 01:18:36 +0000 [thread overview]
Message-ID: <20260714011836.9B6311F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260714-ultrarisc-pci-clk-v3-2-e72723fc0ef1@ultrarisc.com>
> From: Jia Wang <wangjia@ultrarisc.com>
>
> Add the required core, dbi, and aux clocks for the DP1000 PCIe
> controller and enable them before initializing the DesignWare host.
>
> Also manage the clocks across system suspend and resume.
>
> Fixes: 5fc35740c3b3 ("PCI: ultrarisc: Add UltraRISC DP1000 PCIe Root Complex driver")
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260714-ultrarisc-pci-clk-v3-0-e72723fc0ef1@ultrarisc.com?part=2
next prev parent reply other threads:[~2026-07-14 1:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-14 1:11 [PATCH v3 0/3] PCI: ultrarisc: Add DP1000 PCIe clock support Jia Wang via B4 Relay
2026-07-14 1:11 ` Jia Wang
2026-07-14 1:11 ` [PATCH v3 1/3] dt-bindings: pci: ultrarisc: add required DP1000 PCIe clocks Jia Wang via B4 Relay
2026-07-14 1:11 ` Jia Wang
2026-07-14 1:24 ` sashiko-bot
2026-07-14 1:11 ` [PATCH v3 2/3] PCI: ultrarisc: get and enable " Jia Wang via B4 Relay
2026-07-14 1:11 ` Jia Wang
2026-07-14 1:18 ` sashiko-bot [this message]
2026-07-14 1:11 ` [PATCH v3 3/3] PCI: ultrarisc: allow DP1000 driver to build as module Jia Wang via B4 Relay
2026-07-14 1:11 ` Jia Wang
2026-07-14 1:15 ` sashiko-bot
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