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From: Chen Pei <cp0613@linux.alibaba.com>
To: Zong Li <zong.li@sifive.com>
Cc: tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org,
	robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, mark.rutland@arm.com,
	andrew.jones@oss.qualcomm.com, guoren@kernel.org,
	david.laight.linux@gmail.com, zhangzhanpeng.jasper@bytedance.com,
	iommu@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v4 0/2] RISC-V IOMMU HPM support
Date: Tue, 14 Jul 2026 20:50:47 +0800	[thread overview]
Message-ID: <20260714125055.1974-1-cp0613@linux.alibaba.com> (raw)
In-Reply-To: <20260714083625.1083606-1-zong.li@sifive.com>

On Tue, Jul 14, 2026 at 01:36:20AM -0700, Zong Li wrote:
> This series implements support for the RISC-V IOMMU hardware performance
> monitor.
>
> The RISC-V IOMMU PMU driver is implemented as an auxiliary device driver
> created by the parent RISC-V IOMMU driver. Therefore, the child driver
> can obtain resources and information from the parent device, such as
> the MMIO base address and IRQ number.

I tested this series on QEMU and it works as expected.

Test setup:
 - Base: v7.2-rc2, both patches applied cleanly.
 - Kernel: rv64 defconfig with CONFIG_RISCV_IOMMU=y, CONFIG_RISCV_IOMMU_PCI=y,
   CONFIG_RISCV_IOMMU_PMU=y and CONFIG_PERF_EVENTS=y.
 - QEMU 10.2.0: -M virt,aia=aplic-imsic -device riscv-iommu-pci
   (hpm-counters=31).

Results:
 - The RISC-V IOMMU probes, the auxiliary device is created and the PMU
   driver registers successfully:
     riscv_iommu_pmu ...: Registered with 32 counters
 - The PMU shows up under
   /sys/bus/event_source/devices/riscv_iommu_pmu_<BDF> with the expected
   9 events (cycle, untranslated_req, translated_req, ats_trans_req,
   tlb_miss, dd_walk, pd_walk, s_vs_pt_walks, g_pt_walks) and 7 format
   attributes; "perf list" enumerates all of them.
 - No oops/WARN/KASAN splat during boot or driver bring-up.

Tested-by: Chen Pei <cp0613@linux.alibaba.com>

Thanks,
Pei


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Chen Pei <cp0613@linux.alibaba.com>
To: Zong Li <zong.li@sifive.com>
Cc: tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org,
	robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, mark.rutland@arm.com,
	andrew.jones@oss.qualcomm.com, guoren@kernel.org,
	david.laight.linux@gmail.com, zhangzhanpeng.jasper@bytedance.com,
	iommu@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v4 0/2] RISC-V IOMMU HPM support
Date: Tue, 14 Jul 2026 20:50:47 +0800	[thread overview]
Message-ID: <20260714125055.1974-1-cp0613@linux.alibaba.com> (raw)
In-Reply-To: <20260714083625.1083606-1-zong.li@sifive.com>

On Tue, Jul 14, 2026 at 01:36:20AM -0700, Zong Li wrote:
> This series implements support for the RISC-V IOMMU hardware performance
> monitor.
>
> The RISC-V IOMMU PMU driver is implemented as an auxiliary device driver
> created by the parent RISC-V IOMMU driver. Therefore, the child driver
> can obtain resources and information from the parent device, such as
> the MMIO base address and IRQ number.

I tested this series on QEMU and it works as expected.

Test setup:
 - Base: v7.2-rc2, both patches applied cleanly.
 - Kernel: rv64 defconfig with CONFIG_RISCV_IOMMU=y, CONFIG_RISCV_IOMMU_PCI=y,
   CONFIG_RISCV_IOMMU_PMU=y and CONFIG_PERF_EVENTS=y.
 - QEMU 10.2.0: -M virt,aia=aplic-imsic -device riscv-iommu-pci
   (hpm-counters=31).

Results:
 - The RISC-V IOMMU probes, the auxiliary device is created and the PMU
   driver registers successfully:
     riscv_iommu_pmu ...: Registered with 32 counters
 - The PMU shows up under
   /sys/bus/event_source/devices/riscv_iommu_pmu_<BDF> with the expected
   9 events (cycle, untranslated_req, translated_req, ats_trans_req,
   tlb_miss, dd_walk, pd_walk, s_vs_pt_walks, g_pt_walks) and 7 format
   attributes; "perf list" enumerates all of them.
 - No oops/WARN/KASAN splat during boot or driver bring-up.

Tested-by: Chen Pei <cp0613@linux.alibaba.com>

Thanks,
Pei


  parent reply	other threads:[~2026-07-14 12:51 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-14  8:36 [PATCH v4 0/2] RISC-V IOMMU HPM support Zong Li
2026-07-14  8:36 ` Zong Li
2026-07-14  8:36 ` [PATCH v4 1/2] drivers/perf: riscv-iommu: add risc-v iommu pmu driver Zong Li
2026-07-14  8:36   ` Zong Li
2026-07-14  8:53   ` sashiko-bot
2026-07-14 11:22   ` Guo Ren
2026-07-14 11:22     ` Guo Ren
2026-07-14  8:36 ` [PATCH v4 2/2] iommu/riscv: create a auxiliary device for HPM Zong Li
2026-07-14  8:36   ` Zong Li
2026-07-14  9:03   ` sashiko-bot
2026-07-14 12:50 ` Chen Pei [this message]
2026-07-14 12:50   ` [PATCH v4 0/2] RISC-V IOMMU HPM support Chen Pei
2026-07-14 13:13 ` fangyu.yu
2026-07-14 13:13   ` fangyu.yu

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