From: sashiko-bot@kernel.org
To: "Sebastian Reichel" <sebastian.reichel@collabora.com>
Cc: robh@kernel.org, vkoul@kernel.org, neil.armstrong@linaro.org,
conor+dt@kernel.org, olteanv@gmail.com,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v13 25/35] phy: rockchip: usbdp: Avoid xHCI SErrors
Date: Tue, 14 Jul 2026 20:11:46 +0000 [thread overview]
Message-ID: <20260714201147.2CD381F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260714-rockchip-usbdp-cleanup-v13-25-6cb3e769d4c5@collabora.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] The initial setup path for `UDPHY_MODE_NONE` incorrectly re-enables the USB3 port when the device only supports high-speed (`udphy->hs == true`), overriding intentional configuration.
- [High] The driver relies on the dynamically mutating `udphy->mode` to filter PHY power-off requests, which can permanently leak enabled clocks if the Type-C mode changes between power-on and power-off.
--
--- Patch [25]: [PATCH v13 25/35] phy: rockchip: usbdp: Avoid xHCI SErrors ---
commit c94fbaf2a245e81d949d0da907a2acb799ce1846
Author: Sebastian Reichel <sebastian.reichel@collabora.com>
phy: rockchip: usbdp: Avoid xHCI SErrors
The USBDP PHY provides the PIPE clock to the USB3 controller, which
means the PHY must be fully running when anything tries to access
the xHCI registers.
> diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> index fba35510d88ce..c7f09040185b6 100644
> --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
> +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> @@ -1000,23 +992,24 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode)
> }
>
> if (udphy->status == UDPHY_MODE_NONE) {
> - udphy->mode_change = false;
> ret = rk_udphy_setup(udphy);
> if (ret)
> return ret;
>
> if (udphy->mode & UDPHY_MODE_USB)
> rk_udphy_u3_port_disable(udphy, false);
[Severity: High]
This isn't a bug introduced by this patch, but should the check above also
verify !udphy->hs?
When the PHY is configured for high-speed only, rk_udphy_usb3_phy_init()
intentionally disables the USB3 port. If DP is later initialized and enters
this udphy->status == UDPHY_MODE_NONE branch, it appears the USB3 port will be
unconditionally re-enabled, overriding the explicit high-speed configuration.
You added the !udphy->hs check to the re-init branch below, which prevents
this issue there. Does the initial setup branch need the same check?
> - } else if (udphy->mode_change) {
> - udphy->mode_change = false;
> - udphy->status = UDPHY_MODE_NONE;
> - if (udphy->mode == UDPHY_MODE_DP)
> - rk_udphy_u3_port_disable(udphy, true);
> + udphy->phy_needs_reinit = false;
> + } else if (udphy->phy_needs_reinit) {
> + rk_udphy_u3_port_disable(udphy, true);
> + udelay(10);
>
> - rk_udphy_disable(udphy);
> - ret = rk_udphy_setup(udphy);
> + ret = rk_udphy_init(udphy);
> if (ret)
> return ret;
> +
> + if (!udphy->hs && udphy->mode & UDPHY_MODE_USB)
> + rk_udphy_u3_port_disable(udphy, false);
> + udphy->phy_needs_reinit = false;
> }
>
> udphy->status |= mode;
[ ... ]
> @@ -1303,35 +1274,30 @@ static const struct phy_ops rk_udphy_dp_phy_ops = {
> static int rk_udphy_usb3_phy_init(struct phy *phy)
> {
> struct rk_udphy *udphy = phy_get_drvdata(phy);
> - int ret = 0;
>
> - mutex_lock(&udphy->mutex);
> + guard(mutex)(&udphy->mutex);
> +
> /* DP only or high-speed, disable U3 port */
> if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) {
> rk_udphy_u3_port_disable(udphy, true);
> - goto unlock;
> + return 0;
> }
>
> - ret = rk_udphy_power_on(udphy, UDPHY_MODE_USB);
> -
> -unlock:
> - mutex_unlock(&udphy->mutex);
> - return ret;
> + return rk_udphy_power_on(udphy, UDPHY_MODE_USB);
> }
>
> static int rk_udphy_usb3_phy_exit(struct phy *phy)
> {
> struct rk_udphy *udphy = phy_get_drvdata(phy);
>
> - mutex_lock(&udphy->mutex);
> + guard(mutex)(&udphy->mutex);
> +
> /* DP only or high-speed */
> if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs)
> - goto unlock;
> + return 0;
[Severity: High]
This is a pre-existing issue, but does evaluating the dynamically mutable
udphy->mode here risk leaking resources?
If a Type-C mux event changes udphy->mode (e.g., switching from USB+DP to
DP-only) while the PHY is active, udphy->mode & UDPHY_MODE_USB will become
false.
When the USB framework later powers off the PHY, this check will abort the
exit early. The USB bit in udphy->status will remain set permanently, and
rk_udphy_power_off() will never fully disable the PHY and its clocks.
Should this instead check the software power state (udphy->status) rather
than the requested hardware mode?
>
> rk_udphy_power_off(udphy, UDPHY_MODE_USB);
>
> -unlock:
> - mutex_unlock(&udphy->mutex);
> return 0;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260714-rockchip-usbdp-cleanup-v13-0-6cb3e769d4c5@collabora.com?part=25
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Sebastian Reichel" <sebastian.reichel@collabora.com>
Cc: robh@kernel.org, vkoul@kernel.org, neil.armstrong@linaro.org,
conor+dt@kernel.org, olteanv@gmail.com,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v13 25/35] phy: rockchip: usbdp: Avoid xHCI SErrors
Date: Tue, 14 Jul 2026 20:11:46 +0000 [thread overview]
Message-ID: <20260714201147.2CD381F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260714-rockchip-usbdp-cleanup-v13-25-6cb3e769d4c5@collabora.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] The initial setup path for `UDPHY_MODE_NONE` incorrectly re-enables the USB3 port when the device only supports high-speed (`udphy->hs == true`), overriding intentional configuration.
- [High] The driver relies on the dynamically mutating `udphy->mode` to filter PHY power-off requests, which can permanently leak enabled clocks if the Type-C mode changes between power-on and power-off.
--
--- Patch [25]: [PATCH v13 25/35] phy: rockchip: usbdp: Avoid xHCI SErrors ---
commit c94fbaf2a245e81d949d0da907a2acb799ce1846
Author: Sebastian Reichel <sebastian.reichel@collabora.com>
phy: rockchip: usbdp: Avoid xHCI SErrors
The USBDP PHY provides the PIPE clock to the USB3 controller, which
means the PHY must be fully running when anything tries to access
the xHCI registers.
> diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> index fba35510d88ce..c7f09040185b6 100644
> --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
> +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> @@ -1000,23 +992,24 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode)
> }
>
> if (udphy->status == UDPHY_MODE_NONE) {
> - udphy->mode_change = false;
> ret = rk_udphy_setup(udphy);
> if (ret)
> return ret;
>
> if (udphy->mode & UDPHY_MODE_USB)
> rk_udphy_u3_port_disable(udphy, false);
[Severity: High]
This isn't a bug introduced by this patch, but should the check above also
verify !udphy->hs?
When the PHY is configured for high-speed only, rk_udphy_usb3_phy_init()
intentionally disables the USB3 port. If DP is later initialized and enters
this udphy->status == UDPHY_MODE_NONE branch, it appears the USB3 port will be
unconditionally re-enabled, overriding the explicit high-speed configuration.
You added the !udphy->hs check to the re-init branch below, which prevents
this issue there. Does the initial setup branch need the same check?
> - } else if (udphy->mode_change) {
> - udphy->mode_change = false;
> - udphy->status = UDPHY_MODE_NONE;
> - if (udphy->mode == UDPHY_MODE_DP)
> - rk_udphy_u3_port_disable(udphy, true);
> + udphy->phy_needs_reinit = false;
> + } else if (udphy->phy_needs_reinit) {
> + rk_udphy_u3_port_disable(udphy, true);
> + udelay(10);
>
> - rk_udphy_disable(udphy);
> - ret = rk_udphy_setup(udphy);
> + ret = rk_udphy_init(udphy);
> if (ret)
> return ret;
> +
> + if (!udphy->hs && udphy->mode & UDPHY_MODE_USB)
> + rk_udphy_u3_port_disable(udphy, false);
> + udphy->phy_needs_reinit = false;
> }
>
> udphy->status |= mode;
[ ... ]
> @@ -1303,35 +1274,30 @@ static const struct phy_ops rk_udphy_dp_phy_ops = {
> static int rk_udphy_usb3_phy_init(struct phy *phy)
> {
> struct rk_udphy *udphy = phy_get_drvdata(phy);
> - int ret = 0;
>
> - mutex_lock(&udphy->mutex);
> + guard(mutex)(&udphy->mutex);
> +
> /* DP only or high-speed, disable U3 port */
> if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) {
> rk_udphy_u3_port_disable(udphy, true);
> - goto unlock;
> + return 0;
> }
>
> - ret = rk_udphy_power_on(udphy, UDPHY_MODE_USB);
> -
> -unlock:
> - mutex_unlock(&udphy->mutex);
> - return ret;
> + return rk_udphy_power_on(udphy, UDPHY_MODE_USB);
> }
>
> static int rk_udphy_usb3_phy_exit(struct phy *phy)
> {
> struct rk_udphy *udphy = phy_get_drvdata(phy);
>
> - mutex_lock(&udphy->mutex);
> + guard(mutex)(&udphy->mutex);
> +
> /* DP only or high-speed */
> if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs)
> - goto unlock;
> + return 0;
[Severity: High]
This is a pre-existing issue, but does evaluating the dynamically mutable
udphy->mode here risk leaking resources?
If a Type-C mux event changes udphy->mode (e.g., switching from USB+DP to
DP-only) while the PHY is active, udphy->mode & UDPHY_MODE_USB will become
false.
When the USB framework later powers off the PHY, this check will abort the
exit early. The USB bit in udphy->status will remain set permanently, and
rk_udphy_power_off() will never fully disable the PHY and its clocks.
Should this instead check the software power state (udphy->status) rather
than the requested hardware mode?
>
> rk_udphy_power_off(udphy, UDPHY_MODE_USB);
>
> -unlock:
> - mutex_unlock(&udphy->mutex);
> return 0;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260714-rockchip-usbdp-cleanup-v13-0-6cb3e769d4c5@collabora.com?part=25
next prev parent reply other threads:[~2026-07-14 20:11 UTC|newest]
Thread overview: 146+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-14 19:26 [PATCH v13 00/35] phy: rockchip: usbdp: Clean up the mess Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 01/35] dt-bindings: phy: rockchip-usbdp: add improved ports scheme Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 02/35] phy: rockchip: usbdp: Update mode_change after error handling Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:54 ` sashiko-bot
2026-07-14 19:54 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 03/35] phy: rockchip: usbdp: Do not lose USB3 PHY status Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:49 ` sashiko-bot
2026-07-14 19:49 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 04/35] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:48 ` sashiko-bot
2026-07-14 19:48 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 05/35] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:00 ` sashiko-bot
2026-07-14 20:00 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 06/35] phy: rockchip: usbdp: Drop seamless DP takeover Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:01 ` sashiko-bot
2026-07-14 20:01 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 07/35] phy: rockchip: usbdp: Keep clocks running on PHY re-init Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:47 ` sashiko-bot
2026-07-14 19:47 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 08/35] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 09/35] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 10/35] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:49 ` sashiko-bot
2026-07-14 19:49 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 11/35] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 12/35] phy: rockchip: usbdp: Limit DP lane count to muxed lanes Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:11 ` sashiko-bot
2026-07-14 20:11 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 13/35] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 14/35] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 15/35] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 16/35] phy: rockchip: usbdp: Register DP aux bridge Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 17/35] phy: rockchip: usbdp: Drop DP HPD handling Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:03 ` sashiko-bot
2026-07-14 20:03 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 18/35] phy: rockchip: usbdp: Rename mode_change to phy_needs_reinit Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:58 ` sashiko-bot
2026-07-14 19:58 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 19/35] phy: rockchip: usbdp: Re-init the PHY on orientation change Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:09 ` sashiko-bot
2026-07-14 20:09 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 20/35] phy: rockchip: usbdp: Factor out lane_mux_sel setup Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:03 ` sashiko-bot
2026-07-14 20:03 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 21/35] phy: rockchip: usbdp: Properly handle TYPEC_STATE_SAFE and TYPEC_STATE_USB Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:22 ` sashiko-bot
2026-07-14 20:22 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 22/35] phy: rockchip: usbdp: Use guard functions for mutex Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 23/35] phy: rockchip: usbdp: Hold mutex in DP PHY configure Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 24/35] phy: rockchip: usbdp: Add some extra debug messages Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 25/35] phy: rockchip: usbdp: Avoid xHCI SErrors Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:11 ` sashiko-bot [this message]
2026-07-14 20:11 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 26/35] phy: rockchip: usbdp: Handle rk_udphy_reset_deassert errors Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 27/35] phy: rockchip: usbdp: Only enable USB3 when not in high-speed mode Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:15 ` sashiko-bot
2026-07-14 20:15 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 28/35] phy: core: add notifier infrastructure Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:10 ` sashiko-bot
2026-07-14 20:10 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 29/35] usb: dwc3: core: support PHY reset notifications Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:15 ` sashiko-bot
2026-07-14 20:15 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 30/35] phy: rockchip: usbdp: Add phy reset notification support Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 31/35] phy: rockchip: usbdp: Drop -EPROBE_DEFER hack Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 32/35] phy: rockchip: usbdp: Rename mode to hw_mode Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:18 ` sashiko-bot
2026-07-14 20:18 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 33/35] phy: rockchip: usbdp: Fix power state handling Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` [PATCH v13 34/35] phy: rockchip: usbdp: Re-init PHY on mux change Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 20:39 ` sashiko-bot
2026-07-14 20:39 ` sashiko-bot
2026-07-14 19:26 ` [PATCH v13 35/35] phy: rockchip: usbdp: Add USB-C state without DP enabled Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
2026-07-14 19:26 ` Sebastian Reichel
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