From: sashiko-bot@kernel.org
To: "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com>
Cc: robh@kernel.org, conor+dt@kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v6 05/11] drm/mediatek: mtk_dsi: Enable interrupt at component bind time
Date: Wed, 15 Jul 2026 14:29:39 +0000 [thread overview]
Message-ID: <20260715142939.DCC281F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260715135703.46540-6-angelogioacchino.delregno@collabora.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] Data race on `dsi->irq_data` between process context and hardirq context can cause false positive interrupt completions.
- [High] Unbounded hardware polling loop in hardirq handler can lock up the CPU.
--
--- Patch [5]: [PATCH v6 05/11] drm/mediatek: mtk_dsi: Enable interrupt at component bind time ---
commit 869a346c570d4022e4d54a10b57fcff068a735b6
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
drm/mediatek: mtk_dsi: Enable interrupt at component bind time
Having the DSI interrupt enabled before actually binding the DSI
component to the display controller driver is both useless and dangerous.
This commit fixes this by requesting the interrupt with IRQF_NO_AUTOEN,
and enabling it only when binding DSI to its display controller component.
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index e4a156a474e08..070d7d555bdbe 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -225,6 +225,7 @@ struct mtk_dsi {
> int refcount;
> bool enabled;
> bool lanes_ready;
> + int irq;
> u32 irq_data;
[Severity: High]
This isn't a bug introduced by this patch, but can the data race on
dsi->irq_data between process context and hardirq context cause false positive
interrupt completions?
The dsi->irq_data variable is modified locklessly using read-modify-write
operations:
drivers/gpu/drm/mediatek/mtk_dsi.c:mtk_dsi_irq_data_clear() {
...
dsi->irq_data &= ~irq_bit;
...
}
drivers/gpu/drm/mediatek/mtk_dsi.c:mtk_dsi_irq_data_set() {
...
dsi->irq_data |= irq_bit;
...
}
If a delayed interrupt sets a flag while a process on another CPU is clearing
a different flag for a new command, the process's clear operation can be lost
if the interrupt handler overwrites it.
The previously cleared flag remains set, causing mtk_dsi_wait_for_irq_done()
to falsely return success.
> wait_queue_head_t irq_wait_queue;
> const struct mtk_dsi_driver_data *driver_data;
> };
[ ... ]
> @@ -1381,17 +1385,15 @@ static int mtk_dsi_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, dsi);
>
> + ret = devm_request_irq(&pdev->dev, dsi->irq, mtk_dsi_irq,
> + IRQF_NO_AUTOEN, dev_name(&pdev->dev), dsi);
[Severity: High]
This isn't a bug introduced by this patch, but could the unbounded hardware
polling loop in the mtk_dsi_irq() hardirq handler lock up the CPU?
The mtk_dsi_irq() function runs in hardirq context and uses an unbounded loop
to wait for the hardware:
drivers/gpu/drm/mediatek/mtk_dsi.c:mtk_dsi_irq() {
...
do {
mtk_dsi_mask(dsi, DSI_RACK, RACK, RACK);
tmp = readl(dsi->regs + DSI_INTSTA);
} while (tmp & DSI_BUSY);
...
}
If the DSI hardware hangs, loses its clock, or DSI_BUSY never clears for any
other reason, the loop never terminates, which will permanently hang the CPU.
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret, "Failed to request DSI irq\n");
> +
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260715135703.46540-1-angelogioacchino.delregno@collabora.com?part=5
next prev parent reply other threads:[~2026-07-15 14:29 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 13:56 [PATCH v6 00/11] drm/mediatek: Add DSC, WDMA, MT8189/96 DSI support AngeloGioacchino Del Regno
2026-07-15 13:56 ` [PATCH v6 01/11] dt-bindings: display: mediatek: dsc: Add MT8196 compatible AngeloGioacchino Del Regno
2026-07-15 13:56 ` [PATCH v6 02/11] drm/mediatek: Implement Display Stream Compression support AngeloGioacchino Del Regno
2026-07-15 14:09 ` sashiko-bot
2026-07-15 13:56 ` [PATCH v6 03/11] dt-bindings: display: mediatek: dsi: Document MT8189 and MT8196 AngeloGioacchino Del Regno
2026-07-15 13:56 ` [PATCH v6 04/11] drm/mediatek: mtk_dsi: Cleanup encoder if reset fails during bind AngeloGioacchino Del Regno
2026-07-15 14:25 ` sashiko-bot
2026-07-15 13:56 ` [PATCH v6 05/11] drm/mediatek: mtk_dsi: Enable interrupt at component bind time AngeloGioacchino Del Regno
2026-07-15 14:29 ` sashiko-bot [this message]
2026-07-15 13:56 ` [PATCH v6 06/11] drm/mediatek: mtk_dsi: Transfer register offsets to per-SoC const AngeloGioacchino Del Regno
2026-07-15 13:56 ` [PATCH v6 07/11] drm/mediatek: mtk_dsi: Add support for MT8189 AngeloGioacchino Del Regno
2026-07-15 14:40 ` sashiko-bot
2026-07-15 13:57 ` [PATCH v6 08/11] drm/mediatek: mtk_dsi: Add support for MT8196 AngeloGioacchino Del Regno
2026-07-15 14:51 ` sashiko-bot
2026-07-15 13:57 ` [PATCH v6 09/11] drm/mediatek: mtk_dsi: Enable PM Runtime on probe AngeloGioacchino Del Regno
2026-07-15 15:24 ` sashiko-bot
2026-07-15 13:57 ` [PATCH v6 10/11] dt-bindings: display: mediatek: wdma: Add compatibles for more SoCs AngeloGioacchino Del Regno
2026-07-15 13:57 ` [PATCH v6 11/11] drm/mediatek: Add Write DMA (WDMA) Engine for Writeback support AngeloGioacchino Del Regno
2026-07-15 15:24 ` sashiko-bot
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