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* [PATCH 0/2] drm/xe/nvm: add survivabilty partiton
@ 2026-07-15 13:45 ` Alexander Usyskin
  0 siblings, 0 replies; 10+ messages in thread
From: Alexander Usyskin @ 2026-07-15 13:45 UTC (permalink / raw)
  To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Matthew Brost, Thomas Hellström, Rodrigo Vivi, David Airlie,
	Simona Vetter
  Cc: linux-mtd, linux-kernel, intel-xe, dri-devel, Alexander Usyskin

One of the reasons for the CRI to enter survivability mode
is corrupted storage.
A corrupted storage partition table can make recovery impossible.
A new partition with a pre-defined size, covering the entire storage,
should be added when the card is in survivability mode to allow a full
memory update.

This series intended to be merged via drm tree for consistency
and requires ack from MTD maintainer.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
Alexander Usyskin (2):
      mtd: mtd_intel_dg: add survivability partition
      drm/xe/nvm: define survivabilty partition

 drivers/gpu/drm/xe/xe_nvm.c        | 13 +++++--
 drivers/mtd/devices/mtd_intel_dg.c | 80 +++++++++++++++++++++++++++-----------
 include/linux/intel_dg_nvm_aux.h   |  1 +
 3 files changed, 69 insertions(+), 25 deletions(-)
---
base-commit: acc744fa62fb098358f371bfb38e6b32032459c7
change-id: 20260715-cri_surviv-5a6faf7586f1

Best regards,
-- 
Alexander Usyskin <alexander.usyskin@intel.com>


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [PATCH 0/2] drm/xe/nvm: add survivabilty partiton
@ 2026-07-15 13:45 ` Alexander Usyskin
  0 siblings, 0 replies; 10+ messages in thread
From: Alexander Usyskin @ 2026-07-15 13:45 UTC (permalink / raw)
  To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Matthew Brost, Thomas Hellström, Rodrigo Vivi, David Airlie,
	Simona Vetter
  Cc: linux-mtd, linux-kernel, intel-xe, dri-devel, Alexander Usyskin

One of the reasons for the CRI to enter survivability mode
is corrupted storage.
A corrupted storage partition table can make recovery impossible.
A new partition with a pre-defined size, covering the entire storage,
should be added when the card is in survivability mode to allow a full
memory update.

This series intended to be merged via drm tree for consistency
and requires ack from MTD maintainer.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
Alexander Usyskin (2):
      mtd: mtd_intel_dg: add survivability partition
      drm/xe/nvm: define survivabilty partition

 drivers/gpu/drm/xe/xe_nvm.c        | 13 +++++--
 drivers/mtd/devices/mtd_intel_dg.c | 80 +++++++++++++++++++++++++++-----------
 include/linux/intel_dg_nvm_aux.h   |  1 +
 3 files changed, 69 insertions(+), 25 deletions(-)
---
base-commit: acc744fa62fb098358f371bfb38e6b32032459c7
change-id: 20260715-cri_surviv-5a6faf7586f1

Best regards,
-- 
Alexander Usyskin <alexander.usyskin@intel.com>


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 10+ messages in thread
* [PATCH 1/2] mtd: mtd_intel_dg: add survivability partition
  2026-07-15 13:45 ` Alexander Usyskin
@ 2026-07-15 13:45   ` Alexander Usyskin
  -1 siblings, 0 replies; 10+ messages in thread
From: Alexander Usyskin @ 2026-07-15 13:45 UTC (permalink / raw)
  To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Matthew Brost, Thomas Hellström, Rodrigo Vivi, David Airlie,
	Simona Vetter
  Cc: linux-mtd, linux-kernel, intel-xe, dri-devel, Alexander Usyskin

Add option to expose additional fixed-sized partition starting
from the beginning of storage.
Xe driver can request this partition exposure if firmware or hardware
have detected failure that may involve corrupted partition table.
Fixed-sized partition allows full storage re-write in this situation.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
 drivers/mtd/devices/mtd_intel_dg.c | 80 +++++++++++++++++++++++++++-----------
 include/linux/intel_dg_nvm_aux.h   |  1 +
 2 files changed, 59 insertions(+), 22 deletions(-)

diff --git a/drivers/mtd/devices/mtd_intel_dg.c b/drivers/mtd/devices/mtd_intel_dg.c
index f2fa8f68d190..d11ddc687c4a 100644
--- a/drivers/mtd/devices/mtd_intel_dg.c
+++ b/drivers/mtd/devices/mtd_intel_dg.c
@@ -31,6 +31,7 @@ struct intel_dg_nvm {
 	void __iomem *base;
 	void __iomem *base2;
 	bool non_posted_erase;
+	bool survivability_enabled;
 
 	size_t size;
 	unsigned int nregions;
@@ -205,6 +206,13 @@ static unsigned int idg_nvm_get_region(const struct intel_dg_nvm *nvm, loff_t fr
 {
 	unsigned int i;
 
+	/*
+	 * When survivability region is enabled it positioned on index 0 and has region_id = 0
+	 * Region 0 is special, via this region whole device memory can be accessed.
+	 */
+	if (nvm->survivability_enabled)
+		return 0;
+
 	for (i = 0; i < nvm->nregions; i++) {
 		if ((nvm->regions[i].offset + nvm->regions[i].size - 1) >= from &&
 		    nvm->regions[i].offset <= from &&
@@ -443,32 +451,39 @@ static int intel_dg_nvm_init(struct intel_dg_nvm *nvm, struct device *device,
 		u32 address, base, limit, region;
 		u8 id = nvm->regions[i].id;
 
-		address = NVM_FLREG(id);
-		region = idg_nvm_read32(nvm, address);
+		if (nvm->regions[i].size) { /* pre-defined survivability region */
+			limit = nvm->regions[i].offset + nvm->regions[i].size - 1;
 
-		base = FIELD_GET(NVM_FREG_BASE_MASK, region) << NVM_FREG_ADDR_SHIFT;
-		limit = (FIELD_GET(NVM_FREG_ADDR_MASK, region) << NVM_FREG_ADDR_SHIFT) |
-			NVM_FREG_MIN_REGION_SIZE;
+			if (nvm->size < limit)
+				nvm->size = limit;
+		} else {
+			address = NVM_FLREG(id);
+			region = idg_nvm_read32(nvm, address);
 
-		dev_dbg(device, "[%d] %s: region: 0x%08X base: 0x%08x limit: 0x%08x\n",
-			id, nvm->regions[i].name, region, base, limit);
+			base = FIELD_GET(NVM_FREG_BASE_MASK, region) << NVM_FREG_ADDR_SHIFT;
+			limit = (FIELD_GET(NVM_FREG_ADDR_MASK, region) << NVM_FREG_ADDR_SHIFT) |
+				NVM_FREG_MIN_REGION_SIZE;
 
-		if (base >= limit || (i > 0 && limit == 0)) {
-			dev_dbg(device, "[%d] %s: disabled\n",
-				id, nvm->regions[i].name);
-			nvm->regions[i].is_readable = 0;
-			continue;
-		}
+			dev_dbg(device, "[%d] %s: region: 0x%08X base: 0x%08x limit: 0x%08x\n",
+				id, nvm->regions[i].name, region, base, limit);
 
-		if (nvm->size < limit)
-			nvm->size = limit;
+			if (base >= limit || (i > 0 && limit == 0)) {
+				dev_dbg(device, "[%d] %s: disabled\n",
+					id, nvm->regions[i].name);
+				nvm->regions[i].is_readable = 0;
+				continue;
+			}
 
-		nvm->regions[i].offset = base;
-		nvm->regions[i].size = limit - base + 1;
-		/* No write access to descriptor; mask it out*/
-		nvm->regions[i].is_writable = idg_nvm_region_writable(access_map, id);
+			if (nvm->size < limit)
+				nvm->size = limit;
 
-		nvm->regions[i].is_readable = idg_nvm_region_readable(access_map, id);
+			nvm->regions[i].offset = base;
+			nvm->regions[i].size = limit - base + 1;
+			/* No write access to descriptor; mask it out*/
+			nvm->regions[i].is_writable = idg_nvm_region_writable(access_map, id);
+
+			nvm->regions[i].is_readable = idg_nvm_region_readable(access_map, id);
+		}
 		dev_dbg(device, "Registered, %s id=%d offset=%lld size=%lld rd=%d wr=%d\n",
 			nvm->regions[i].name,
 			nvm->regions[i].id,
@@ -748,7 +763,7 @@ static int intel_dg_mtd_probe(struct auxiliary_device *aux_dev,
 	struct intel_dg_nvm *nvm;
 	struct device *device;
 	unsigned int nregions;
-	unsigned int i, n;
+	unsigned int i, n = 0;
 	int ret;
 
 	device = &aux_dev->dev;
@@ -764,6 +779,9 @@ static int intel_dg_mtd_probe(struct auxiliary_device *aux_dev,
 		return -ENODEV;
 	}
 
+	if (invm->survivability_size)
+		nregions++;
+
 	nvm = kzalloc_flex(*nvm, regions, nregions);
 	if (!nvm)
 		return -ENOMEM;
@@ -771,8 +789,26 @@ static int intel_dg_mtd_probe(struct auxiliary_device *aux_dev,
 	kref_init(&nvm->refcnt);
 	mutex_init(&nvm->lock);
 	nvm->nregions = nregions;
+	nvm->survivability_enabled = !!invm->survivability_size;
+
+	if (invm->survivability_size) { /* this partition should be at idx 0 */
+		char *name = kasprintf(GFP_KERNEL, "%s.%s",
+				       dev_name(&aux_dev->dev), "DATA");
+		if (!name) {
+			ret = -ENOMEM;
+			goto err_norpm;
+		}
+
+		nvm->regions[n].name = name;
+		nvm->regions[n].id = 0;
+		nvm->regions[n].offset  = 0;
+		nvm->regions[n].size = invm->survivability_size;
+		nvm->regions[n].is_readable = true;
+		nvm->regions[n].is_writable = true;
+		n++;
+	}
 
-	for (n = 0, i = 0; i < INTEL_DG_NVM_REGIONS; i++) {
+	for (i = 0; i < INTEL_DG_NVM_REGIONS; i++) {
 		if (!invm->regions[i].name)
 			continue;
 
diff --git a/include/linux/intel_dg_nvm_aux.h b/include/linux/intel_dg_nvm_aux.h
index 625d46a6b96e..84b5b6e0c4ea 100644
--- a/include/linux/intel_dg_nvm_aux.h
+++ b/include/linux/intel_dg_nvm_aux.h
@@ -21,6 +21,7 @@ struct intel_dg_nvm_dev {
 	struct auxiliary_device aux_dev;
 	bool writable_override;
 	bool non_posted_erase;
+	size_t survivability_size;
 	struct resource bar;
 	struct resource bar2;
 	const struct intel_dg_nvm_region *regions;

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 1/2] mtd: mtd_intel_dg: add survivability partition
@ 2026-07-15 13:45   ` Alexander Usyskin
  0 siblings, 0 replies; 10+ messages in thread
From: Alexander Usyskin @ 2026-07-15 13:45 UTC (permalink / raw)
  To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Matthew Brost, Thomas Hellström, Rodrigo Vivi, David Airlie,
	Simona Vetter
  Cc: linux-mtd, linux-kernel, intel-xe, dri-devel, Alexander Usyskin

Add option to expose additional fixed-sized partition starting
from the beginning of storage.
Xe driver can request this partition exposure if firmware or hardware
have detected failure that may involve corrupted partition table.
Fixed-sized partition allows full storage re-write in this situation.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
 drivers/mtd/devices/mtd_intel_dg.c | 80 +++++++++++++++++++++++++++-----------
 include/linux/intel_dg_nvm_aux.h   |  1 +
 2 files changed, 59 insertions(+), 22 deletions(-)

diff --git a/drivers/mtd/devices/mtd_intel_dg.c b/drivers/mtd/devices/mtd_intel_dg.c
index f2fa8f68d190..d11ddc687c4a 100644
--- a/drivers/mtd/devices/mtd_intel_dg.c
+++ b/drivers/mtd/devices/mtd_intel_dg.c
@@ -31,6 +31,7 @@ struct intel_dg_nvm {
 	void __iomem *base;
 	void __iomem *base2;
 	bool non_posted_erase;
+	bool survivability_enabled;
 
 	size_t size;
 	unsigned int nregions;
@@ -205,6 +206,13 @@ static unsigned int idg_nvm_get_region(const struct intel_dg_nvm *nvm, loff_t fr
 {
 	unsigned int i;
 
+	/*
+	 * When survivability region is enabled it positioned on index 0 and has region_id = 0
+	 * Region 0 is special, via this region whole device memory can be accessed.
+	 */
+	if (nvm->survivability_enabled)
+		return 0;
+
 	for (i = 0; i < nvm->nregions; i++) {
 		if ((nvm->regions[i].offset + nvm->regions[i].size - 1) >= from &&
 		    nvm->regions[i].offset <= from &&
@@ -443,32 +451,39 @@ static int intel_dg_nvm_init(struct intel_dg_nvm *nvm, struct device *device,
 		u32 address, base, limit, region;
 		u8 id = nvm->regions[i].id;
 
-		address = NVM_FLREG(id);
-		region = idg_nvm_read32(nvm, address);
+		if (nvm->regions[i].size) { /* pre-defined survivability region */
+			limit = nvm->regions[i].offset + nvm->regions[i].size - 1;
 
-		base = FIELD_GET(NVM_FREG_BASE_MASK, region) << NVM_FREG_ADDR_SHIFT;
-		limit = (FIELD_GET(NVM_FREG_ADDR_MASK, region) << NVM_FREG_ADDR_SHIFT) |
-			NVM_FREG_MIN_REGION_SIZE;
+			if (nvm->size < limit)
+				nvm->size = limit;
+		} else {
+			address = NVM_FLREG(id);
+			region = idg_nvm_read32(nvm, address);
 
-		dev_dbg(device, "[%d] %s: region: 0x%08X base: 0x%08x limit: 0x%08x\n",
-			id, nvm->regions[i].name, region, base, limit);
+			base = FIELD_GET(NVM_FREG_BASE_MASK, region) << NVM_FREG_ADDR_SHIFT;
+			limit = (FIELD_GET(NVM_FREG_ADDR_MASK, region) << NVM_FREG_ADDR_SHIFT) |
+				NVM_FREG_MIN_REGION_SIZE;
 
-		if (base >= limit || (i > 0 && limit == 0)) {
-			dev_dbg(device, "[%d] %s: disabled\n",
-				id, nvm->regions[i].name);
-			nvm->regions[i].is_readable = 0;
-			continue;
-		}
+			dev_dbg(device, "[%d] %s: region: 0x%08X base: 0x%08x limit: 0x%08x\n",
+				id, nvm->regions[i].name, region, base, limit);
 
-		if (nvm->size < limit)
-			nvm->size = limit;
+			if (base >= limit || (i > 0 && limit == 0)) {
+				dev_dbg(device, "[%d] %s: disabled\n",
+					id, nvm->regions[i].name);
+				nvm->regions[i].is_readable = 0;
+				continue;
+			}
 
-		nvm->regions[i].offset = base;
-		nvm->regions[i].size = limit - base + 1;
-		/* No write access to descriptor; mask it out*/
-		nvm->regions[i].is_writable = idg_nvm_region_writable(access_map, id);
+			if (nvm->size < limit)
+				nvm->size = limit;
 
-		nvm->regions[i].is_readable = idg_nvm_region_readable(access_map, id);
+			nvm->regions[i].offset = base;
+			nvm->regions[i].size = limit - base + 1;
+			/* No write access to descriptor; mask it out*/
+			nvm->regions[i].is_writable = idg_nvm_region_writable(access_map, id);
+
+			nvm->regions[i].is_readable = idg_nvm_region_readable(access_map, id);
+		}
 		dev_dbg(device, "Registered, %s id=%d offset=%lld size=%lld rd=%d wr=%d\n",
 			nvm->regions[i].name,
 			nvm->regions[i].id,
@@ -748,7 +763,7 @@ static int intel_dg_mtd_probe(struct auxiliary_device *aux_dev,
 	struct intel_dg_nvm *nvm;
 	struct device *device;
 	unsigned int nregions;
-	unsigned int i, n;
+	unsigned int i, n = 0;
 	int ret;
 
 	device = &aux_dev->dev;
@@ -764,6 +779,9 @@ static int intel_dg_mtd_probe(struct auxiliary_device *aux_dev,
 		return -ENODEV;
 	}
 
+	if (invm->survivability_size)
+		nregions++;
+
 	nvm = kzalloc_flex(*nvm, regions, nregions);
 	if (!nvm)
 		return -ENOMEM;
@@ -771,8 +789,26 @@ static int intel_dg_mtd_probe(struct auxiliary_device *aux_dev,
 	kref_init(&nvm->refcnt);
 	mutex_init(&nvm->lock);
 	nvm->nregions = nregions;
+	nvm->survivability_enabled = !!invm->survivability_size;
+
+	if (invm->survivability_size) { /* this partition should be at idx 0 */
+		char *name = kasprintf(GFP_KERNEL, "%s.%s",
+				       dev_name(&aux_dev->dev), "DATA");
+		if (!name) {
+			ret = -ENOMEM;
+			goto err_norpm;
+		}
+
+		nvm->regions[n].name = name;
+		nvm->regions[n].id = 0;
+		nvm->regions[n].offset  = 0;
+		nvm->regions[n].size = invm->survivability_size;
+		nvm->regions[n].is_readable = true;
+		nvm->regions[n].is_writable = true;
+		n++;
+	}
 
-	for (n = 0, i = 0; i < INTEL_DG_NVM_REGIONS; i++) {
+	for (i = 0; i < INTEL_DG_NVM_REGIONS; i++) {
 		if (!invm->regions[i].name)
 			continue;
 
diff --git a/include/linux/intel_dg_nvm_aux.h b/include/linux/intel_dg_nvm_aux.h
index 625d46a6b96e..84b5b6e0c4ea 100644
--- a/include/linux/intel_dg_nvm_aux.h
+++ b/include/linux/intel_dg_nvm_aux.h
@@ -21,6 +21,7 @@ struct intel_dg_nvm_dev {
 	struct auxiliary_device aux_dev;
 	bool writable_override;
 	bool non_posted_erase;
+	size_t survivability_size;
 	struct resource bar;
 	struct resource bar2;
 	const struct intel_dg_nvm_region *regions;

-- 
2.53.0


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/xe/nvm: define survivabilty partition
  2026-07-15 13:45 ` Alexander Usyskin
@ 2026-07-15 13:45   ` Alexander Usyskin
  -1 siblings, 0 replies; 10+ messages in thread
From: Alexander Usyskin @ 2026-07-15 13:45 UTC (permalink / raw)
  To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Matthew Brost, Thomas Hellström, Rodrigo Vivi, David Airlie,
	Simona Vetter
  Cc: linux-mtd, linux-kernel, intel-xe, dri-devel, Alexander Usyskin

Define 8M survivability partition for CRI when
storage is open for write.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
 drivers/gpu/drm/xe/xe_nvm.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/drivers/gpu/drm/xe/xe_nvm.c
index 1ea67eaeae24..54de0dbe1fa4 100644
--- a/drivers/gpu/drm/xe/xe_nvm.c
+++ b/drivers/gpu/drm/xe/xe_nvm.c
@@ -55,10 +55,11 @@ static bool xe_nvm_non_posted_erase(struct xe_device *xe)
 	}
 }
 
-static bool xe_nvm_writable_override(struct xe_device *xe)
+static bool xe_nvm_writable_override(struct xe_device *xe, size_t *survivability_size)
 {
 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
 	bool writable_override;
+	size_t s_size = 0;
 	struct xe_reg reg;
 	u32 test_bit, test_val;
 
@@ -67,6 +68,7 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
 		reg = PCODE_SCRATCH(0);
 		test_bit = FDO_MODE;
 		test_val = FDO_MODE;
+		s_size = SZ_8M;
 		break;
 	case XE_BATTLEMAGE:
 		reg = HECI_FWSTS2(DG2_GSC_HECI2_BASE);
@@ -90,12 +92,17 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
 		break;
 	default:
 		drm_err(&xe->drm, "Unknown platform\n");
+		*survivability_size = 0;
 		return true;
 	}
 
 	writable_override = (xe_mmio_read32(mmio, reg) & test_bit) == test_val;
-	if (writable_override)
+	if (writable_override) {
 		drm_info(&xe->drm, "NVM access overridden by jumper\n");
+		*survivability_size = s_size;
+	} else {
+		*survivability_size = 0;
+	}
 	return writable_override;
 }
 
@@ -142,7 +149,7 @@ int xe_nvm_init(struct xe_device *xe)
 	if (!nvm)
 		return -ENOMEM;
 
-	nvm->writable_override = xe_nvm_writable_override(xe);
+	nvm->writable_override = xe_nvm_writable_override(xe, &nvm->survivability_size);
 	nvm->non_posted_erase = xe_nvm_non_posted_erase(xe);
 	nvm->bar.parent = &pdev->resource[0];
 	nvm->bar.start = GEN12_GUNIT_NVM_BASE + pdev->resource[0].start;

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/xe/nvm: define survivabilty partition
@ 2026-07-15 13:45   ` Alexander Usyskin
  0 siblings, 0 replies; 10+ messages in thread
From: Alexander Usyskin @ 2026-07-15 13:45 UTC (permalink / raw)
  To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Matthew Brost, Thomas Hellström, Rodrigo Vivi, David Airlie,
	Simona Vetter
  Cc: linux-mtd, linux-kernel, intel-xe, dri-devel, Alexander Usyskin

Define 8M survivability partition for CRI when
storage is open for write.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
 drivers/gpu/drm/xe/xe_nvm.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/drivers/gpu/drm/xe/xe_nvm.c
index 1ea67eaeae24..54de0dbe1fa4 100644
--- a/drivers/gpu/drm/xe/xe_nvm.c
+++ b/drivers/gpu/drm/xe/xe_nvm.c
@@ -55,10 +55,11 @@ static bool xe_nvm_non_posted_erase(struct xe_device *xe)
 	}
 }
 
-static bool xe_nvm_writable_override(struct xe_device *xe)
+static bool xe_nvm_writable_override(struct xe_device *xe, size_t *survivability_size)
 {
 	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
 	bool writable_override;
+	size_t s_size = 0;
 	struct xe_reg reg;
 	u32 test_bit, test_val;
 
@@ -67,6 +68,7 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
 		reg = PCODE_SCRATCH(0);
 		test_bit = FDO_MODE;
 		test_val = FDO_MODE;
+		s_size = SZ_8M;
 		break;
 	case XE_BATTLEMAGE:
 		reg = HECI_FWSTS2(DG2_GSC_HECI2_BASE);
@@ -90,12 +92,17 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
 		break;
 	default:
 		drm_err(&xe->drm, "Unknown platform\n");
+		*survivability_size = 0;
 		return true;
 	}
 
 	writable_override = (xe_mmio_read32(mmio, reg) & test_bit) == test_val;
-	if (writable_override)
+	if (writable_override) {
 		drm_info(&xe->drm, "NVM access overridden by jumper\n");
+		*survivability_size = s_size;
+	} else {
+		*survivability_size = 0;
+	}
 	return writable_override;
 }
 
@@ -142,7 +149,7 @@ int xe_nvm_init(struct xe_device *xe)
 	if (!nvm)
 		return -ENOMEM;
 
-	nvm->writable_override = xe_nvm_writable_override(xe);
+	nvm->writable_override = xe_nvm_writable_override(xe, &nvm->survivability_size);
 	nvm->non_posted_erase = xe_nvm_non_posted_erase(xe);
 	nvm->bar.parent = &pdev->resource[0];
 	nvm->bar.start = GEN12_GUNIT_NVM_BASE + pdev->resource[0].start;

-- 
2.53.0


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] mtd: mtd_intel_dg: add survivability partition
  2026-07-15 13:45   ` Alexander Usyskin
  (?)
@ 2026-07-15 14:19   ` sashiko-bot
  -1 siblings, 0 replies; 10+ messages in thread
From: sashiko-bot @ 2026-07-15 14:19 UTC (permalink / raw)
  To: Alexander Usyskin; +Cc: dri-devel

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Unsigned integer underflow in bounds checks allows out-of-bounds hardware memory accesses when survivability mode is enabled.
--

--- Patch [1]: [PATCH 1/2] mtd: mtd_intel_dg: add survivability partition ---
commit 9f27e4e8d4c741d1106f13ea61bac2daf3838cad
Author: Alexander Usyskin <alexander.usyskin@intel.com>

mtd: mtd_intel_dg: add survivability partition

This commit adds an option to expose a fixed-sized survivability partition
starting from the beginning of storage. This can be used when the firmware
or hardware detects a failure involving a corrupted partition table,
allowing a full storage re-write.

> diff --git a/drivers/mtd/devices/mtd_intel_dg.c b/drivers/mtd/devices/mtd_intel_dg.c
> index f2fa8f68d1905..d11ddc687c4ac 100644
> --- a/drivers/mtd/devices/mtd_intel_dg.c
> +++ b/drivers/mtd/devices/mtd_intel_dg.c
[ ... ]
> @@ -205,6 +206,13 @@ static unsigned int idg_nvm_get_region(const struct intel_dg_nvm *nvm, loff_t fr
>  {
>  	unsigned int i;
>  
> +	/*
> +	 * When survivability region is enabled it positioned on index 0 and has region_id = 0
> +	 * Region 0 is special, via this region whole device memory can be accessed.
> +	 */
> +	if (nvm->survivability_enabled)
> +		return 0;
> +

[Severity: High]
Does this unconditional return of 0 create an underflow risk in the read,
write, and erase paths?

When survivability is enabled, idg_nvm_get_region() will always return
index 0. If nvm->size was inflated during initialization by parsing limits
from a corrupted partition table, a request could arrive with an offset
larger than nvm->regions[0].size.

In drivers/mtd/devices/mtd_intel_dg.c:intel_dg_mtd_read(), the bounds check
subtracts the offset from the region size:

    idx = idg_nvm_get_region(nvm, from);
    
    if (len > nvm->regions[idx].size - from)
        len = nvm->regions[idx].size - from;

If the from offset exceeds nvm->regions[0].size, the unsigned subtraction
will underflow, resulting in a very large value. This bypasses the length
truncation and allows out-of-bounds hardware memory accesses.

Could the same underflow occur in the bounds checks in intel_dg_mtd_write()
and intel_dg_mtd_erase()?

>  	for (i = 0; i < nvm->nregions; i++) {
>  		if ((nvm->regions[i].offset + nvm->regions[i].size - 1) >= from &&

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260715-cri_surviv-v1-0-61763a6f1076@intel.com?part=1

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] drm/xe/nvm: define survivabilty partition
  2026-07-15 13:45   ` Alexander Usyskin
  (?)
@ 2026-07-15 14:32   ` sashiko-bot
  -1 siblings, 0 replies; 10+ messages in thread
From: sashiko-bot @ 2026-07-15 14:32 UTC (permalink / raw)
  To: Alexander Usyskin; +Cc: dri-devel

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Enabling the survivability region causes an infinite loop during erase operations at the 8MB boundary, and bypasses bounds checks via integer underflow on reads and writes.
--

--- Patch [2]: [PATCH 2/2] drm/xe/nvm: define survivabilty partition ---
commit b38b020b9c762ee5ac9265db46b43fe2139de54d
Author: Alexander Usyskin <alexander.usyskin@intel.com>

drm/xe/nvm: define survivabilty partition
    
Define 8M survivability partition for CRI when
storage is open for write.

> diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/drivers/gpu/drm/xe/xe_nvm.c
> index 1ea67eaeae243..54de0dbe1fa4d 100644
> --- a/drivers/gpu/drm/xe/xe_nvm.c
> +++ b/drivers/gpu/drm/xe/xe_nvm.c
[ ... ]
> @@ -67,6 +68,7 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
>  		reg = PCODE_SCRATCH(0);
>  		test_bit = FDO_MODE;
>  		test_val = FDO_MODE;
> +		s_size = SZ_8M;

[Severity: High]
Does enabling this survivability region cause an infinite loop during erase
operations in the MTD driver?

When this patch sets the size to 8MB and survivability is enabled, all
accesses are forced to use region 0, which has a hardcoded size of 8MB:

drivers/mtd/devices/mtd_intel_dg.c:idg_nvm_get_region() {
    ...
	if (nvm->survivability_enabled)
		return 0;
    ...
}

If a user performs an erase operation at or crossing the 8MB boundary, it can
trigger an infinite loop in intel_dg_mtd_erase():

drivers/mtd/devices/mtd_intel_dg.c:intel_dg_mtd_erase() {
    ...
	if (len > nvm->regions[idx].size - from)
		len = nvm->regions[idx].size - from;
    ...
}

When from reaches 8MB (the size of region 0), size - from evaluates to 0. This
sets len to 0. This can cause the operation to return 0 immediately without
decreasing total_len, leading to an infinite while (total_len > 0) loop.

Additionally, read and write operations starting beyond 8MB might cause
size - from to underflow to a massive positive number, bypassing bounds checks.

>  		break;
>  	case XE_BATTLEMAGE:
>  		reg = HECI_FWSTS2(DG2_GSC_HECI2_BASE);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260715-cri_surviv-v1-0-61763a6f1076@intel.com?part=2

^ permalink raw reply	[flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for drm/xe/nvm: add survivabilty partiton
  2026-07-15 13:45 ` Alexander Usyskin
                   ` (2 preceding siblings ...)
  (?)
@ 2026-07-15 14:53 ` Patchwork
  -1 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-15 14:53 UTC (permalink / raw)
  To: Alexander Usyskin; +Cc: intel-xe

== Series Details ==

Series: drm/xe/nvm: add survivabilty partiton
URL   : https://patchwork.freedesktop.org/series/170493/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:51:47] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:51:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:52:23] Starting KUnit Kernel (1/1)...
[14:52:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:52:23] ================== guc_buf (11 subtests) ===================
[14:52:23] [PASSED] test_smallest
[14:52:23] [PASSED] test_largest
[14:52:23] [PASSED] test_granular
[14:52:23] [PASSED] test_unique
[14:52:23] [PASSED] test_overlap
[14:52:23] [PASSED] test_reusable
[14:52:23] [PASSED] test_too_big
[14:52:23] [PASSED] test_flush
[14:52:23] [PASSED] test_lookup
[14:52:23] [PASSED] test_data
[14:52:23] [PASSED] test_class
[14:52:23] ===================== [PASSED] guc_buf =====================
[14:52:23] =================== guc_dbm (7 subtests) ===================
[14:52:23] [PASSED] test_empty
[14:52:23] [PASSED] test_default
[14:52:23] ======================== test_size  ========================
[14:52:23] [PASSED] 4
[14:52:23] [PASSED] 8
[14:52:23] [PASSED] 32
[14:52:23] [PASSED] 256
[14:52:23] ==================== [PASSED] test_size ====================
[14:52:23] ======================= test_reuse  ========================
[14:52:23] [PASSED] 4
[14:52:23] [PASSED] 8
[14:52:23] [PASSED] 32
[14:52:23] [PASSED] 256
[14:52:23] =================== [PASSED] test_reuse ====================
[14:52:23] =================== test_range_overlap  ====================
[14:52:23] [PASSED] 4
[14:52:23] [PASSED] 8
[14:52:23] [PASSED] 32
[14:52:23] [PASSED] 256
[14:52:23] =============== [PASSED] test_range_overlap ================
[14:52:23] =================== test_range_compact  ====================
[14:52:23] [PASSED] 4
[14:52:23] [PASSED] 8
[14:52:23] [PASSED] 32
[14:52:23] [PASSED] 256
[14:52:23] =============== [PASSED] test_range_compact ================
[14:52:23] ==================== test_range_spare  =====================
[14:52:23] [PASSED] 4
[14:52:23] [PASSED] 8
[14:52:23] [PASSED] 32
[14:52:23] [PASSED] 256
[14:52:23] ================ [PASSED] test_range_spare =================
[14:52:23] ===================== [PASSED] guc_dbm =====================
[14:52:23] =================== guc_idm (6 subtests) ===================
[14:52:24] [PASSED] bad_init
[14:52:24] [PASSED] no_init
[14:52:24] [PASSED] init_fini
[14:52:24] [PASSED] check_used
[14:52:24] [PASSED] check_quota
[14:52:24] [PASSED] check_all
[14:52:24] ===================== [PASSED] guc_idm =====================
[14:52:24] =============== guc_klv_helpers (9 subtests) ===============
[14:52:24] [PASSED] test_count
[14:52:24] [PASSED] test_encode_u32
[14:52:24] [PASSED] test_encode_u64
[14:52:24] [PASSED] test_encode_string
[14:52:24] [PASSED] test_encode_object_raw
[14:52:24] [PASSED] test_encode_object_klv
[14:52:24] [PASSED] test_encode_object_nested
[14:52:24] [PASSED] test_encode_object_basic
[14:52:24] [PASSED] test_print
[14:52:24] ================= [PASSED] guc_klv_helpers =================
[14:52:24] ================== no_relay (3 subtests) ===================
[14:52:24] [PASSED] xe_drops_guc2pf_if_not_ready
[14:52:24] [PASSED] xe_drops_guc2vf_if_not_ready
[14:52:24] [PASSED] xe_rejects_send_if_not_ready
[14:52:24] ==================== [PASSED] no_relay =====================
[14:52:24] ================== pf_relay (14 subtests) ==================
[14:52:24] [PASSED] pf_rejects_guc2pf_too_short
[14:52:24] [PASSED] pf_rejects_guc2pf_too_long
[14:52:24] [PASSED] pf_rejects_guc2pf_no_payload
[14:52:24] [PASSED] pf_fails_no_payload
[14:52:24] [PASSED] pf_fails_bad_origin
[14:52:24] [PASSED] pf_fails_bad_type
[14:52:24] [PASSED] pf_txn_reports_error
[14:52:24] [PASSED] pf_txn_sends_pf2guc
[14:52:24] [PASSED] pf_sends_pf2guc
[14:52:24] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[14:52:24] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[14:52:24] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[14:52:24] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[14:52:24] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[14:52:24] ==================== [PASSED] pf_relay =====================
[14:52:24] ================== vf_relay (3 subtests) ===================
[14:52:24] [PASSED] vf_rejects_guc2vf_too_short
[14:52:24] [PASSED] vf_rejects_guc2vf_too_long
[14:52:24] [PASSED] vf_rejects_guc2vf_no_payload
[14:52:24] ==================== [PASSED] vf_relay =====================
[14:52:24] ================ pf_gt_config (9 subtests) =================
[14:52:24] [PASSED] fair_contexts_1vf
[14:52:24] [PASSED] fair_doorbells_1vf
[14:52:24] [PASSED] fair_ggtt_1vf
[14:52:24] ====================== fair_vram_1vf  ======================
[14:52:24] [PASSED] 3.50 GiB
[14:52:24] [PASSED] 11.5 GiB
[14:52:24] [PASSED] 15.5 GiB
[14:52:24] [PASSED] 31.5 GiB
[14:52:24] [PASSED] 63.5 GiB
[14:52:24] [PASSED] 1.91 GiB
[14:52:24] ================== [PASSED] fair_vram_1vf ==================
[14:52:24] ================ fair_vram_1vf_admin_only  =================
[14:52:24] [PASSED] 3.50 GiB
[14:52:24] [PASSED] 11.5 GiB
[14:52:24] [PASSED] 15.5 GiB
[14:52:24] [PASSED] 31.5 GiB
[14:52:24] [PASSED] 63.5 GiB
[14:52:24] [PASSED] 1.91 GiB
[14:52:24] ============ [PASSED] fair_vram_1vf_admin_only =============
[14:52:24] ====================== fair_contexts  ======================
[14:52:24] [PASSED] 1 VF
[14:52:24] [PASSED] 2 VFs
[14:52:24] [PASSED] 3 VFs
[14:52:24] [PASSED] 4 VFs
[14:52:24] [PASSED] 5 VFs
[14:52:24] [PASSED] 6 VFs
[14:52:24] [PASSED] 7 VFs
[14:52:24] [PASSED] 8 VFs
[14:52:24] [PASSED] 9 VFs
[14:52:24] [PASSED] 10 VFs
[14:52:24] [PASSED] 11 VFs
[14:52:24] [PASSED] 12 VFs
[14:52:24] [PASSED] 13 VFs
[14:52:24] [PASSED] 14 VFs
[14:52:24] [PASSED] 15 VFs
[14:52:24] [PASSED] 16 VFs
[14:52:24] [PASSED] 17 VFs
[14:52:24] [PASSED] 18 VFs
[14:52:24] [PASSED] 19 VFs
[14:52:24] [PASSED] 20 VFs
[14:52:24] [PASSED] 21 VFs
[14:52:24] [PASSED] 22 VFs
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[14:52:24] [PASSED] 36 VFs
[14:52:24] [PASSED] 37 VFs
[14:52:24] [PASSED] 38 VFs
[14:52:24] [PASSED] 39 VFs
[14:52:24] [PASSED] 40 VFs
[14:52:24] [PASSED] 41 VFs
[14:52:24] [PASSED] 42 VFs
[14:52:24] [PASSED] 43 VFs
[14:52:24] [PASSED] 44 VFs
[14:52:24] [PASSED] 45 VFs
[14:52:24] [PASSED] 46 VFs
[14:52:24] [PASSED] 47 VFs
[14:52:24] [PASSED] 48 VFs
[14:52:24] [PASSED] 49 VFs
[14:52:24] [PASSED] 50 VFs
[14:52:24] [PASSED] 51 VFs
[14:52:24] [PASSED] 52 VFs
[14:52:24] [PASSED] 53 VFs
[14:52:24] [PASSED] 54 VFs
[14:52:24] [PASSED] 55 VFs
[14:52:24] [PASSED] 56 VFs
[14:52:24] [PASSED] 57 VFs
[14:52:24] [PASSED] 58 VFs
[14:52:24] [PASSED] 59 VFs
[14:52:24] [PASSED] 60 VFs
[14:52:24] [PASSED] 61 VFs
[14:52:24] [PASSED] 62 VFs
[14:52:24] [PASSED] 63 VFs
[14:52:24] ================== [PASSED] fair_contexts ==================
[14:52:24] ===================== fair_doorbells  ======================
[14:52:24] [PASSED] 1 VF
[14:52:24] [PASSED] 2 VFs
[14:52:24] [PASSED] 3 VFs
[14:52:24] [PASSED] 4 VFs
[14:52:24] [PASSED] 5 VFs
[14:52:24] [PASSED] 6 VFs
[14:52:24] [PASSED] 7 VFs
[14:52:24] [PASSED] 8 VFs
[14:52:24] [PASSED] 9 VFs
[14:52:24] [PASSED] 10 VFs
[14:52:24] [PASSED] 11 VFs
[14:52:24] [PASSED] 12 VFs
[14:52:24] [PASSED] 13 VFs
[14:52:24] [PASSED] 14 VFs
[14:52:24] [PASSED] 15 VFs
[14:52:24] [PASSED] 16 VFs
[14:52:24] [PASSED] 17 VFs
[14:52:24] [PASSED] 18 VFs
[14:52:24] [PASSED] 19 VFs
[14:52:24] [PASSED] 20 VFs
[14:52:24] [PASSED] 21 VFs
[14:52:24] [PASSED] 22 VFs
[14:52:24] [PASSED] 23 VFs
[14:52:24] [PASSED] 24 VFs
[14:52:24] [PASSED] 25 VFs
[14:52:24] [PASSED] 26 VFs
[14:52:24] [PASSED] 27 VFs
[14:52:24] [PASSED] 28 VFs
[14:52:24] [PASSED] 29 VFs
[14:52:24] [PASSED] 30 VFs
[14:52:24] [PASSED] 31 VFs
[14:52:24] [PASSED] 32 VFs
[14:52:24] [PASSED] 33 VFs
[14:52:24] [PASSED] 34 VFs
[14:52:24] [PASSED] 35 VFs
[14:52:24] [PASSED] 36 VFs
[14:52:24] [PASSED] 37 VFs
[14:52:24] [PASSED] 38 VFs
[14:52:24] [PASSED] 39 VFs
[14:52:24] [PASSED] 40 VFs
[14:52:24] [PASSED] 41 VFs
[14:52:24] [PASSED] 42 VFs
[14:52:24] [PASSED] 43 VFs
[14:52:24] [PASSED] 44 VFs
[14:52:24] [PASSED] 45 VFs
[14:52:24] [PASSED] 46 VFs
[14:52:24] [PASSED] 47 VFs
[14:52:24] [PASSED] 48 VFs
[14:52:24] [PASSED] 49 VFs
[14:52:24] [PASSED] 50 VFs
[14:52:24] [PASSED] 51 VFs
[14:52:24] [PASSED] 52 VFs
[14:52:24] [PASSED] 53 VFs
[14:52:24] [PASSED] 54 VFs
[14:52:24] [PASSED] 55 VFs
[14:52:24] [PASSED] 56 VFs
[14:52:24] [PASSED] 57 VFs
[14:52:24] [PASSED] 58 VFs
[14:52:24] [PASSED] 59 VFs
[14:52:24] [PASSED] 60 VFs
[14:52:24] [PASSED] 61 VFs
[14:52:24] [PASSED] 62 VFs
[14:52:24] [PASSED] 63 VFs
[14:52:24] ================= [PASSED] fair_doorbells ==================
[14:52:24] ======================== fair_ggtt  ========================
[14:52:24] [PASSED] 1 VF
[14:52:24] [PASSED] 2 VFs
[14:52:24] [PASSED] 3 VFs
[14:52:24] [PASSED] 4 VFs
[14:52:24] [PASSED] 5 VFs
[14:52:24] [PASSED] 6 VFs
[14:52:24] [PASSED] 7 VFs
[14:52:24] [PASSED] 8 VFs
[14:52:24] [PASSED] 9 VFs
[14:52:24] [PASSED] 10 VFs
[14:52:24] [PASSED] 11 VFs
[14:52:24] [PASSED] 12 VFs
[14:52:24] [PASSED] 13 VFs
[14:52:24] [PASSED] 14 VFs
[14:52:24] [PASSED] 15 VFs
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[14:52:24] [PASSED] 18 VFs
[14:52:24] [PASSED] 19 VFs
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[14:52:24] [PASSED] 25 VFs
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[14:52:24] [PASSED] 30 VFs
[14:52:24] [PASSED] 31 VFs
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[14:52:24] [PASSED] 33 VFs
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[14:52:24] [PASSED] 35 VFs
[14:52:24] [PASSED] 36 VFs
[14:52:24] [PASSED] 37 VFs
[14:52:24] [PASSED] 38 VFs
[14:52:24] [PASSED] 39 VFs
[14:52:24] [PASSED] 40 VFs
[14:52:24] [PASSED] 41 VFs
[14:52:24] [PASSED] 42 VFs
[14:52:24] [PASSED] 43 VFs
[14:52:24] [PASSED] 44 VFs
[14:52:24] [PASSED] 45 VFs
[14:52:24] [PASSED] 46 VFs
[14:52:24] [PASSED] 47 VFs
[14:52:24] [PASSED] 48 VFs
[14:52:24] [PASSED] 49 VFs
[14:52:24] [PASSED] 50 VFs
[14:52:24] [PASSED] 51 VFs
[14:52:24] [PASSED] 52 VFs
[14:52:24] [PASSED] 53 VFs
[14:52:24] [PASSED] 54 VFs
[14:52:24] [PASSED] 55 VFs
[14:52:24] [PASSED] 56 VFs
[14:52:24] [PASSED] 57 VFs
[14:52:24] [PASSED] 58 VFs
[14:52:24] [PASSED] 59 VFs
[14:52:24] [PASSED] 60 VFs
[14:52:24] [PASSED] 61 VFs
[14:52:24] [PASSED] 62 VFs
[14:52:24] [PASSED] 63 VFs
[14:52:24] ==================== [PASSED] fair_ggtt ====================
[14:52:24] ======================== fair_vram  ========================
[14:52:24] [PASSED] 1 VF
[14:52:24] [PASSED] 2 VFs
[14:52:24] [PASSED] 3 VFs
[14:52:24] [PASSED] 4 VFs
[14:52:24] [PASSED] 5 VFs
[14:52:24] [PASSED] 6 VFs
[14:52:24] [PASSED] 7 VFs
[14:52:24] [PASSED] 8 VFs
[14:52:24] [PASSED] 9 VFs
[14:52:24] [PASSED] 10 VFs
[14:52:24] [PASSED] 11 VFs
[14:52:24] [PASSED] 12 VFs
[14:52:24] [PASSED] 13 VFs
[14:52:24] [PASSED] 14 VFs
[14:52:24] [PASSED] 15 VFs
[14:52:24] [PASSED] 16 VFs
[14:52:24] [PASSED] 17 VFs
[14:52:24] [PASSED] 18 VFs
[14:52:24] [PASSED] 19 VFs
[14:52:24] [PASSED] 20 VFs
[14:52:24] [PASSED] 21 VFs
[14:52:24] [PASSED] 22 VFs
[14:52:24] [PASSED] 23 VFs
[14:52:24] [PASSED] 24 VFs
[14:52:24] [PASSED] 25 VFs
[14:52:24] [PASSED] 26 VFs
[14:52:24] [PASSED] 27 VFs
[14:52:24] [PASSED] 28 VFs
[14:52:24] [PASSED] 29 VFs
[14:52:24] [PASSED] 30 VFs
[14:52:24] [PASSED] 31 VFs
[14:52:24] [PASSED] 32 VFs
[14:52:24] [PASSED] 33 VFs
[14:52:24] [PASSED] 34 VFs
[14:52:24] [PASSED] 35 VFs
[14:52:24] [PASSED] 36 VFs
[14:52:24] [PASSED] 37 VFs
[14:52:24] [PASSED] 38 VFs
[14:52:24] [PASSED] 39 VFs
[14:52:24] [PASSED] 40 VFs
[14:52:24] [PASSED] 41 VFs
[14:52:24] [PASSED] 42 VFs
[14:52:24] [PASSED] 43 VFs
[14:52:24] [PASSED] 44 VFs
[14:52:24] [PASSED] 45 VFs
[14:52:24] [PASSED] 46 VFs
[14:52:24] [PASSED] 47 VFs
[14:52:24] [PASSED] 48 VFs
[14:52:24] [PASSED] 49 VFs
[14:52:24] [PASSED] 50 VFs
[14:52:24] [PASSED] 51 VFs
[14:52:24] [PASSED] 52 VFs
[14:52:24] [PASSED] 53 VFs
[14:52:24] [PASSED] 54 VFs
[14:52:24] [PASSED] 55 VFs
[14:52:24] [PASSED] 56 VFs
[14:52:24] [PASSED] 57 VFs
[14:52:24] [PASSED] 58 VFs
[14:52:24] [PASSED] 59 VFs
[14:52:24] [PASSED] 60 VFs
[14:52:24] [PASSED] 61 VFs
[14:52:24] [PASSED] 62 VFs
[14:52:24] [PASSED] 63 VFs
[14:52:24] ==================== [PASSED] fair_vram ====================
[14:52:24] ================== [PASSED] pf_gt_config ===================
[14:52:24] ===================== lmtt (1 subtest) =====================
[14:52:24] ======================== test_ops  =========================
[14:52:24] [PASSED] 2-level
[14:52:24] [PASSED] multi-level
[14:52:24] ==================== [PASSED] test_ops =====================
[14:52:24] ====================== [PASSED] lmtt =======================
[14:52:24] ================= sriov_packet (1 subtest) =================
[14:52:24] [PASSED] test_descriptor_init
[14:52:24] ================== [PASSED] sriov_packet ===================
[14:52:24] ================= pf_service (11 subtests) =================
[14:52:24] [PASSED] pf_negotiate_any
[14:52:24] [PASSED] pf_negotiate_base_match
[14:52:24] [PASSED] pf_negotiate_base_newer
[14:52:24] [PASSED] pf_negotiate_base_next
[14:52:24] [SKIPPED] pf_negotiate_base_older (no older minor)
[14:52:24] [PASSED] pf_negotiate_base_prev
[14:52:24] [PASSED] pf_negotiate_latest_match
[14:52:24] [PASSED] pf_negotiate_latest_newer
[14:52:24] [PASSED] pf_negotiate_latest_next
[14:52:24] [SKIPPED] pf_negotiate_latest_older (no older minor)
[14:52:24] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[14:52:24] =================== [PASSED] pf_service ====================
[14:52:24] ================= xe_guc_g2g (2 subtests) ==================
[14:52:24] ============== xe_live_guc_g2g_kunit_default  ==============
[14:52:24] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:52:24] ============== xe_live_guc_g2g_kunit_allmem  ===============
[14:52:24] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:52:24] =================== [SKIPPED] xe_guc_g2g ===================
[14:52:24] =================== xe_mocs (2 subtests) ===================
[14:52:24] ================ xe_live_mocs_kernel_kunit  ================
[14:52:24] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:52:24] ================ xe_live_mocs_reset_kunit  =================
[14:52:24] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:52:24] ==================== [SKIPPED] xe_mocs =====================
[14:52:24] ================= xe_migrate (2 subtests) ==================
[14:52:24] ================= xe_migrate_sanity_kunit  =================
[14:52:24] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:52:24] ================== xe_validate_ccs_kunit  ==================
[14:52:24] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:52:24] =================== [SKIPPED] xe_migrate ===================
[14:52:24] ================== xe_dma_buf (1 subtest) ==================
[14:52:24] ==================== xe_dma_buf_kunit  =====================
[14:52:24] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:52:24] =================== [SKIPPED] xe_dma_buf ===================
[14:52:24] ================= xe_bo_shrink (1 subtest) =================
[14:52:24] =================== xe_bo_shrink_kunit  ====================
[14:52:24] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:52:24] ================== [SKIPPED] xe_bo_shrink ==================
[14:52:24] ==================== xe_bo (2 subtests) ====================
[14:52:24] ================== xe_ccs_migrate_kunit  ===================
[14:52:24] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:52:24] ==================== xe_bo_evict_kunit  ====================
[14:52:24] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:52:24] ===================== [SKIPPED] xe_bo ======================
[14:52:24] ==================== args (13 subtests) ====================
[14:52:24] [PASSED] count_args_test
[14:52:24] [PASSED] call_args_example
[14:52:24] [PASSED] call_args_test
[14:52:24] [PASSED] drop_first_arg_example
[14:52:24] [PASSED] drop_first_arg_test
[14:52:24] [PASSED] first_arg_example
[14:52:24] [PASSED] first_arg_test
[14:52:24] [PASSED] last_arg_example
[14:52:24] [PASSED] last_arg_test
[14:52:24] [PASSED] pick_arg_example
[14:52:24] [PASSED] if_args_example
[14:52:24] [PASSED] if_args_test
[14:52:24] [PASSED] sep_comma_example
[14:52:24] ====================== [PASSED] args =======================
[14:52:24] =================== xe_pci (3 subtests) ====================
[14:52:24] ==================== check_graphics_ip  ====================
[14:52:24] [PASSED] 12.00 Xe_LP
[14:52:24] [PASSED] 12.10 Xe_LP+
[14:52:24] [PASSED] 12.55 Xe_HPG
[14:52:24] [PASSED] 12.60 Xe_HPC
[14:52:24] [PASSED] 12.70 Xe_LPG
[14:52:24] [PASSED] 12.71 Xe_LPG
[14:52:24] [PASSED] 12.74 Xe_LPG+
[14:52:24] [PASSED] 20.01 Xe2_HPG
[14:52:24] [PASSED] 20.02 Xe2_HPG
[14:52:24] [PASSED] 20.04 Xe2_LPG
[14:52:24] [PASSED] 30.00 Xe3_LPG
[14:52:24] [PASSED] 30.01 Xe3_LPG
[14:52:24] [PASSED] 30.03 Xe3_LPG
[14:52:24] [PASSED] 30.04 Xe3_LPG
[14:52:24] [PASSED] 30.05 Xe3_LPG
[14:52:24] [PASSED] 35.10 Xe3p_LPG
[14:52:24] [PASSED] 35.11 Xe3p_XPC
[14:52:24] ================ [PASSED] check_graphics_ip ================
[14:52:24] ===================== check_media_ip  ======================
[14:52:24] [PASSED] 12.00 Xe_M
[14:52:24] [PASSED] 12.55 Xe_HPM
[14:52:24] [PASSED] 13.00 Xe_LPM+
[14:52:24] [PASSED] 13.01 Xe2_HPM
[14:52:24] [PASSED] 20.00 Xe2_LPM
[14:52:24] [PASSED] 30.00 Xe3_LPM
[14:52:24] [PASSED] 30.02 Xe3_LPM
[14:52:24] [PASSED] 35.00 Xe3p_LPM
[14:52:24] [PASSED] 35.03 Xe3p_HPM
[14:52:24] ================= [PASSED] check_media_ip ==================
[14:52:24] =================== check_platform_desc  ===================
[14:52:24] [PASSED] 0x9A60 (TIGERLAKE)
[14:52:24] [PASSED] 0x9A68 (TIGERLAKE)
[14:52:24] [PASSED] 0x9A70 (TIGERLAKE)
[14:52:24] [PASSED] 0x9A40 (TIGERLAKE)
[14:52:24] [PASSED] 0x9A49 (TIGERLAKE)
[14:52:24] [PASSED] 0x9A59 (TIGERLAKE)
[14:52:24] [PASSED] 0x9A78 (TIGERLAKE)
[14:52:24] [PASSED] 0x9AC0 (TIGERLAKE)
[14:52:24] [PASSED] 0x9AC9 (TIGERLAKE)
[14:52:24] [PASSED] 0x9AD9 (TIGERLAKE)
[14:52:24] [PASSED] 0x9AF8 (TIGERLAKE)
[14:52:24] [PASSED] 0x4C80 (ROCKETLAKE)
[14:52:24] [PASSED] 0x4C8A (ROCKETLAKE)
[14:52:24] [PASSED] 0x4C8B (ROCKETLAKE)
[14:52:24] [PASSED] 0x4C8C (ROCKETLAKE)
[14:52:24] [PASSED] 0x4C90 (ROCKETLAKE)
[14:52:24] [PASSED] 0x4C9A (ROCKETLAKE)
[14:52:24] [PASSED] 0x4680 (ALDERLAKE_S)
[14:52:24] [PASSED] 0x4682 (ALDERLAKE_S)
[14:52:24] [PASSED] 0x4688 (ALDERLAKE_S)
[14:52:24] [PASSED] 0x468A (ALDERLAKE_S)
[14:52:24] [PASSED] 0x468B (ALDERLAKE_S)
[14:52:24] [PASSED] 0x4690 (ALDERLAKE_S)
[14:52:24] [PASSED] 0x4692 (ALDERLAKE_S)
[14:52:24] [PASSED] 0x4693 (ALDERLAKE_S)
[14:52:24] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46AA (ALDERLAKE_P)
[14:52:24] [PASSED] 0x462A (ALDERLAKE_P)
[14:52:24] [PASSED] 0x4626 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x4628 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46B0 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:52:24] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:52:24] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:52:24] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:52:24] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:52:24] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:52:24] [PASSED] 0xA721 (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA720 (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:52:24] [PASSED] 0xA780 (ALDERLAKE_S)
[14:52:24] [PASSED] 0xA781 (ALDERLAKE_S)
[14:52:24] [PASSED] 0xA782 (ALDERLAKE_S)
[14:52:24] [PASSED] 0xA783 (ALDERLAKE_S)
[14:52:24] [PASSED] 0xA788 (ALDERLAKE_S)
[14:52:24] [PASSED] 0xA789 (ALDERLAKE_S)
[14:52:24] [PASSED] 0xA78A (ALDERLAKE_S)
[14:52:24] [PASSED] 0xA78B (ALDERLAKE_S)
[14:52:24] [PASSED] 0x4905 (DG1)
[14:52:24] [PASSED] 0x4906 (DG1)
[14:52:24] [PASSED] 0x4907 (DG1)
[14:52:24] [PASSED] 0x4908 (DG1)
[14:52:24] [PASSED] 0x4909 (DG1)
[14:52:24] [PASSED] 0x56C0 (DG2)
[14:52:24] [PASSED] 0x56C2 (DG2)
[14:52:24] [PASSED] 0x56C1 (DG2)
[14:52:24] [PASSED] 0x7D51 (METEORLAKE)
[14:52:24] [PASSED] 0x7DD1 (METEORLAKE)
[14:52:24] [PASSED] 0x7D41 (METEORLAKE)
[14:52:24] [PASSED] 0x7D67 (METEORLAKE)
[14:52:24] [PASSED] 0xB640 (METEORLAKE)
[14:52:24] [PASSED] 0x56A0 (DG2)
[14:52:24] [PASSED] 0x56A1 (DG2)
[14:52:24] [PASSED] 0x56A2 (DG2)
[14:52:24] [PASSED] 0x56BE (DG2)
[14:52:24] [PASSED] 0x56BF (DG2)
[14:52:24] [PASSED] 0x5690 (DG2)
[14:52:24] [PASSED] 0x5691 (DG2)
[14:52:24] [PASSED] 0x5692 (DG2)
[14:52:24] [PASSED] 0x56A5 (DG2)
[14:52:24] [PASSED] 0x56A6 (DG2)
[14:52:24] [PASSED] 0x56B0 (DG2)
[14:52:24] [PASSED] 0x56B1 (DG2)
[14:52:24] [PASSED] 0x56BA (DG2)
[14:52:24] [PASSED] 0x56BB (DG2)
[14:52:24] [PASSED] 0x56BC (DG2)
[14:52:24] [PASSED] 0x56BD (DG2)
[14:52:24] [PASSED] 0x5693 (DG2)
[14:52:24] [PASSED] 0x5694 (DG2)
[14:52:24] [PASSED] 0x5695 (DG2)
[14:52:24] [PASSED] 0x56A3 (DG2)
[14:52:24] [PASSED] 0x56A4 (DG2)
[14:52:24] [PASSED] 0x56B2 (DG2)
[14:52:24] [PASSED] 0x56B3 (DG2)
[14:52:24] [PASSED] 0x5696 (DG2)
[14:52:24] [PASSED] 0x5697 (DG2)
[14:52:24] [PASSED] 0xB69 (PVC)
[14:52:24] [PASSED] 0xB6E (PVC)
[14:52:24] [PASSED] 0xBD4 (PVC)
[14:52:24] [PASSED] 0xBD5 (PVC)
[14:52:24] [PASSED] 0xBD6 (PVC)
[14:52:24] [PASSED] 0xBD7 (PVC)
[14:52:24] [PASSED] 0xBD8 (PVC)
[14:52:24] [PASSED] 0xBD9 (PVC)
[14:52:24] [PASSED] 0xBDA (PVC)
[14:52:24] [PASSED] 0xBDB (PVC)
[14:52:24] [PASSED] 0xBE0 (PVC)
[14:52:24] [PASSED] 0xBE1 (PVC)
[14:52:24] [PASSED] 0xBE5 (PVC)
[14:52:24] [PASSED] 0x7D40 (METEORLAKE)
[14:52:24] [PASSED] 0x7D45 (METEORLAKE)
[14:52:24] [PASSED] 0x7D55 (METEORLAKE)
[14:52:24] [PASSED] 0x7D60 (METEORLAKE)
[14:52:24] [PASSED] 0x7DD5 (METEORLAKE)
[14:52:24] [PASSED] 0x6420 (LUNARLAKE)
[14:52:24] [PASSED] 0x64A0 (LUNARLAKE)
[14:52:24] [PASSED] 0x64B0 (LUNARLAKE)
[14:52:24] [PASSED] 0xE202 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE209 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE20B (BATTLEMAGE)
[14:52:24] [PASSED] 0xE20C (BATTLEMAGE)
[14:52:24] [PASSED] 0xE20D (BATTLEMAGE)
[14:52:24] [PASSED] 0xE210 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE211 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE212 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE216 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE220 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE221 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE222 (BATTLEMAGE)
[14:52:24] [PASSED] 0xE223 (BATTLEMAGE)
[14:52:24] [PASSED] 0xB080 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB081 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB082 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB083 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB084 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB085 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB086 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB087 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB08F (PANTHERLAKE)
[14:52:24] [PASSED] 0xB090 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:52:24] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:52:24] [PASSED] 0xFD80 (PANTHERLAKE)
[14:52:24] [PASSED] 0xFD81 (PANTHERLAKE)
[14:52:24] [PASSED] 0xD740 (NOVALAKE_S)
[14:52:24] [PASSED] 0xD741 (NOVALAKE_S)
[14:52:24] [PASSED] 0xD742 (NOVALAKE_S)
[14:52:24] [PASSED] 0xD743 (NOVALAKE_S)
[14:52:24] [PASSED] 0xD745 (NOVALAKE_S)
[14:52:24] [PASSED] 0xD74A (NOVALAKE_S)
[14:52:24] [PASSED] 0xD74B (NOVALAKE_S)
[14:52:24] [PASSED] 0x674C (CRESCENTISLAND)
[14:52:24] [PASSED] 0x674D (CRESCENTISLAND)
[14:52:24] [PASSED] 0x674E (CRESCENTISLAND)
[14:52:24] [PASSED] 0x674F (CRESCENTISLAND)
[14:52:24] [PASSED] 0x6750 (CRESCENTISLAND)
[14:52:24] [PASSED] 0xD750 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD751 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD752 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD753 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD754 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD755 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD756 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD757 (NOVALAKE_P)
[14:52:24] [PASSED] 0xD75F (NOVALAKE_P)
[14:52:24] =============== [PASSED] check_platform_desc ===============
[14:52:24] ===================== [PASSED] xe_pci ======================
[14:52:24] ============= xe_rtp_tables_test (5 subtests) ==============
[14:52:24] ================== xe_rtp_table_gt_test  ===================
[14:52:24] [PASSED] gt_was/14011060649
[14:52:24] [PASSED] gt_was/14011059788
[14:52:24] [PASSED] gt_was/14015795083
[14:52:24] [PASSED] gt_was/16021867713
[14:52:24] [PASSED] gt_was/14019449301
[14:52:24] [PASSED] gt_was/16028005424
[14:52:24] [PASSED] gt_was/14026578760
[14:52:24] [PASSED] gt_was/1409420604
[14:52:24] [PASSED] gt_was/1408615072
[14:52:24] [PASSED] gt_was/22010523718
[14:52:24] [PASSED] gt_was/14011006942
[14:52:24] [PASSED] gt_was/14014830051
[14:52:24] [PASSED] gt_was/18018781329
[14:52:24] [PASSED] gt_was/1509235366
[14:52:24] [PASSED] gt_was/18018781329
[14:52:24] [PASSED] gt_was/16016694945
[14:52:24] [PASSED] gt_was/14018575942
[14:52:24] [PASSED] gt_was/22016670082
[14:52:24] [PASSED] gt_was/22016670082
[14:52:24] [PASSED] gt_was/14017421178
[14:52:24] [PASSED] gt_was/16025250150
[14:52:24] [PASSED] gt_was/14021871409
[14:52:24] [PASSED] gt_was/16021865536
[14:52:24] [PASSED] gt_was/14021486841
[14:52:24] [PASSED] gt_was/14025160223
[14:52:24] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[14:52:24] [PASSED] gt_was/14025635424
[14:52:24] [PASSED] gt_was/16028005424
[14:52:24] ============== [PASSED] xe_rtp_table_gt_test ===============
[14:52:24] ================== xe_rtp_table_gt_test  ===================
[14:52:24] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[14:52:24] [PASSED] gt_tunings/Tuning: 32B Access Enable
[14:52:24] [PASSED] gt_tunings/Tuning: L3 cache
[14:52:24] [PASSED] gt_tunings/Tuning: L3 cache - media
[14:52:24] [PASSED] gt_tunings/Tuning: Compression Overfetch
[14:52:24] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[14:52:24] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[14:52:24] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[14:52:24] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[14:52:24] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[14:52:24] [PASSED] gt_tunings/Tuning: Stateless compression control
[14:52:24] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[14:52:24] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[14:52:24] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[14:52:24] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[14:52:24] ============== [PASSED] xe_rtp_table_gt_test ===============
[14:52:24] ================== xe_rtp_table_oob_test  ==================
[14:52:24] [PASSED] oob_was/1607983814
[14:52:24] [PASSED] oob_was/16010904313
[14:52:24] [PASSED] oob_was/18022495364
[14:52:24] [PASSED] oob_was/22012773006
[14:52:24] [PASSED] oob_was/14014475959
[14:52:24] [PASSED] oob_was/22011391025
[14:52:24] [PASSED] oob_was/22012727170
[14:52:24] [PASSED] oob_was/22012727685
[14:52:24] [PASSED] oob_was/22016596838
[14:52:24] [PASSED] oob_was/18020744125
[14:52:24] [PASSED] oob_was/1409600907
[14:52:24] [PASSED] oob_was/22014953428
[14:52:24] [PASSED] oob_was/16017236439
[14:52:24] [PASSED] oob_was/14019821291
[14:52:24] [PASSED] oob_was/14015076503
[14:52:24] [PASSED] oob_was/14018913170
[14:52:24] [PASSED] oob_was/14018094691
[14:52:24] [PASSED] oob_was/18024947630
[14:52:24] [PASSED] oob_was/16022287689
[14:52:24] [PASSED] oob_was/13011645652
[14:52:24] [PASSED] oob_was/14022293748
[14:52:24] [PASSED] oob_was/22019794406
[14:52:24] [PASSED] oob_was/22019338487
[14:52:24] [PASSED] oob_was/16023588340
[14:52:24] [PASSED] oob_was/14019789679
[14:52:24] [PASSED] oob_was/14022866841
[14:52:24] [PASSED] oob_was/16021333562
[14:52:24] [PASSED] oob_was/14016712196
[14:52:24] [PASSED] oob_was/14015568240
[14:52:24] [PASSED] oob_was/18013179988
[14:52:24] [PASSED] oob_was/1508761755
[14:52:24] [PASSED] oob_was/16023105232
[14:52:24] [PASSED] oob_was/16026508708
[14:52:24] [PASSED] oob_was/14020001231
[14:52:24] [PASSED] oob_was/16023683509
[14:52:24] [PASSED] oob_was/14025515070
[14:52:24] [PASSED] oob_was/15015404425_disable
[14:52:24] [PASSED] oob_was/16026007364
[14:52:24] [PASSED] oob_was/14020316580
[14:52:24] [PASSED] oob_was/14025883347
[14:52:24] [PASSED] oob_was/16029380221
[14:52:24] [PASSED] oob_was/22022079272
[14:52:24] [PASSED] oob_was/16029897822
[14:52:24] ============== [PASSED] xe_rtp_table_oob_test ==============
[14:52:24] ================ xe_rtp_table_dev_oob_test  ================
[14:52:24] [PASSED] device_oob_was/22010954014
[14:52:24] [PASSED] device_oob_was/15015404425
[14:52:24] [PASSED] device_oob_was/22019338487_display
[14:52:24] [PASSED] device_oob_was/14022085890
[14:52:24] [PASSED] device_oob_was/14026539277
[14:52:24] [PASSED] device_oob_was/14026633728
[14:52:24] [PASSED] device_oob_was/14026746987
[14:52:24] [PASSED] device_oob_was/14026779378
[14:52:24] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[14:52:24] ========== xe_rtp_table_missing_upper_bound_test  ==========
[14:52:24] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[14:52:24] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[14:52:24] [PASSED] register_whitelist/1806527549
[14:52:24] [PASSED] register_whitelist/allow_read_ctx_timestamp
[14:52:24] [PASSED] register_whitelist/allow_read_queue_timestamp
[14:52:24] [PASSED] register_whitelist/16014440446
[14:52:24] [PASSED] register_whitelist/16017236439
[14:52:24] [PASSED] register_whitelist/16020183090
[14:52:24] [PASSED] register_whitelist/14024997852
[14:52:24] [PASSED] register_whitelist/14024997852
[14:52:24] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[14:52:24] =============== [PASSED] xe_rtp_tables_test ================
[14:52:24] =================== xe_rtp (3 subtests) ====================
[14:52:24] =================== xe_rtp_rules_tests  ====================
[14:52:24] [PASSED] no
[14:52:24] [PASSED] yes
[14:52:24] [PASSED] no-and-no
[14:52:24] [PASSED] no-and-yes
[14:52:24] [PASSED] yes-and-no
[14:52:24] [PASSED] yes-and-yes
[14:52:24] [PASSED] no-or-no
[14:52:24] [PASSED] no-or-yes
[14:52:24] [PASSED] yes-or-no
[14:52:24] [PASSED] yes-or-yes
[14:52:24] [PASSED] no-yes-or-yes-no
[14:52:24] [PASSED] no-yes-or-yes-yes
[14:52:24] [PASSED] yes-yes-or-no-yes
[14:52:24] [PASSED] yes-yes-or-yes-yes
[14:52:24] [PASSED] no-no-or-yes-or-no
[14:52:24] [PASSED] or
[14:52:24] [PASSED] or-yes
[14:52:24] [PASSED] or-no
[14:52:24] [PASSED] yes-or
[14:52:24] [PASSED] no-or
[14:52:24] [PASSED] no-or-or-yes
[14:52:24] [PASSED] yes-or-or-no
[14:52:24] [PASSED] no-or-or-no
[14:52:24] [PASSED] missing-context-engine-class
[14:52:24] [PASSED] missing-context-engine-class-or-yes
[14:52:24] [PASSED] missing-context-engine-class-or-or-yes
[14:52:24] =============== [PASSED] xe_rtp_rules_tests ================
[14:52:24] =============== xe_rtp_process_to_sr_tests  ================
[14:52:24] [PASSED] coalesce-same-reg
[14:52:24] [PASSED] coalesce-same-reg-literal-and-func
[14:52:24] [PASSED] no-match-no-add
[14:52:24] [PASSED] two-regs-two-entries
[14:52:24] [PASSED] clr-one-set-other
[14:52:24] [PASSED] set-field
[14:52:24] [PASSED] conflict-duplicate
[14:52:24] [PASSED] conflict-not-disjoint
[14:52:24] [PASSED] conflict-not-disjoint-literal-and-func
[14:52:24] [PASSED] conflict-reg-type
[14:52:24] [PASSED] bad-mcr-reg-forced-to-regular
[14:52:24] [PASSED] bad-regular-reg-forced-to-mcr
[14:52:24] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:52:24] ================== xe_rtp_process_tests  ===================
[14:52:24] [PASSED] active1
[14:52:24] [PASSED] active2
[14:52:24] [PASSED] active-inactive
[14:52:24] [PASSED] inactive-active
[14:52:24] [PASSED] inactive-active-inactive
[14:52:24] [PASSED] inactive-inactive-inactive
[14:52:24] ============== [PASSED] xe_rtp_process_tests ===============
[14:52:24] ===================== [PASSED] xe_rtp ======================
[14:52:24] ==================== xe_wa (1 subtest) =====================
[14:52:24] ======================== xe_wa_gt  =========================
[14:52:24] [PASSED] TIGERLAKE B0
[14:52:24] [PASSED] DG1 A0
[14:52:24] [PASSED] DG1 B0
[14:52:24] [PASSED] ALDERLAKE_S A0
[14:52:24] [PASSED] ALDERLAKE_S B0
[14:52:24] [PASSED] ALDERLAKE_S C0
[14:52:24] [PASSED] ALDERLAKE_S D0
[14:52:24] [PASSED] ALDERLAKE_P A0
[14:52:24] [PASSED] ALDERLAKE_P B0
[14:52:24] [PASSED] ALDERLAKE_P C0
[14:52:24] [PASSED] ALDERLAKE_S RPLS D0
[14:52:24] [PASSED] ALDERLAKE_P RPLU E0
[14:52:24] [PASSED] DG2 G10 C0
[14:52:24] [PASSED] DG2 G11 B1
[14:52:24] [PASSED] DG2 G12 A1
[14:52:24] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:52:24] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:52:24] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:52:24] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:52:24] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:52:24] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:52:24] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:52:24] ==================== [PASSED] xe_wa_gt =====================
[14:52:24] ====================== [PASSED] xe_wa ======================
[14:52:24] ============================================================
[14:52:24] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[14:52:24] Elapsed time: 36.742s total, 4.351s configuring, 31.721s building, 0.646s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:52:24] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:52:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:52:51] Starting KUnit Kernel (1/1)...
[14:52:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:52:51] ============ drm_test_pick_cmdline (2 subtests) ============
[14:52:51] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:52:51] =============== drm_test_pick_cmdline_named  ===============
[14:52:51] [PASSED] NTSC
[14:52:51] [PASSED] NTSC-J
[14:52:51] [PASSED] PAL
[14:52:51] [PASSED] PAL-M
[14:52:51] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:52:51] ============== [PASSED] drm_test_pick_cmdline ==============
[14:52:51] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:52:51] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:52:51] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:52:51] =========== drm_validate_clone_mode (2 subtests) ===========
[14:52:51] ============== drm_test_check_in_clone_mode  ===============
[14:52:51] [PASSED] in_clone_mode
[14:52:51] [PASSED] not_in_clone_mode
[14:52:51] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:52:51] =============== drm_test_check_valid_clones  ===============
[14:52:51] [PASSED] not_in_clone_mode
[14:52:51] [PASSED] valid_clone
[14:52:51] [PASSED] invalid_clone
[14:52:51] =========== [PASSED] drm_test_check_valid_clones ===========
[14:52:51] ============= [PASSED] drm_validate_clone_mode =============
[14:52:51] ============= drm_validate_modeset (1 subtest) =============
[14:52:51] [PASSED] drm_test_check_connector_changed_modeset
[14:52:51] ============== [PASSED] drm_validate_modeset ===============
[14:52:51] ====== drm_test_bridge_get_current_state (1 subtest) =======
[14:52:51] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:52:51] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:52:51] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:52:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:52:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:52:51] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[14:52:51] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:52:51] ============== drm_bridge_alloc (2 subtests) ===============
[14:52:51] [PASSED] drm_test_drm_bridge_alloc_basic
[14:52:51] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:52:51] ================ [PASSED] drm_bridge_alloc =================
[14:52:51] ============= drm_bridge_bus_fmt (5 subtests) ==============
[14:52:51] [PASSED] drm_test_bridge_rgb_yuv_rgb
[14:52:51] [PASSED] drm_test_bridge_must_convert_to_yuv444
[14:52:51] [PASSED] drm_test_bridge_hdmi_auto_rgb
[14:52:51] [PASSED] drm_test_bridge_auto_first
[14:52:51] [PASSED] drm_test_bridge_rgb_yuv_no_path
[14:52:51] =============== [PASSED] drm_bridge_bus_fmt ================
[14:52:51] ============= drm_cmdline_parser (40 subtests) =============
[14:52:51] [PASSED] drm_test_cmdline_force_d_only
[14:52:51] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:52:51] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:52:51] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:52:51] [PASSED] drm_test_cmdline_force_e_only
[14:52:51] [PASSED] drm_test_cmdline_res
[14:52:51] [PASSED] drm_test_cmdline_res_vesa
[14:52:51] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:52:51] [PASSED] drm_test_cmdline_res_rblank
[14:52:51] [PASSED] drm_test_cmdline_res_bpp
[14:52:51] [PASSED] drm_test_cmdline_res_refresh
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:52:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:52:51] [PASSED] drm_test_cmdline_res_margins_force_on
[14:52:51] [PASSED] drm_test_cmdline_res_vesa_margins
[14:52:51] [PASSED] drm_test_cmdline_name
[14:52:51] [PASSED] drm_test_cmdline_name_bpp
[14:52:51] [PASSED] drm_test_cmdline_name_option
[14:52:51] [PASSED] drm_test_cmdline_name_bpp_option
[14:52:51] [PASSED] drm_test_cmdline_rotate_0
[14:52:51] [PASSED] drm_test_cmdline_rotate_90
[14:52:51] [PASSED] drm_test_cmdline_rotate_180
[14:52:51] [PASSED] drm_test_cmdline_rotate_270
[14:52:51] [PASSED] drm_test_cmdline_hmirror
[14:52:51] [PASSED] drm_test_cmdline_vmirror
[14:52:51] [PASSED] drm_test_cmdline_margin_options
[14:52:51] [PASSED] drm_test_cmdline_multiple_options
[14:52:51] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:52:51] [PASSED] drm_test_cmdline_extra_and_option
[14:52:51] [PASSED] drm_test_cmdline_freestanding_options
[14:52:51] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:52:51] [PASSED] drm_test_cmdline_panel_orientation
[14:52:51] ================ drm_test_cmdline_invalid  =================
[14:52:51] [PASSED] margin_only
[14:52:51] [PASSED] interlace_only
[14:52:51] [PASSED] res_missing_x
[14:52:51] [PASSED] res_missing_y
[14:52:51] [PASSED] res_bad_y
[14:52:51] [PASSED] res_missing_y_bpp
[14:52:51] [PASSED] res_bad_bpp
[14:52:51] [PASSED] res_bad_refresh
[14:52:51] [PASSED] res_bpp_refresh_force_on_off
[14:52:51] [PASSED] res_invalid_mode
[14:52:51] [PASSED] res_bpp_wrong_place_mode
[14:52:51] [PASSED] name_bpp_refresh
[14:52:51] [PASSED] name_refresh
[14:52:51] [PASSED] name_refresh_wrong_mode
[14:52:51] [PASSED] name_refresh_invalid_mode
[14:52:51] [PASSED] rotate_multiple
[14:52:51] [PASSED] rotate_invalid_val
[14:52:51] [PASSED] rotate_truncated
[14:52:51] [PASSED] invalid_option
[14:52:51] [PASSED] invalid_tv_option
[14:52:51] [PASSED] truncated_tv_option
[14:52:51] ============ [PASSED] drm_test_cmdline_invalid =============
[14:52:51] =============== drm_test_cmdline_tv_options  ===============
[14:52:51] [PASSED] NTSC
[14:52:51] [PASSED] NTSC_443
[14:52:51] [PASSED] NTSC_J
[14:52:51] [PASSED] PAL
[14:52:51] [PASSED] PAL_M
[14:52:51] [PASSED] PAL_N
[14:52:51] [PASSED] SECAM
[14:52:51] [PASSED] MONO_525
[14:52:51] [PASSED] MONO_625
[14:52:51] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:52:51] =============== [PASSED] drm_cmdline_parser ================
[14:52:51] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:52:51] [PASSED] drm_test_connector_hdmi_init_valid
[14:52:51] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:52:51] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:52:51] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:52:51] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:52:51] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:52:51] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:52:51] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:52:51] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[14:52:51] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:52:51] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:52:51] [PASSED] supported_formats=0x5 yuv420_allowed=1
[14:52:51] [PASSED] supported_formats=0x5 yuv420_allowed=0
[14:52:51] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:52:51] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:52:51] [PASSED] drm_test_connector_hdmi_init_null_product
[14:52:51] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:52:51] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:52:51] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:52:51] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:52:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:52:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:52:51] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:52:51] ========= drm_test_connector_hdmi_init_type_valid  =========
[14:52:51] [PASSED] HDMI-A
[14:52:51] [PASSED] HDMI-B
[14:52:51] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:52:51] ======== drm_test_connector_hdmi_init_type_invalid  ========
[14:52:51] [PASSED] Unknown
[14:52:51] [PASSED] VGA
[14:52:51] [PASSED] DVI-I
[14:52:51] [PASSED] DVI-D
[14:52:51] [PASSED] DVI-A
[14:52:51] [PASSED] Composite
[14:52:51] [PASSED] SVIDEO
[14:52:51] [PASSED] LVDS
[14:52:51] [PASSED] Component
[14:52:51] [PASSED] DIN
[14:52:51] [PASSED] DP
[14:52:51] [PASSED] TV
[14:52:51] [PASSED] eDP
[14:52:51] [PASSED] Virtual
[14:52:51] [PASSED] DSI
[14:52:51] [PASSED] DPI
[14:52:51] [PASSED] Writeback
[14:52:51] [PASSED] SPI
[14:52:51] [PASSED] USB
[14:52:51] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:52:51] ============ [PASSED] drmm_connector_hdmi_init =============
[14:52:51] ============= drmm_connector_init (3 subtests) =============
[14:52:51] [PASSED] drm_test_drmm_connector_init
[14:52:51] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:52:51] ========= drm_test_drmm_connector_init_type_valid  =========
[14:52:51] [PASSED] Unknown
[14:52:51] [PASSED] VGA
[14:52:51] [PASSED] DVI-I
[14:52:51] [PASSED] DVI-D
[14:52:51] [PASSED] DVI-A
[14:52:51] [PASSED] Composite
[14:52:51] [PASSED] SVIDEO
[14:52:51] [PASSED] LVDS
[14:52:51] [PASSED] Component
[14:52:51] [PASSED] DIN
[14:52:51] [PASSED] DP
[14:52:51] [PASSED] HDMI-A
[14:52:51] [PASSED] HDMI-B
[14:52:51] [PASSED] TV
[14:52:51] [PASSED] eDP
[14:52:51] [PASSED] Virtual
[14:52:51] [PASSED] DSI
[14:52:51] [PASSED] DPI
[14:52:51] [PASSED] Writeback
[14:52:51] [PASSED] SPI
[14:52:51] [PASSED] USB
[14:52:51] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:52:51] =============== [PASSED] drmm_connector_init ===============
[14:52:51] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_init
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:52:51] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[14:52:51] [PASSED] Unknown
[14:52:51] [PASSED] VGA
[14:52:51] [PASSED] DVI-I
[14:52:51] [PASSED] DVI-D
[14:52:51] [PASSED] DVI-A
[14:52:51] [PASSED] Composite
[14:52:51] [PASSED] SVIDEO
[14:52:51] [PASSED] LVDS
[14:52:51] [PASSED] Component
[14:52:51] [PASSED] DIN
[14:52:51] [PASSED] DP
[14:52:51] [PASSED] HDMI-A
[14:52:51] [PASSED] HDMI-B
[14:52:51] [PASSED] TV
[14:52:51] [PASSED] eDP
[14:52:51] [PASSED] Virtual
[14:52:51] [PASSED] DSI
[14:52:51] [PASSED] DPI
[14:52:51] [PASSED] Writeback
[14:52:51] [PASSED] SPI
[14:52:51] [PASSED] USB
[14:52:51] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:52:51] ======== drm_test_drm_connector_dynamic_init_name  =========
[14:52:51] [PASSED] Unknown
[14:52:51] [PASSED] VGA
[14:52:51] [PASSED] DVI-I
[14:52:51] [PASSED] DVI-D
[14:52:51] [PASSED] DVI-A
[14:52:51] [PASSED] Composite
[14:52:51] [PASSED] SVIDEO
[14:52:51] [PASSED] LVDS
[14:52:51] [PASSED] Component
[14:52:51] [PASSED] DIN
[14:52:51] [PASSED] DP
[14:52:51] [PASSED] HDMI-A
[14:52:51] [PASSED] HDMI-B
[14:52:51] [PASSED] TV
[14:52:51] [PASSED] eDP
[14:52:51] [PASSED] Virtual
[14:52:51] [PASSED] DSI
[14:52:51] [PASSED] DPI
[14:52:51] [PASSED] Writeback
[14:52:51] [PASSED] SPI
[14:52:51] [PASSED] USB
[14:52:51] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:52:51] =========== [PASSED] drm_connector_dynamic_init ============
[14:52:51] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:52:51] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:52:51] ======= drm_connector_dynamic_register (7 subtests) ========
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:52:51] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:52:51] ========= [PASSED] drm_connector_dynamic_register ==========
[14:52:51] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:52:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:52:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:52:51] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:52:51] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:52:51] ========== drm_test_get_tv_mode_from_name_valid  ===========
[14:52:51] [PASSED] NTSC
[14:52:51] [PASSED] NTSC-443
[14:52:51] [PASSED] NTSC-J
[14:52:51] [PASSED] PAL
[14:52:51] [PASSED] PAL-M
[14:52:51] [PASSED] PAL-N
[14:52:51] [PASSED] SECAM
[14:52:51] [PASSED] Mono
[14:52:51] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:52:51] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:52:51] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:52:51] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:52:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:52:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:52:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:52:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:52:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:52:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:52:51] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[14:52:51] [PASSED] VIC 96
[14:52:51] [PASSED] VIC 97
[14:52:51] [PASSED] VIC 101
[14:52:51] [PASSED] VIC 102
[14:52:51] [PASSED] VIC 106
[14:52:51] [PASSED] VIC 107
[14:52:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:52:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:52:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:52:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:52:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:52:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:52:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:52:51] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:52:51] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[14:52:51] [PASSED] Automatic
[14:52:51] [PASSED] Full
[14:52:51] [PASSED] Limited 16:235
[14:52:51] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:52:51] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:52:51] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:52:51] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:52:51] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[14:52:51] [PASSED] RGB
[14:52:51] [PASSED] YUV 4:2:0
[14:52:51] [PASSED] YUV 4:2:2
[14:52:51] [PASSED] YUV 4:4:4
[14:52:51] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:52:51] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:52:51] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:52:51] ============= drm_damage_helper (21 subtests) ==============
[14:52:51] [PASSED] drm_test_damage_iter_no_damage
[14:52:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:52:51] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:52:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:52:51] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:52:51] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:52:51] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:52:51] [PASSED] drm_test_damage_iter_simple_damage
[14:52:51] [PASSED] drm_test_damage_iter_single_damage
[14:52:51] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:52:51] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:52:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:52:51] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:52:51] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:52:51] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:52:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:52:51] [PASSED] drm_test_damage_iter_damage
[14:52:51] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:52:51] [PASSED] drm_test_damage_iter_damage_one_outside
[14:52:51] [PASSED] drm_test_damage_iter_damage_src_moved
[14:52:51] [PASSED] drm_test_damage_iter_damage_not_visible
[14:52:51] ================ [PASSED] drm_damage_helper ================
[14:52:51] ============== drm_dp_mst_helper (3 subtests) ==============
[14:52:51] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[14:52:51] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:52:51] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:52:51] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:52:51] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:52:51] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:52:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:52:51] ============== drm_test_dp_mst_calc_pbn_div  ===============
[14:52:51] [PASSED] Link rate 2000000 lane count 4
[14:52:51] [PASSED] Link rate 2000000 lane count 2
[14:52:51] [PASSED] Link rate 2000000 lane count 1
[14:52:51] [PASSED] Link rate 1350000 lane count 4
[14:52:51] [PASSED] Link rate 1350000 lane count 2
[14:52:51] [PASSED] Link rate 1350000 lane count 1
[14:52:51] [PASSED] Link rate 1000000 lane count 4
[14:52:51] [PASSED] Link rate 1000000 lane count 2
[14:52:51] [PASSED] Link rate 1000000 lane count 1
[14:52:51] [PASSED] Link rate 810000 lane count 4
[14:52:51] [PASSED] Link rate 810000 lane count 2
[14:52:51] [PASSED] Link rate 810000 lane count 1
[14:52:51] [PASSED] Link rate 540000 lane count 4
[14:52:51] [PASSED] Link rate 540000 lane count 2
[14:52:51] [PASSED] Link rate 540000 lane count 1
[14:52:51] [PASSED] Link rate 270000 lane count 4
[14:52:51] [PASSED] Link rate 270000 lane count 2
[14:52:51] [PASSED] Link rate 270000 lane count 1
[14:52:51] [PASSED] Link rate 162000 lane count 4
[14:52:51] [PASSED] Link rate 162000 lane count 2
[14:52:51] [PASSED] Link rate 162000 lane count 1
[14:52:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:52:51] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[14:52:51] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:52:51] [PASSED] DP_POWER_UP_PHY with port number
[14:52:51] [PASSED] DP_POWER_DOWN_PHY with port number
[14:52:51] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:52:51] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:52:51] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:52:51] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:52:51] [PASSED] DP_QUERY_PAYLOAD with port number
[14:52:51] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:52:51] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:52:51] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:52:51] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:52:51] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:52:51] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:52:51] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:52:51] [PASSED] DP_REMOTE_I2C_READ with port number
[14:52:51] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:52:51] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:52:51] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:52:51] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:52:51] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:52:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:52:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:52:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:52:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:52:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:52:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:52:51] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:52:51] ================ [PASSED] drm_dp_mst_helper ================
[14:52:51] ================== drm_exec (7 subtests) ===================
[14:52:51] [PASSED] sanitycheck
[14:52:51] [PASSED] test_lock
[14:52:51] [PASSED] test_lock_unlock
[14:52:51] [PASSED] test_duplicates
[14:52:51] [PASSED] test_prepare
[14:52:51] [PASSED] test_prepare_array
[14:52:51] [PASSED] test_multiple_loops
[14:52:51] ==================== [PASSED] drm_exec =====================
[14:52:51] =========== drm_format_helper_test (17 subtests) ===========
[14:52:51] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:52:51] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:52:51] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:52:51] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:52:51] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:52:51] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:52:51] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:52:51] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:52:51] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:52:51] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:52:51] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:52:51] ============== drm_test_fb_xrgb8888_to_mono  ===============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:52:51] ==================== drm_test_fb_swab  =====================
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ================ [PASSED] drm_test_fb_swab =================
[14:52:51] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:52:51] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[14:52:51] [PASSED] single_pixel_source_buffer
[14:52:51] [PASSED] single_pixel_clip_rectangle
[14:52:51] [PASSED] well_known_colors
[14:52:51] [PASSED] destination_pitch
[14:52:51] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:52:51] ================= drm_test_fb_clip_offset  =================
[14:52:51] [PASSED] pass through
[14:52:51] [PASSED] horizontal offset
[14:52:51] [PASSED] vertical offset
[14:52:51] [PASSED] horizontal and vertical offset
[14:52:51] [PASSED] horizontal offset (custom pitch)
[14:52:51] [PASSED] vertical offset (custom pitch)
[14:52:51] [PASSED] horizontal and vertical offset (custom pitch)
[14:52:51] ============= [PASSED] drm_test_fb_clip_offset =============
[14:52:51] =================== drm_test_fb_memcpy  ====================
[14:52:51] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:52:51] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:52:51] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:52:51] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:52:51] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:52:51] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:52:51] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:52:51] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:52:51] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:52:51] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:52:51] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:52:51] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:52:51] =============== [PASSED] drm_test_fb_memcpy ================
[14:52:51] ============= [PASSED] drm_format_helper_test ==============
[14:52:51] ================= drm_format (18 subtests) =================
[14:52:51] [PASSED] drm_test_format_block_width_invalid
[14:52:51] [PASSED] drm_test_format_block_width_one_plane
[14:52:51] [PASSED] drm_test_format_block_width_two_plane
[14:52:51] [PASSED] drm_test_format_block_width_three_plane
[14:52:51] [PASSED] drm_test_format_block_width_tiled
[14:52:51] [PASSED] drm_test_format_block_height_invalid
[14:52:51] [PASSED] drm_test_format_block_height_one_plane
[14:52:51] [PASSED] drm_test_format_block_height_two_plane
[14:52:51] [PASSED] drm_test_format_block_height_three_plane
[14:52:51] [PASSED] drm_test_format_block_height_tiled
[14:52:51] [PASSED] drm_test_format_min_pitch_invalid
[14:52:51] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:52:51] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:52:51] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:52:51] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:52:51] [PASSED] drm_test_format_min_pitch_two_plane
[14:52:51] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:52:51] [PASSED] drm_test_format_min_pitch_tiled
[14:52:51] =================== [PASSED] drm_format ====================
[14:52:51] ============== drm_framebuffer (10 subtests) ===============
[14:52:51] ========== drm_test_framebuffer_check_src_coords  ==========
[14:52:51] [PASSED] Success: source fits into fb
[14:52:51] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:52:51] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:52:51] [PASSED] Fail: overflowing fb with source width
[14:52:51] [PASSED] Fail: overflowing fb with source height
[14:52:51] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:52:51] [PASSED] drm_test_framebuffer_cleanup
[14:52:51] =============== drm_test_framebuffer_create  ===============
[14:52:51] [PASSED] ABGR8888 normal sizes
[14:52:51] [PASSED] ABGR8888 max sizes
[14:52:51] [PASSED] ABGR8888 pitch greater than min required
[14:52:51] [PASSED] ABGR8888 pitch less than min required
[14:52:51] [PASSED] ABGR8888 Invalid width
[14:52:51] [PASSED] ABGR8888 Invalid buffer handle
[14:52:51] [PASSED] No pixel format
[14:52:51] [PASSED] ABGR8888 Width 0
[14:52:51] [PASSED] ABGR8888 Height 0
[14:52:51] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:52:51] [PASSED] ABGR8888 Large buffer offset
[14:52:51] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:52:51] [PASSED] ABGR8888 Invalid flag
[14:52:51] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:52:51] [PASSED] ABGR8888 Valid buffer modifier
[14:52:51] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:52:51] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:52:51] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:52:51] [PASSED] NV12 Normal sizes
[14:52:51] [PASSED] NV12 Max sizes
[14:52:51] [PASSED] NV12 Invalid pitch
[14:52:51] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:52:51] [PASSED] NV12 different  modifier per-plane
[14:52:51] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:52:51] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:52:51] [PASSED] NV12 Modifier for inexistent plane
[14:52:51] [PASSED] NV12 Handle for inexistent plane
[14:52:51] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:52:51] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:52:51] [PASSED] YVU420 Normal sizes
[14:52:51] [PASSED] YVU420 Max sizes
[14:52:51] [PASSED] YVU420 Invalid pitch
[14:52:51] [PASSED] YVU420 Different pitches
[14:52:51] [PASSED] YVU420 Different buffer offsets/pitches
[14:52:51] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:52:51] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:52:51] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:52:51] [PASSED] YVU420 Valid modifier
[14:52:51] [PASSED] YVU420 Different modifiers per plane
[14:52:51] [PASSED] YVU420 Modifier for inexistent plane
[14:52:51] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:52:51] [PASSED] X0L2 Normal sizes
[14:52:51] [PASSED] X0L2 Max sizes
[14:52:51] [PASSED] X0L2 Invalid pitch
[14:52:51] [PASSED] X0L2 Pitch greater than minimum required
[14:52:51] [PASSED] X0L2 Handle for inexistent plane
[14:52:51] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:52:51] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:52:51] [PASSED] X0L2 Valid modifier
[14:52:51] [PASSED] X0L2 Modifier for inexistent plane
[14:52:51] =========== [PASSED] drm_test_framebuffer_create ===========
[14:52:51] [PASSED] drm_test_framebuffer_free
[14:52:51] [PASSED] drm_test_framebuffer_init
[14:52:51] [PASSED] drm_test_framebuffer_init_bad_format
[14:52:51] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:52:51] [PASSED] drm_test_framebuffer_lookup
[14:52:51] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:52:51] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:52:51] ================= [PASSED] drm_framebuffer =================
[14:52:51] ================ drm_gem_shmem (8 subtests) ================
[14:52:51] [PASSED] drm_gem_shmem_test_obj_create
[14:52:51] [PASSED] drm_gem_shmem_test_obj_create_private
[14:52:51] [PASSED] drm_gem_shmem_test_pin_pages
[14:52:51] [PASSED] drm_gem_shmem_test_vmap
[14:52:51] [PASSED] drm_gem_shmem_test_get_sg_table
[14:52:51] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:52:51] [PASSED] drm_gem_shmem_test_madvise
[14:52:51] [PASSED] drm_gem_shmem_test_purge
[14:52:51] ================== [PASSED] drm_gem_shmem ==================
[14:52:51] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:52:51] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[14:52:51] [PASSED] Automatic
[14:52:51] [PASSED] Full
[14:52:51] [PASSED] Limited 16:235
[14:52:51] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:52:51] [PASSED] drm_test_check_disable_connector
[14:52:51] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:52:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:52:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:52:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:52:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:52:51] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:52:51] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:52:51] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:52:51] [PASSED] drm_test_check_output_bpc_dvi
[14:52:51] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:52:51] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:52:51] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:52:51] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:52:51] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:52:51] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:52:51] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:52:51] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:52:51] ============ drm_test_check_hdmi_color_format  =============
[14:52:51] [PASSED] AUTO -> RGB
[14:52:51] [PASSED] YCBCR422 -> YUV422
[14:52:51] [PASSED] YCBCR420 -> YUV420
[14:52:51] [PASSED] YCBCR444 -> YUV444
[14:52:51] [PASSED] RGB -> RGB
[14:52:51] ======== [PASSED] drm_test_check_hdmi_color_format =========
[14:52:51] ======== drm_test_check_hdmi_color_format_420_only  ========
[14:52:51] [PASSED] RGB should fail
[14:52:51] [PASSED] YUV444 should fail
[14:52:51] [PASSED] YUV422 should fail
[14:52:51] [PASSED] YUV420 should work
[14:52:51] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[14:52:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:52:51] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:52:51] [PASSED] drm_test_check_broadcast_rgb_value
[14:52:51] [PASSED] drm_test_check_bpc_8_value
[14:52:51] [PASSED] drm_test_check_bpc_10_value
[14:52:51] [PASSED] drm_test_check_bpc_12_value
[14:52:51] [PASSED] drm_test_check_format_value
[14:52:51] [PASSED] drm_test_check_tmds_char_value
[14:52:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:52:51] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[14:52:51] [PASSED] drm_test_check_mode_valid
[14:52:51] [PASSED] drm_test_check_mode_valid_reject
[14:52:51] [PASSED] drm_test_check_mode_valid_reject_rate
[14:52:51] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:52:51] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[14:52:51] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[14:52:51] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[14:52:51] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:52:51] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[14:52:51] [PASSED] drm_test_check_infoframes
[14:52:51] [PASSED] drm_test_check_reject_avi_infoframe
[14:52:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[14:52:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[14:52:51] [PASSED] drm_test_check_reject_audio_infoframe
[14:52:51] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[14:52:51] ================= drm_managed (2 subtests) =================
[14:52:51] [PASSED] drm_test_managed_release_action
[14:52:51] [PASSED] drm_test_managed_run_action
[14:52:51] =================== [PASSED] drm_managed ===================
[14:52:51] =================== drm_mm (6 subtests) ====================
[14:52:51] [PASSED] drm_test_mm_init
[14:52:51] [PASSED] drm_test_mm_debug
[14:52:51] [PASSED] drm_test_mm_align32
[14:52:51] [PASSED] drm_test_mm_align64
[14:52:51] [PASSED] drm_test_mm_lowest
[14:52:51] [PASSED] drm_test_mm_highest
[14:52:51] ===================== [PASSED] drm_mm ======================
[14:52:51] ============= drm_modes_analog_tv (5 subtests) =============
[14:52:51] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:52:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:52:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:52:51] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:52:51] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:52:51] =============== [PASSED] drm_modes_analog_tv ===============
[14:52:51] ============== drm_plane_helper (2 subtests) ===============
[14:52:51] =============== drm_test_check_plane_state  ================
[14:52:51] [PASSED] clipping_simple
[14:52:51] [PASSED] clipping_rotate_reflect
[14:52:51] [PASSED] positioning_simple
[14:52:51] [PASSED] upscaling
[14:52:51] [PASSED] downscaling
[14:52:51] [PASSED] rounding1
[14:52:51] [PASSED] rounding2
[14:52:51] [PASSED] rounding3
[14:52:51] [PASSED] rounding4
[14:52:51] =========== [PASSED] drm_test_check_plane_state ============
[14:52:51] =========== drm_test_check_invalid_plane_state  ============
[14:52:51] [PASSED] positioning_invalid
[14:52:51] [PASSED] upscaling_invalid
[14:52:51] [PASSED] downscaling_invalid
[14:52:51] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:52:51] ================ [PASSED] drm_plane_helper =================
[14:52:51] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:52:51] ====== drm_test_connector_helper_tv_get_modes_check  =======
[14:52:51] [PASSED] None
[14:52:51] [PASSED] PAL
[14:52:51] [PASSED] NTSC
[14:52:51] [PASSED] Both, NTSC Default
[14:52:51] [PASSED] Both, PAL Default
[14:52:51] [PASSED] Both, NTSC Default, with PAL on command-line
[14:52:51] [PASSED] Both, PAL Default, with NTSC on command-line
[14:52:51] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:52:51] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:52:51] ================== drm_rect (9 subtests) ===================
[14:52:51] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:52:51] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:52:51] [PASSED] drm_test_rect_clip_scaled_clipped
[14:52:51] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:52:51] ================= drm_test_rect_intersect  =================
[14:52:51] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:52:51] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:52:51] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:52:51] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:52:51] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:52:51] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:52:51] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:52:51] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:52:51] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:52:51] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:52:51] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:52:51] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:52:51] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:52:51] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:52:51] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:52:51] ============= [PASSED] drm_test_rect_intersect =============
[14:52:51] ================ drm_test_rect_calc_hscale  ================
[14:52:51] [PASSED] normal use
[14:52:51] [PASSED] out of max range
[14:52:51] [PASSED] out of min range
[14:52:51] [PASSED] zero dst
[14:52:51] [PASSED] negative src
[14:52:51] [PASSED] negative dst
[14:52:51] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:52:51] ================ drm_test_rect_calc_vscale  ================
[14:52:51] [PASSED] normal use
[14:52:51] [PASSED] out of max range
[14:52:51] [PASSED] out of min range
[14:52:51] [PASSED] zero dst
[14:52:51] [PASSED] negative src
[14:52:51] [PASSED] negative dst
[14:52:51] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:52:51] ================== drm_test_rect_rotate  ===================
[14:52:51] [PASSED] reflect-x
[14:52:51] [PASSED] reflect-y
[14:52:51] [PASSED] rotate-0
[14:52:51] [PASSED] rotate-90
[14:52:51] [PASSED] rotate-180
[14:52:51] [PASSED] rotate-270
[14:52:51] ============== [PASSED] drm_test_rect_rotate ===============
[14:52:51] ================ drm_test_rect_rotate_inv  =================
[14:52:51] [PASSED] reflect-x
[14:52:51] [PASSED] reflect-y
[14:52:51] [PASSED] rotate-0
[14:52:51] [PASSED] rotate-90
[14:52:51] [PASSED] rotate-180
[14:52:51] [PASSED] rotate-270
[14:52:51] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:52:51] ==================== [PASSED] drm_rect =====================
[14:52:51] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:52:51] ============ drm_test_sysfb_build_fourcc_list  =============
[14:52:51] [PASSED] no native formats
[14:52:51] [PASSED] XRGB8888 as native format
[14:52:51] [PASSED] remove duplicates
[14:52:51] [PASSED] convert alpha formats
[14:52:51] [PASSED] random formats
[14:52:51] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:52:51] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:52:51] ================== drm_fixp (2 subtests) ===================
[14:52:51] [PASSED] drm_test_int2fixp
[14:52:51] [PASSED] drm_test_sm2fixp
[14:52:51] ==================== [PASSED] drm_fixp =====================
[14:52:51] ============================================================
[14:52:51] Testing complete. Ran 637 tests: passed: 637
[14:52:51] Elapsed time: 26.667s total, 1.794s configuring, 24.708s building, 0.138s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:52:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:52:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:53:02] Starting KUnit Kernel (1/1)...
[14:53:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:53:03] ================= ttm_device (5 subtests) ==================
[14:53:03] [PASSED] ttm_device_init_basic
[14:53:03] [PASSED] ttm_device_init_multiple
[14:53:03] [PASSED] ttm_device_fini_basic
[14:53:03] [PASSED] ttm_device_init_no_vma_man
[14:53:03] ================== ttm_device_init_pools  ==================
[14:53:03] [PASSED] No DMA allocations, no DMA32 required
[14:53:03] [PASSED] DMA allocations, DMA32 required
[14:53:03] [PASSED] No DMA allocations, DMA32 required
[14:53:03] [PASSED] DMA allocations, no DMA32 required
[14:53:03] ============== [PASSED] ttm_device_init_pools ==============
[14:53:03] =================== [PASSED] ttm_device ====================
[14:53:03] ================== ttm_pool (8 subtests) ===================
[14:53:03] ================== ttm_pool_alloc_basic  ===================
[14:53:03] [PASSED] One page
[14:53:03] [PASSED] More than one page
[14:53:03] [PASSED] Above the allocation limit
[14:53:03] [PASSED] One page, with coherent DMA mappings enabled
[14:53:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:53:03] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:53:03] ============== ttm_pool_alloc_basic_dma_addr  ==============
[14:53:03] [PASSED] One page
[14:53:03] [PASSED] More than one page
[14:53:03] [PASSED] Above the allocation limit
[14:53:03] [PASSED] One page, with coherent DMA mappings enabled
[14:53:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:53:03] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:53:03] [PASSED] ttm_pool_alloc_order_caching_match
[14:53:03] [PASSED] ttm_pool_alloc_caching_mismatch
[14:53:03] [PASSED] ttm_pool_alloc_order_mismatch
[14:53:03] [PASSED] ttm_pool_free_dma_alloc
[14:53:03] [PASSED] ttm_pool_free_no_dma_alloc
[14:53:03] [PASSED] ttm_pool_fini_basic
[14:53:03] ==================== [PASSED] ttm_pool =====================
[14:53:03] ================ ttm_resource (8 subtests) =================
[14:53:03] ================= ttm_resource_init_basic  =================
[14:53:03] [PASSED] Init resource in TTM_PL_SYSTEM
[14:53:03] [PASSED] Init resource in TTM_PL_VRAM
[14:53:03] [PASSED] Init resource in a private placement
[14:53:03] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:53:03] ============= [PASSED] ttm_resource_init_basic =============
[14:53:03] [PASSED] ttm_resource_init_pinned
[14:53:03] [PASSED] ttm_resource_fini_basic
[14:53:03] [PASSED] ttm_resource_manager_init_basic
[14:53:03] [PASSED] ttm_resource_manager_usage_basic
[14:53:03] [PASSED] ttm_resource_manager_set_used_basic
[14:53:03] [PASSED] ttm_sys_man_alloc_basic
[14:53:03] [PASSED] ttm_sys_man_free_basic
[14:53:03] ================== [PASSED] ttm_resource ===================
[14:53:03] =================== ttm_tt (15 subtests) ===================
[14:53:03] ==================== ttm_tt_init_basic  ====================
[14:53:03] [PASSED] Page-aligned size
[14:53:03] [PASSED] Extra pages requested
[14:53:03] ================ [PASSED] ttm_tt_init_basic ================
[14:53:03] [PASSED] ttm_tt_init_misaligned
[14:53:03] [PASSED] ttm_tt_fini_basic
[14:53:03] [PASSED] ttm_tt_fini_sg
[14:53:03] [PASSED] ttm_tt_fini_shmem
[14:53:03] [PASSED] ttm_tt_create_basic
[14:53:03] [PASSED] ttm_tt_create_invalid_bo_type
[14:53:03] [PASSED] ttm_tt_create_ttm_exists
[14:53:03] [PASSED] ttm_tt_create_failed
[14:53:03] [PASSED] ttm_tt_destroy_basic
[14:53:03] [PASSED] ttm_tt_populate_null_ttm
[14:53:03] [PASSED] ttm_tt_populate_populated_ttm
[14:53:03] [PASSED] ttm_tt_unpopulate_basic
[14:53:03] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:53:03] [PASSED] ttm_tt_swapin_basic
[14:53:03] ===================== [PASSED] ttm_tt ======================
[14:53:03] =================== ttm_bo (14 subtests) ===================
[14:53:03] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[14:53:03] [PASSED] Cannot be interrupted and sleeps
[14:53:03] [PASSED] Cannot be interrupted, locks straight away
[14:53:03] [PASSED] Can be interrupted, sleeps
[14:53:03] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:53:03] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:53:03] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:53:03] [PASSED] ttm_bo_reserve_double_resv
[14:53:03] [PASSED] ttm_bo_reserve_interrupted
[14:53:03] [PASSED] ttm_bo_reserve_deadlock
[14:53:03] [PASSED] ttm_bo_unreserve_basic
[14:53:03] [PASSED] ttm_bo_unreserve_pinned
[14:53:03] [PASSED] ttm_bo_unreserve_bulk
[14:53:03] [PASSED] ttm_bo_fini_basic
[14:53:03] [PASSED] ttm_bo_fini_shared_resv
[14:53:03] [PASSED] ttm_bo_pin_basic
[14:53:03] [PASSED] ttm_bo_pin_unpin_resource
[14:53:03] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:53:03] ===================== [PASSED] ttm_bo ======================
[14:53:03] ============== ttm_bo_validate (22 subtests) ===============
[14:53:03] ============== ttm_bo_init_reserved_sys_man  ===============
[14:53:03] [PASSED] Buffer object for userspace
[14:53:03] [PASSED] Kernel buffer object
[14:53:03] [PASSED] Shared buffer object
[14:53:03] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:53:03] ============== ttm_bo_init_reserved_mock_man  ==============
[14:53:03] [PASSED] Buffer object for userspace
[14:53:03] [PASSED] Kernel buffer object
[14:53:03] [PASSED] Shared buffer object
[14:53:03] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:53:03] [PASSED] ttm_bo_init_reserved_resv
[14:53:03] ================== ttm_bo_validate_basic  ==================
[14:53:03] [PASSED] Buffer object for userspace
[14:53:03] [PASSED] Kernel buffer object
[14:53:03] [PASSED] Shared buffer object
[14:53:03] ============== [PASSED] ttm_bo_validate_basic ==============
[14:53:03] [PASSED] ttm_bo_validate_invalid_placement
[14:53:03] ============= ttm_bo_validate_same_placement  ==============
[14:53:03] [PASSED] System manager
[14:53:03] [PASSED] VRAM manager
[14:53:03] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:53:03] [PASSED] ttm_bo_validate_failed_alloc
[14:53:03] [PASSED] ttm_bo_validate_pinned
[14:53:03] [PASSED] ttm_bo_validate_busy_placement
[14:53:03] ================ ttm_bo_validate_multihop  =================
[14:53:03] [PASSED] Buffer object for userspace
[14:53:03] [PASSED] Kernel buffer object
[14:53:03] [PASSED] Shared buffer object
[14:53:03] ============ [PASSED] ttm_bo_validate_multihop =============
[14:53:03] ========== ttm_bo_validate_no_placement_signaled  ==========
[14:53:03] [PASSED] Buffer object in system domain, no page vector
[14:53:03] [PASSED] Buffer object in system domain with an existing page vector
[14:53:03] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:53:03] ======== ttm_bo_validate_no_placement_not_signaled  ========
[14:53:03] [PASSED] Buffer object for userspace
[14:53:03] [PASSED] Kernel buffer object
[14:53:03] [PASSED] Shared buffer object
[14:53:03] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:53:03] [PASSED] ttm_bo_validate_move_fence_signaled
[14:53:03] ========= ttm_bo_validate_move_fence_not_signaled  =========
[14:53:03] [PASSED] Waits for GPU
[14:53:03] [PASSED] Tries to lock straight away
[14:53:03] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:53:03] [PASSED] ttm_bo_validate_swapout
[14:53:03] [PASSED] ttm_bo_validate_happy_evict
[14:53:03] [PASSED] ttm_bo_validate_all_pinned_evict
[14:53:03] [PASSED] ttm_bo_validate_allowed_only_evict
[14:53:03] [PASSED] ttm_bo_validate_deleted_evict
[14:53:03] [PASSED] ttm_bo_validate_busy_domain_evict
[14:53:03] [PASSED] ttm_bo_validate_evict_gutting
[14:53:03] [PASSED] ttm_bo_validate_recrusive_evict
[14:53:03] ================= [PASSED] ttm_bo_validate =================
[14:53:03] ============================================================
[14:53:03] Testing complete. Ran 102 tests: passed: 102
[14:53:03] Elapsed time: 11.864s total, 1.741s configuring, 9.908s building, 0.181s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/nvm: add survivabilty partiton
  2026-07-15 13:45 ` Alexander Usyskin
                   ` (3 preceding siblings ...)
  (?)
@ 2026-07-15 15:33 ` Patchwork
  -1 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-15 15:33 UTC (permalink / raw)
  To: Alexander Usyskin; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 860 bytes --]

== Series Details ==

Series: drm/xe/nvm: add survivabilty partiton
URL   : https://patchwork.freedesktop.org/series/170493/
State : success

== Summary ==

CI Bug Log - changes from xe-5412-116ce94f4e028e50e3523c46a8ce1e665ce47cb9_BAT -> xe-pw-170493v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5412-116ce94f4e028e50e3523c46a8ce1e665ce47cb9 -> xe-pw-170493v1

  IGT_9007: 9007
  xe-5412-116ce94f4e028e50e3523c46a8ce1e665ce47cb9: 116ce94f4e028e50e3523c46a8ce1e665ce47cb9
  xe-pw-170493v1: 170493v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170493v1/index.html

[-- Attachment #2: Type: text/html, Size: 1408 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-07-15 15:33 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-07-15 13:45 [PATCH 0/2] drm/xe/nvm: add survivabilty partiton Alexander Usyskin
2026-07-15 13:45 ` Alexander Usyskin
2026-07-15 13:45 ` [PATCH 1/2] mtd: mtd_intel_dg: add survivability partition Alexander Usyskin
2026-07-15 13:45   ` Alexander Usyskin
2026-07-15 14:19   ` sashiko-bot
2026-07-15 13:45 ` [PATCH 2/2] drm/xe/nvm: define survivabilty partition Alexander Usyskin
2026-07-15 13:45   ` Alexander Usyskin
2026-07-15 14:32   ` sashiko-bot
2026-07-15 14:53 ` ✓ CI.KUnit: success for drm/xe/nvm: add survivabilty partiton Patchwork
2026-07-15 15:33 ` ✓ Xe.CI.BAT: " Patchwork

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