From: sashiko-bot@kernel.org
To: "Chaitanya Kumar Borah" <chaitanya.kumar.borah@intel.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [v5 06/14] drm/i915/display: Program input CSC on SDR planes
Date: Mon, 20 Jul 2026 05:27:37 +0000 [thread overview]
Message-ID: <20260720052737.760811F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260720045131.971650-7-chaitanya.kumar.borah@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] YUV range correction is not disabled for full-range YCbCr formats when a color pipeline is active on an SDR plane.
--
--- Patch [6]: [v5 06/14] drm/i915/display: Program input CSC on SDR planes ---
commit 8a9ffb3a71cf84165b43a62eef15fa69e1d8e5a0
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/i915/display: Program input CSC on SDR planes
When a color pipeline is active, program the SDR plane fixed-function
CSC. Keep the legacy color_encoding/color_range properties mutually
exclusive with color pipeline uapi.
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index da2df5be9848d..9893b061da5fa 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
[ ... ]
> @@ -1240,33 +1240,62 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
[ ... ]
> static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
> {
[ ... ]
> + if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
> + ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> + } else if (!icl_is_hdr_plane(display, plane->id)) {
> + if (plane_state->hw.csc_ff_enable)
> + ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type);
> + }
[Severity: High]
Does this code miss disabling YUV range correction for full-range YCbCr formats
when a color pipeline is active?
Userspace configuring an SDR plane with a color pipeline using one of the
supported DRM_COLOROP_FM_YCBCR*_FULL_RGB fixed matrix operations will map to
PLANE_COLOR_CSC_MODE_YUV* modes, but it doesn't appear to set the
PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE bit here.
Could this lead to the hardware performing an unintended limited-to-full
range correction on full-range YCbCr data?
>
> return ctl;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260720045131.971650-1-chaitanya.kumar.borah@intel.com?part=6
next prev parent reply other threads:[~2026-07-20 5:27 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 4:51 [v5 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
2026-07-20 5:22 ` sashiko-bot
2026-07-20 4:51 ` [v5 02/14] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
2026-07-20 5:33 ` sashiko-bot
2026-07-20 4:51 ` [v5 03/14] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 04/14] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 05/14] drm/i915/display: Track CSC mode in intel plane state Chaitanya Kumar Borah
2026-07-20 5:28 ` sashiko-bot
2026-07-20 4:51 ` [v5 06/14] drm/i915/display: Program input CSC on SDR planes Chaitanya Kumar Borah
2026-07-20 5:27 ` sashiko-bot [this message]
2026-07-20 4:51 ` [v5 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
2026-07-20 5:28 ` sashiko-bot
2026-07-20 4:51 ` [v5 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
2026-07-20 5:29 ` sashiko-bot
2026-07-20 4:51 ` [v5 09/14] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
2026-07-20 5:28 ` sashiko-bot
2026-07-20 4:51 ` [v5 10/14] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 11/14] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 12/14] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 14/14] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-07-20 5:39 ` sashiko-bot
2026-07-20 10:50 ` ✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline (rev6) Patchwork
2026-07-20 11:26 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-20 13:20 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-20 16:07 ` ✓ i915.CI.BAT: " Patchwork
2026-07-20 22:01 ` ✗ i915.CI.Full: failure " Patchwork
2026-07-21 8:52 ` ✓ i915.CI.Full: success " Patchwork
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