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From: sashiko-bot@kernel.org
To: "Chaitanya Kumar Borah" <chaitanya.kumar.borah@intel.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [v5 14/14] drm/i915/color: Add color pipeline support for SDR planes
Date: Mon, 20 Jul 2026 05:39:01 +0000	[thread overview]
Message-ID: <20260720053901.7C6EC1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260720045131.971650-15-chaitanya.kumar.borah@intel.com>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

Pre-existing issues:
- [High] A missing NULL check for the `kasprintf()` allocation in `_intel_color_pipeline_plane_init()` causes a NULL pointer dereference in `drm_property_add_enum()`.
- [High] Early initialization failures during colorop creation cause `drm_colorop_cleanup()` to access uninitialized structure members, leading to a crash.
- [High] Missing `drm_mode_object_unregister()` in `drm_colorop_cleanup()` leaves destroyed colorops in the DRM object IDR, leading to a Use-After-Free.
--

--- Patch [14]: [v5 14/14] drm/i915/color: Add color pipeline support for SDR planes ---
commit 898c62da94ca7a00530f154f1e3d4b18c45aaa47
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

drm/i915/color: Add color pipeline support for SDR planes

This commit exposes the SDR plane color pipeline to user-space by removing
the check that previously limited it to HDR planes.

> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 136b9378ca484..a99b6eb204488 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -188,17 +188,11 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
>  
>  int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)
>  {
> -	struct drm_device *dev = plane->dev;
> -	struct intel_display *display = to_intel_display(dev);
>  	struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES] = {};
>  	int len = 0;
>  	int ret = 0;
>  	int i;
>  
> -	/* Currently expose pipeline only for HDR planes */
> -	if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
> -		return 0;
> -
>  	/* Add pipeline consisting of transfer functions */
>  	ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);

[Severity: High]
This isn't a bug introduced by this patch, but opening this up to SDR planes
makes a pre-existing issue more reachable.

In _intel_color_pipeline_plane_init(), kasprintf() can fail and return NULL
under memory pressure:

	list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", 
			       colorop[0]->base.base.id);

Because there is no check for failure, a NULL name gets passed down to
drm_plane_create_color_pipeline_property(), then to drm_property_create_enum(),
and finally to drm_property_add_enum(), which dereferences it during 
strlen(name) and crashes. Should we add a NULL check for kasprintf() in 
_intel_color_pipeline_plane_init()?

[Severity: High]
This is also a pre-existing issue, but since we are expanding the usage of
this pipeline:

If an early initialization failure occurs in
intel_color_pipeline_plane_add_colorop() (such as drm_mode_object_add()
returning an error), the cleanup path calls intel_colorop_destroy() which
invokes drm_colorop_cleanup().

At this point, drm_colorop_cleanup() will dereference colorop->dev:

void drm_colorop_cleanup(struct drm_colorop *colorop)
{
	struct drm_device *dev = colorop->dev;
	struct drm_mode_config *config = &dev->mode_config;
        ...

If drm_mode_object_add() failed, colorop->dev remains NULL, causing an
immediate crash. Additionally, list_del(&colorop->head) is called on a
zero-initialized list node. Can this cleanup path be made safe for objects
that failed early initialization?

[Severity: High]
This is another pre-existing issue exposed by the expanded plane support:

If a colorop initialization fails midway (for instance, if
drm_property_create_enum() fails after drm_mode_object_add() succeeds),
the error path calls drm_colorop_cleanup() to free the memory.

However, drm_colorop_cleanup() does not call drm_mode_object_unregister().
This leaves a freed object pointer in the DRM device's object IDR. Is there
a risk that a user could trigger a use-after-free by passing the leaked
object ID to an ioctl like DRM_IOCTL_MODE_OBJ_GETPROPERTIES?

>  	if (ret)
>  		goto out;
>  	len++;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260720045131.971650-1-chaitanya.kumar.borah@intel.com?part=14

  reply	other threads:[~2026-07-20  5:39 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-20  4:51 [v5 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-07-20  4:51 ` [v5 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
2026-07-20  5:22   ` sashiko-bot
2026-07-20  4:51 ` [v5 02/14] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
2026-07-20  5:33   ` sashiko-bot
2026-07-20  4:51 ` [v5 03/14] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
2026-07-20  4:51 ` [v5 04/14] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
2026-07-20  4:51 ` [v5 05/14] drm/i915/display: Track CSC mode in intel plane state Chaitanya Kumar Borah
2026-07-20  5:28   ` sashiko-bot
2026-07-20  4:51 ` [v5 06/14] drm/i915/display: Program input CSC on SDR planes Chaitanya Kumar Borah
2026-07-20  5:27   ` sashiko-bot
2026-07-20  4:51 ` [v5 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
2026-07-20  5:28   ` sashiko-bot
2026-07-20  4:51 ` [v5 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
2026-07-20  5:29   ` sashiko-bot
2026-07-20  4:51 ` [v5 09/14] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
2026-07-20  5:28   ` sashiko-bot
2026-07-20  4:51 ` [v5 10/14] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-20  4:51 ` [v5 11/14] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
2026-07-20  4:51 ` [v5 12/14] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-20  4:51 ` [v5 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-07-20  4:51 ` [v5 14/14] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-07-20  5:39   ` sashiko-bot [this message]
2026-07-20 10:50 ` ✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline (rev6) Patchwork
2026-07-20 11:26 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-20 13:20 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-20 16:07 ` ✓ i915.CI.BAT: " Patchwork
2026-07-20 22:01 ` ✗ i915.CI.Full: failure " Patchwork
2026-07-21  8:52 ` ✓ i915.CI.Full: success " Patchwork

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