* [PATCH v5 v5] PCI: dwc: Add PCI ID for LECARC PCIe pmu
@ 2026-07-21 8:28 Braden Zhang
2026-07-21 8:39 ` sashiko-bot
0 siblings, 1 reply; 2+ messages in thread
From: Braden Zhang @ 2026-07-21 8:28 UTC (permalink / raw)
To: Bjorn Helgaas, Jingoo Han, Manivannan Sadhasivam
Cc: Brett Zhou, Lumin Liu, Notics Zhang, linux-pci, linux-pci,
linux-kernel, Braden Zhang
From: Brett Zhou <brett_zhou@lecomputing.com>
This patch adds support for the PCIe PMU found
on LECARC SoCs.
LECARC platforms use the standard DesignWare PCIe Controller,
and the existing DWC driver already handles the enumeration
and basic functionality through the generic PCIe core.
This patch only adds the PCI vendor ID to the vendor-specific
capability (VSEC) list, which enables the standard DWC
RAS/DES feature detection.
Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
---
Changes in v5:
- No change: Add PGP sign for b4 apply.
- Link to v4: https://patch.msgid.link/20260721-pcie-pmu-v4-1-850a4e695b19@lecomputing.com
Changes in v4:
- Doc: Update description for the DWC RAS/DES feature detection.
- Link to v3: https://patch.msgid.link/20260713-pcie-pmu-v3-1-5e4a8d82248d@lecomputing.com
Changes in v3:
- Update: move definition to pcie-dwc.h a
- Format: Update the subject line to follow the style of previous pcie-dwc.h changes.
- Link to v2: https://patch.msgid.link/20260710-pcie-pmu-v2-1-a3d73d4d9051@lecomputing.com
Changes in v2:
- Format: Use tab to align with lines.
- Link to v1: https://patch.msgid.link/20260710-pcie-pmu-v1-1-1519e580313f@lecomputing.com
To: Bjorn Helgaas <bhelgaas@google.com>
To: Jingoo Han <jingoohan1@gmail.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: linux-pci@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
include/linux/pcie-dwc.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h
index 8ff778e7aec0..0df5fa81b561 100644
--- a/include/linux/pcie-dwc.h
+++ b/include/linux/pcie-dwc.h
@@ -11,6 +11,8 @@
#include <linux/pci_ids.h>
+#define PCI_VENDOR_ID_LECARC 0x0720
+
struct dwc_pcie_vsec_id {
u16 vendor_id;
u16 vsec_id;
@@ -32,6 +34,8 @@ static const struct dwc_pcie_vsec_id dwc_pcie_rasdes_vsec_ids[] = {
.vsec_id = 0x02, .vsec_rev = 0x4 },
{ .vendor_id = PCI_VENDOR_ID_SAMSUNG,
.vsec_id = 0x02, .vsec_rev = 0x4 },
+ { .vendor_id = PCI_VENDOR_ID_LECARC,
+ .vsec_id = 0x02, .vsec_rev = 0x4 },
{}
};
---
base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
change-id: 20260710-pcie-pmu-5ef78c56c3b6
Best regards,
--
Braden Zhang <braden_zhang@lecomputing.com>
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v5 v5] PCI: dwc: Add PCI ID for LECARC PCIe pmu
2026-07-21 8:28 [PATCH v5 v5] PCI: dwc: Add PCI ID for LECARC PCIe pmu Braden Zhang
@ 2026-07-21 8:39 ` sashiko-bot
0 siblings, 0 replies; 2+ messages in thread
From: sashiko-bot @ 2026-07-21 8:39 UTC (permalink / raw)
To: Braden Zhang; +Cc: linux-pci
> From: Brett Zhou <brett_zhou@lecomputing.com>
>
> This patch adds support for the PCIe PMU found
> on LECARC SoCs.
>
> LECARC platforms use the standard DesignWare PCIe Controller,
> and the existing DWC driver already handles the enumeration
> and basic functionality through the generic PCIe core.
> This patch only adds the PCI vendor ID to the vendor-specific
> capability (VSEC) list, which enables the standard DWC
> RAS/DES feature detection.
>
> Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
> Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260721-pcie-pmu-v5-1-570e44af7cde@lecomputing.com?part=1
^ permalink raw reply [flat|nested] 2+ messages in thread
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2026-07-21 8:28 [PATCH v5 v5] PCI: dwc: Add PCI ID for LECARC PCIe pmu Braden Zhang
2026-07-21 8:39 ` sashiko-bot
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