From: sashiko-bot@kernel.org
To: "Louis-Alexis Eyraud" <louisalexis.eyraud@collabora.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v3 02/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192
Date: Tue, 21 Jul 2026 10:05:27 +0000 [thread overview]
Message-ID: <20260721100527.674541F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260720-mt8189-clocks-system-base-v3-2-8e6d99ab3ad2@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [Medium] The `mediatek,mt8192-infracfg` hardware variant acts as a reset provider, but `#reset-cells` is not conditionally enforced as a required property in the binding schema.
--
--- Patch [2]: [PATCH v3 02/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192 ---
commit 39883f8dbf989e459d5a15ed6a9ba37e9a9a274b
Author: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192
This commit adds '#clock-cells' to the required properties list in both the
MT8192 clock and sys-clock device tree bindings. It ensures that clock
provider nodes define this property, as it is required for proper validation.
[ ... ]
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml
> index bf8c9aacdf1e7..0ebd0d60e2f68 100644
> --- a/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml
> @@ -35,6 +35,7 @@ properties:
> required:
> - compatible
> - reg
> + - '#clock-cells'
[Severity: Medium]
This isn't a bug introduced by this patch, but should an allOf block be added
here to conditionally enforce '#reset-cells' as required for the
mediatek,mt8192-infracfg variant?
The mediatek,mt8192-infracfg hardware variant acts as a reset provider, but
without enforcing '#reset-cells' in an if-then block, incomplete device tree
nodes will silently pass dt_binding_check validation. This can lead to
potential runtime failures when dependent subsystems try to consume the reset.
Additionally, the example node for infracfg is missing '#reset-cells = <1>;':
Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml:
- |
infracfg: syscon@10001000 {
compatible = "mediatek,mt8192-infracfg", "syscon";
reg = <0x10001000 0x1000>;
#clock-cells = <1>;
};
Should the example be updated to properly validate the reset provider
capabilities?
>
> additionalProperties: false
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260720-mt8189-clocks-system-base-v3-0-8e6d99ab3ad2@collabora.com?part=2
next prev parent reply other threads:[~2026-07-21 10:05 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 10:04 [PATCH v3 00/18] MT8189: Add support for system and base clock controllers Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 01/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8186 Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 02/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192 Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot [this message]
2026-07-20 10:04 ` [PATCH v3 03/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-20 10:04 ` [PATCH v3 04/18] dt-bindings: clock: mediatek: reorder MT8186 compatibles Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 05/18] dt-bindings: clock: mediatek: regroup MT8188 dt-bindings into MT8186 Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-20 10:04 ` [PATCH v3 06/18] dt-bindings: clock: mediatek: regroup MT8192 " Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 07/18] dt-bindings: clock: mediatek: regroup MT8195 " Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-20 10:04 ` [PATCH v3 08/18] dt-bindings: clock: mediatek: Add MT8189 system/base clocks and resets Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-20 10:04 ` [PATCH v3 09/18] clk: mediatek: Add MT8189 apmixedsys clock support Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-21 23:04 ` Brian Masney
2026-07-20 10:04 ` [PATCH v3 10/18] clk: mediatek: Add MT8189 topckgen " Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-20 10:04 ` [PATCH v3 11/18] clk: mediatek: Add MT8189 vlpckgen " Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 12/18] clk: mediatek: Add MT8189 vlpcfg " Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 13/18] clk: mediatek: Add MT8189 bus " Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-20 10:04 ` [PATCH v3 14/18] clk: mediatek: Add MT8189 dbgao " Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 15/18] clk: mediatek: Add MT8189 dvfsrc " Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 16/18] clk: mediatek: Add MT8189 i2c " Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
2026-07-20 10:04 ` [PATCH v3 17/18] clk: mediatek: Add MT8189 scp " Louis-Alexis Eyraud
2026-07-20 10:04 ` [PATCH v3 18/18] clk: mediatek: Add MT8189 ufs " Louis-Alexis Eyraud
2026-07-21 10:05 ` sashiko-bot
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