* [PATCH v2 00/10] ARM: tegra: tf701t: Add new features
@ 2026-07-21 10:10 Svyatoslav Ryhel
2026-07-21 10:10 ` [PATCH v2 01/10] ARM: tegra: tf701t: Configure CPU DFLL clock node Svyatoslav Ryhel
` (9 more replies)
0 siblings, 10 replies; 14+ messages in thread
From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding,
Jonathan Hunter, Svyatoslav Ryhel
Cc: devicetree, linux-tegra, linux-kernel
Add new features recently merged like CPU DFLL, MC and EMC timins
along with fixing some existing issues.
---
Changes in v2:
- removed vdd-cpu-supply from CPU node
- fixed typo in thermal nodes
- adjusted MMC flags
- improvements of commit descriptions
---
Svyatoslav Ryhel (10):
ARM: tegra: tf701t: Configure CPU DFLL clock node
ARM: tegra: tf701t: Add core-supply to PMC node
ARM: tegra: tf701t: Add MC and EMC timing nodes
ARM: tegra: tf701t: Remove pin_ prefix from PMIC pinmux
ARM: tegra: tf701t: Add thermal zones for nct1008 sensor
ARM: tegra: tf701t: Tune MMC devices
ARM: tegra: tf701t: Fix BCM43341 WiFi/BT chip configuration
ARM: tegra: tf701t: Complete power sensor node
ARM: tegra: tf701t: Configure UART-B line used for GPS
ARM: tegra: tf701t: Add chosen node
.../boot/dts/nvidia/tegra114-asus-tf701t.dts | 885 +++++++++++++++++-
1 file changed, 848 insertions(+), 37 deletions(-)
--
2.53.0
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH v2 01/10] ARM: tegra: tf701t: Configure CPU DFLL clock node 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 02/10] ARM: tegra: tf701t: Add core-supply to PMC node Svyatoslav Ryhel ` (8 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Enable DFLL for ASUS TF701T since it is now supported by Tegra114. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index f02e2cf65fe82..5358cdb6efc10 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -1621,6 +1621,14 @@ i2s@70080600 { }; }; + /* CPU DFLL clock */ + clock@70110000 { + status = "okay"; + nvidia,sample-rate = <11500>; + nvidia,i2c-fs-rate = <400000>; + vdd-cpu-supply = <&vdd_cpu>; + }; + brcm_wifi_pwrseq: pwrseq-wifi { compatible = "mmc-pwrseq-simple"; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 02/10] ARM: tegra: tf701t: Add core-supply to PMC node 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 01/10] ARM: tegra: tf701t: Configure CPU DFLL clock node Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes Svyatoslav Ryhel ` (7 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Add required core supply to Tegra PMC node. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 5358cdb6efc10..55e9256e80f33 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -1599,6 +1599,7 @@ pmc@7000e400 { nvidia,core-pwr-off-time = <2000>; nvidia,core-power-req-active-high; nvidia,sys-clock-req-active-high; + core-supply = <&vdd_core>; /* Clear DEV_ON bit in DEV_CTRL register of TPS65913 PMIC */ i2c-thermtrip { -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 01/10] ARM: tegra: tf701t: Configure CPU DFLL clock node Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 02/10] ARM: tegra: tf701t: Add core-supply to PMC node Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:31 ` sashiko-bot 2026-07-21 10:10 ` [PATCH v2 04/10] ARM: tegra: tf701t: Remove pin_ prefix from PMIC pinmux Svyatoslav Ryhel ` (6 subsequent siblings) 9 siblings, 1 reply; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Configure Memory Controllers of ASUS TF701T. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- .../boot/dts/nvidia/tegra114-asus-tf701t.dts | 713 ++++++++++++++++++ 1 file changed, 713 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 55e9256e80f33..00eeedf3ef7a5 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -101,6 +101,89 @@ panel_secondary: panel@0 { }; }; + clock@60006000 { + emc-timings-0 { + nvidia,ram-code = <0>; + + timing-12750000 { + clock-frequency = <12750000>; + nvidia,parent-clock-frequency = <408000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "emc-parent"; + }; + + timing-20400000 { + clock-frequency = <20400000>; + nvidia,parent-clock-frequency = <408000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "emc-parent"; + }; + + timing-40800000 { + clock-frequency = <40800000>; + nvidia,parent-clock-frequency = <408000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "emc-parent"; + }; + + timing-68000000 { + clock-frequency = <68000000>; + nvidia,parent-clock-frequency = <408000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "emc-parent"; + }; + + timing-102000000 { + clock-frequency = <102000000>; + nvidia,parent-clock-frequency = <408000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "emc-parent"; + }; + + timing-204000000 { + clock-frequency = <204000000>; + nvidia,parent-clock-frequency = <408000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "emc-parent"; + }; + + timing-312000000 { + clock-frequency = <312000000>; + nvidia,parent-clock-frequency = <624000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_C>; + clock-names = "emc-parent"; + }; + + timing-408000000 { + clock-frequency = <408000000>; + nvidia,parent-clock-frequency = <408000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "emc-parent"; + }; + + timing-528000000 { + clock-frequency = <528000000>; + nvidia,parent-clock-frequency = <792000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_M>; + clock-names = "emc-parent"; + }; + + timing-624000000 { + clock-frequency = <624000000>; + nvidia,parent-clock-frequency = <624000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_C>; + clock-names = "emc-parent"; + }; + + timing-792000000 { + clock-frequency = <792000000>; + nvidia,parent-clock-frequency = <792000000>; + clocks = <&tegra_car TEGRA114_CLK_PLL_M>; + clock-names = "emc-parent"; + }; + }; + }; + vde@6001a000 { assigned-clocks = <&tegra_car TEGRA114_CLK_VDE>; assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_P>; @@ -1610,6 +1693,636 @@ i2c-thermtrip { }; }; + memory-controller@70019000 { + emc-timings-0 { + /* Mozart Rev B Hynix DDR3 792MHz */ + nvidia,ram-code = <0>; + + timing-12750000 { + clock-frequency = <12750000>; + + nvidia,emem-configuration = < 0x40040001 0x8000003f + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000001 0x00000003 0x00000006 + 0x06030102 0x000a0402 0x77e30303 0x001f0000 >; + }; + + timing-20400000 { + clock-frequency = <20400000>; + + nvidia,emem-configuration = < 0x40020001 0x80000046 + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000001 0x00000003 0x00000006 + 0x06030102 0x000a0402 0x76230303 0x001f0000 >; + }; + + timing-40800000 { + clock-frequency = <40800000>; + + nvidia,emem-configuration = < 0xa0000001 0x8000005b + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000001 0x00000003 0x00000006 + 0x06030102 0x000a0402 0x74a30303 0x001f0000 >; + }; + + timing-68000000 { + clock-frequency = <68000000>; + + nvidia,emem-configuration = < 0x00000001 0x80000076 + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000001 0x00000003 0x00000006 + 0x06030102 0x000a0402 0x74230403 0x001f0000 >; + }; + + timing-102000000 { + clock-frequency = <102000000>; + + nvidia,emem-configuration = < 0x08000001 0x80000098 + 0x00000001 0x00000001 0x00000003 0x00000000 + 0x00000002 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000001 0x00000003 0x00000006 + 0x06030102 0x000a0403 0x73c30504 0x001f0000 >; + }; + + timing-204000000 { + clock-frequency = <204000000>; + + nvidia,emem-configuration = < 0x01000003 0x800000fe + 0x00000001 0x00000001 0x00000005 0x00000002 + 0x00000004 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000001 0x00000003 0x00000006 + 0x06030102 0x000a0405 0x73840a06 0x001f0000 >; + }; + + timing-312000000 { + clock-frequency = <312000000>; + + nvidia,emem-configuration = < 0x0b000004 0x8000016a + 0x00000001 0x00000002 0x00000007 0x00000004 + 0x00000006 0x00000001 0x00000002 0x00000007 + 0x00000002 0x00000002 0x00000004 0x00000006 + 0x06040202 0x000b0607 0x76e50f08 0x001f0000 >; + }; + + timing-408000000 { + clock-frequency = <408000000>; + + nvidia,emem-configuration = < 0x02000006 0x80000190 + 0x00000001 0x00000002 0x0000000a 0x00000006 + 0x00000008 0x00000001 0x00000002 0x00000009 + 0x00000002 0x00000002 0x00000004 0x00000006 + 0x06040202 0x000e070a 0x7547130b 0x001f0000 >; + }; + + timing-528000000 { + clock-frequency = <528000000>; + + nvidia,emem-configuration = < 0x0f000007 0x80000190 + 0x00000002 0x00000003 0x0000000d 0x00000008 + 0x0000000a 0x00000001 0x00000002 0x00000009 + 0x00000002 0x00000002 0x00000005 0x00000006 + 0x06050202 0x0010090d 0x7428180e 0x001f0000 >; + }; + + timing-624000000 { + clock-frequency = <624000000>; + + nvidia,emem-configuration = < 0x06000009 0x80000190 + 0x00000003 0x00000004 0x0000000f 0x00000009 + 0x0000000c 0x00000001 0x00000003 0x0000000b + 0x00000002 0x00000002 0x00000005 0x00000007 + 0x07050202 0x00130b0f 0x736a1d10 0x001f0000 >; + }; + + timing-792000000 { + clock-frequency = <792000000>; + + nvidia,emem-configuration = < 0x0e00000b 0x80000190 + 0x00000004 0x00000005 0x00000013 0x0000000c + 0x0000000f 0x00000002 0x00000003 0x0000000c + 0x00000002 0x00000002 0x00000006 0x00000008 + 0x08060202 0x00160d13 0x734c2414 0x001f0000 >; + }; + }; + }; + + external-memory-controller@7001b000 { + emc-timings-0 { + /* Mozart Rev B Hynix DDR3 792MHz */ + nvidia,ram-code = <0>; + + timing-12750000 { + clock-frequency = <12750000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x7324000e>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x000c000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000a11c>; + nvidia,emc-zcal-interval = <0x00000000>; + + nvidia,emc-configuration = < 0x00000000 + 0x00000003 0x00000000 0x00000000 0x00000004 + 0x0000000a 0x00000003 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000006 0x00000006 + 0x00000004 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x00000009 0x0000000d + 0x0000000f 0x00000060 0x00000000 0x00000018 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x00000005 0x00000005 + 0x00000004 0x00000004 0x00000004 0x00000004 + 0x00000000 0x00000004 0x00000005 0x00000064 + 0x00000005 0x00000006 0x00000020 0x00000000 + 0x0000aa88 0x002c00a0 0x00008000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0007c000 + 0x0007c000 0x0007c000 0x0007c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x0000003f 0x20820800 0x00249249 + 0x0000003f 0x00000007 0x02000000 0x00000042 + 0x000c000c 0x00000000 0x00000000 0x800001c5 >; + }; + + timing-20400000 { + clock-frequency = <20400000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x7324000e>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x000c000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000a11c>; + nvidia,emc-zcal-interval = <0x00000000>; + + nvidia,emc-configuration = < 0x00000000 + 0x00000005 0x00000000 0x00000000 0x00000004 + 0x0000000a 0x00000003 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000006 0x00000006 + 0x00000004 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x00000009 0x0000000d + 0x0000000f 0x0000009a 0x00000000 0x00000026 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x00000006 0x00000006 + 0x00000004 0x00000004 0x00000004 0x00000004 + 0x00000000 0x00000004 0x00000005 0x000000a0 + 0x00000005 0x00000006 0x00000020 0x00000000 + 0x0000aa88 0x002c00a0 0x00008000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0007c000 + 0x0007c000 0x0007c000 0x0007c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x0000003f 0x20820800 0x00249249 + 0x0000003f 0x0000000b 0x02000000 0x00000042 + 0x000c000c 0x00000000 0x00000000 0x8000023a >; + }; + + timing-40800000 { + clock-frequency = <40800000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x7324000e>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x000c000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000a11c>; + nvidia,emc-zcal-interval = <0x00000000>; + + nvidia,emc-configuration = < 0x00000001 + 0x0000000a 0x00000001 0x00000000 0x00000004 + 0x0000000a 0x00000003 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000006 0x00000006 + 0x00000004 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x00000009 0x0000000d + 0x0000000f 0x00000134 0x00000000 0x0000004d + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000008 0x0000000f 0x0000000c 0x0000000c + 0x00000004 0x00000004 0x00000004 0x00000004 + 0x00000000 0x00000004 0x00000005 0x0000013f + 0x00000005 0x00000006 0x00000020 0x00000000 + 0x0000aa88 0x002c00a0 0x00008000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0007c000 + 0x0007c000 0x0007c000 0x0007c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x0000003f 0x20820800 0x00249249 + 0x0000003f 0x00000015 0x02000000 0x00000042 + 0x000c000c 0x00000000 0x00000000 0x80000370 >; + }; + + timing-68000000 { + clock-frequency = <68000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x7324000e>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x000c000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000a11c>; + nvidia,emc-zcal-interval = <0x00000000>; + + nvidia,emc-configuration = < 0x00000003 + 0x00000011 0x00000002 0x00000000 0x00000004 + 0x0000000a 0x00000003 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000006 0x00000006 + 0x00000004 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x00000009 0x0000000d + 0x0000000f 0x00000202 0x00000000 0x00000080 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x0000000f 0x0000000f 0x00000013 0x00000013 + 0x00000004 0x00000004 0x00000004 0x00000004 + 0x00000000 0x00000004 0x00000005 0x00000213 + 0x00000005 0x00000006 0x00000020 0x00000000 + 0x0000aa88 0x002c00a0 0x00008000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0007c000 + 0x0007c000 0x0007c000 0x0007c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x0000003f 0x20820800 0x00249249 + 0x0000003f 0x00000022 0x02000000 0x00000042 + 0x000c000c 0x00000000 0x00000000 0x8000050e >; + }; + + timing-102000000 { + clock-frequency = <102000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x7324000e>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x000c000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000a11c>; + nvidia,emc-zcal-interval = <0x00000000>; + + nvidia,emc-configuration = < 0x00000004 + 0x0000001a 0x00000003 0x00000001 0x00000004 + 0x0000000a 0x00000003 0x0000000b 0x00000001 + 0x00000001 0x00000003 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000006 0x00000006 + 0x00000004 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x00000009 0x0000000d + 0x0000000f 0x00000303 0x00000000 0x000000c0 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000018 0x0000000f 0x0000001c 0x0000001c + 0x00000004 0x00000004 0x00000004 0x00000005 + 0x00000000 0x00000004 0x00000005 0x0000031c + 0x00000005 0x00000006 0x00000020 0x00000000 + 0x0000aa88 0x002c00a0 0x00008000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0007c000 + 0x0007c000 0x0007c000 0x0007c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x0000003f 0x20820800 0x00249249 + 0x0000003f 0x00000033 0x02000000 0x00000042 + 0x000c000c 0x00000000 0x00000000 0x80000713 >; + }; + + timing-204000000 { + clock-frequency = <204000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x7320000e>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x000c000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000a11c>; + nvidia,emc-zcal-interval = <0x00020000>; + + nvidia,emc-configuration = < 0x00000009 + 0x00000035 0x00000007 0x00000002 0x00000004 + 0x0000000a 0x00000003 0x0000000b 0x00000002 + 0x00000002 0x00000003 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000007 0x00000006 + 0x00000004 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x00000009 0x0000000d + 0x0000000f 0x00000607 0x00000000 0x00000181 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000032 0x0000000f 0x00000038 0x00000038 + 0x00000004 0x00000004 0x00000004 0x00000009 + 0x00000000 0x00000004 0x00000005 0x00000638 + 0x00000006 0x00000004 0x00000020 0x00000000 + 0x0000aa88 0x002c00a0 0x00008000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00064000 + 0x00064000 0x00064000 0x00064000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0007c000 + 0x0007c000 0x0007c000 0x0007c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x0000003f 0x20820800 0x00249249 + 0x0000003f 0x00000000 0x02000000 0x00000100 + 0x000c000c 0x00000000 0x00000000 0x80000d22 >; + }; + + timing-312000000 { + clock-frequency = <312000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x5300000e>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200000>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80000321>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x0171000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0001013d>; + nvidia,emc-zcal-interval = <0x00020000>; + + nvidia,emc-configuration = < 0x0000000e + 0x00000050 0x00000009 0x00000003 0x00000004 + 0x00000008 0x00000002 0x00000009 0x00000003 + 0x00000003 0x00000002 0x00000001 0x00000000 + 0x00000004 0x0000000f 0x00000006 0x00000006 + 0x00000005 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x0000000b 0x0000000d + 0x0000000f 0x00000941 0x00000000 0x00000250 + 0x00000001 0x00000008 0x00000001 0x00000000 + 0x0000004d 0x0000000e 0x00000055 0x00000200 + 0x00000004 0x00000004 0x00000004 0x0000000d + 0x00000000 0x00000004 0x00000005 0x00000982 + 0x00000000 0x00000004 0x00000020 0x00000000 + 0x00005088 0x002c00a0 0x00008000 0x00030000 + 0x00030000 0x00030000 0x00030000 0x00030000 + 0x00030000 0x00030000 0x00030000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0003c000 + 0x0003c000 0x0003c000 0x0003c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x00000000 0x20820800 0x00249249 + 0x0000003f 0x00000000 0x02000000 0x00000100 + 0x0171000c 0x00000000 0x00000000 0x8000138d >; + }; + + timing-408000000 { + clock-frequency = <408000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x53000006>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80000731>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x0158000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0001013d>; + nvidia,emc-zcal-interval = <0x00020000>; + + nvidia,emc-configuration = < 0x00000012 + 0x00000069 0x0000000d 0x00000004 0x00000005 + 0x00000009 0x00000002 0x0000000c 0x00000004 + 0x00000004 0x00000002 0x00000001 0x00000000 + 0x00000004 0x0000000f 0x00000006 0x00000006 + 0x00000005 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000004 0x0000000c 0x0000000e + 0x00000010 0x00000c2e 0x00000000 0x0000030b + 0x00000001 0x00000008 0x00000001 0x00000000 + 0x00000066 0x00000011 0x0000006f 0x00000200 + 0x00000004 0x00000004 0x00000004 0x00000011 + 0x00000000 0x00000004 0x00000005 0x00000c6f + 0x00000000 0x00000004 0x00000020 0x00000000 + 0x00005088 0x002c0080 0x00008000 0x00030000 + 0x00030000 0x00030000 0x00030000 0x00030000 + 0x00030000 0x00030000 0x00030000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0003c000 + 0x0003c000 0x0003c000 0x0003c000 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x03037504 0x00000000 0x20820800 0x00249249 + 0x0000003f 0x00000000 0x02000000 0x00000100 + 0x0158000c 0x00000000 0x00000000 0x80001941 >; + }; + + timing-528000000 { + clock-frequency = <528000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x53000004>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80000941>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x013a000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000013d>; + nvidia,emc-zcal-interval = <0x00020000>; + + nvidia,emc-configuration = < 0x00000018 + 0x00000088 0x00000011 0x00000006 0x00000006 + 0x00000009 0x00000002 0x0000000d 0x00000006 + 0x00000006 0x00000002 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000008 0x00000009 + 0x00000007 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000006 0x0000000c 0x00000010 + 0x00000012 0x00000fd6 0x00000000 0x000003f5 + 0x00000002 0x0000000b 0x00000001 0x00000000 + 0x00000084 0x00000012 0x0000008f 0x00000200 + 0x00000004 0x00000004 0x00000004 0x00000016 + 0x00000000 0x00000005 0x00000006 0x00001017 + 0x00000000 0x00000006 0x00000020 0x00000000 + 0x00005088 0xf0120091 0x00008000 0x0000000a + 0x0000000a 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x0000000a 0x0000000a 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0000000c + 0x0000000b 0x0000000c 0x0000000c 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x07077504 0x00000000 0x20820800 0x00249249 + 0x0000003f 0x00000000 0x02000000 0x00000100 + 0x013a000c 0x00000000 0x00000000 0x80002062 >; + }; + + timing-624000000 { + clock-frequency = <624000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x53200000>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200410>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80000b61>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x0122000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040320>; + nvidia,emc-xm2dqspadctrl2 = <0x0000013d>; + nvidia,emc-zcal-interval = <0x00020000>; + + nvidia,emc-configuration = < 0x0000001d + 0x000000a1 0x00000014 0x00000007 0x00000007 + 0x0000000b 0x00000003 0x00000010 0x00000007 + 0x00000007 0x00000002 0x00000001 0x00000000 + 0x00000005 0x0000000f 0x00000009 0x0000000a + 0x00000008 0x00000004 0x00010000 0x00000000 + 0x00000000 0x00000007 0x0000000c 0x00000012 + 0x00000014 0x000012c3 0x00000000 0x000004b0 + 0x00000002 0x0000000d 0x00000001 0x00000000 + 0x0000009c 0x00000015 0x000000a9 0x00000200 + 0x00000005 0x00000005 0x00000005 0x00000019 + 0x00000000 0x00000006 0x00000007 0x00001304 + 0x00000009 0x00000006 0x80000000 0x00000000 + 0x0000ba88 0xf00d0191 0x00008000 0x0000000a + 0x0000000a 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x0000000a 0x0000000a 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0000000b + 0x0000000b 0x0000000b 0x0000000b 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x07077504 0x00000000 0x20820800 0x0028a28a + 0x0000003f 0x00000000 0x02000000 0x00000100 + 0x0122000c 0x00000000 0x00000000 0x80002617 >; + }; + + timing-792000000 { + clock-frequency = <792000000>; + + nvidia,emc-zcal-cnt-long = <0x00000042>; + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-cfg = <0x53000000>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200418>; + nvidia,emc-mode-4 = <0x00000000>; + nvidia,emc-mode-reset = <0x80000d71>; + nvidia,emc-auto-cal-config = <0xa0f10f0f>; + nvidia,emc-auto-cal-config2 = <0x00000000>; + nvidia,emc-auto-cal-config3 = <0x00000000>; + nvidia,emc-ctt-term-ctrl = <0x00000802>; + nvidia,emc-mrs-wait-cnt = <0x00f8000c>; + nvidia,emc-sel-dpd-ctrl = <0x00040000>; + nvidia,emc-xm2dqspadctrl2 = <0x0000013d>; + nvidia,emc-zcal-interval = <0x00020000>; + + nvidia,emc-configuration = < 0x00000025 + 0x000000cc 0x0000001a 0x00000009 0x00000008 + 0x0000000d 0x00000004 0x00000013 0x00000009 + 0x00000009 0x00000003 0x00000001 0x00000000 + 0x00000006 0x0000000f 0x0000000a 0x0000000b + 0x00000008 0x00000006 0x00010000 0x00000000 + 0x00000000 0x00000008 0x0000000d 0x00000014 + 0x00000016 0x000017e1 0x00000000 0x000005f8 + 0x00000003 0x00000011 0x00000001 0x00000000 + 0x000000c6 0x00000018 0x000000d6 0x00000200 + 0x00000005 0x00000005 0x00000005 0x00000020 + 0x00000000 0x00000007 0x00000008 0x00001822 + 0x00000000 0x00000006 0x80000000 0x00000000 + 0x00005088 0xf0070191 0x00008000 0x00000009 + 0x00000009 0x00000009 0x00000009 0x00000009 + 0x00000009 0x00000009 0x00000009 0x00018000 + 0x00018000 0x00018000 0x00018000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x0000000b + 0x0000000b 0x0000000b 0x0000000b 0x001112a0 + 0x00000000 0x00000000 0x77ffc085 0x81f1f108 + 0x07077504 0x00000000 0x1c71c700 0x0028a28a + 0x0000003f 0x00000000 0x02000000 0x00000100 + 0x00f8000c 0x00000000 0x00000000 0x80003012 >; + }; + }; + }; + ahub@70080000 { /* HIFI CODEC (i2s1) */ i2s@70080400 { -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes 2026-07-21 10:10 ` [PATCH v2 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes Svyatoslav Ryhel @ 2026-07-21 10:31 ` sashiko-bot 0 siblings, 0 replies; 14+ messages in thread From: sashiko-bot @ 2026-07-21 10:31 UTC (permalink / raw) To: Svyatoslav Ryhel; +Cc: devicetree, robh, conor+dt Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: New issues: - [Medium] The `emc-timings-0` node added to `clock@60006000` violates the `nvidia,tegra114-car` DT binding (which enforces `additionalProperties: false` and explicitly rejects `emc-timings`). Furthermore, `clk-tegra114.c` lacks the specialized `tegra_clk_emc` driver and does not parse these timings, rendering the EMC DFS functionality incomplete and the device tree addition dead code. Pre-existing issues: - [Critical] `tegra114_emc_probe()` triggers an out-of-bounds heap write via type confusion. It unconditionally calls `tegra124_clk_set_emc_callbacks()`, which looks up the `"emc"` clock and uses `container_of()` to cast its `clk_hw` pointer to a `struct tegra_clk_emc`. However, on Tegra114, the `"emc"` clock is initialized by `tegra_periph_clk_init()` as a `struct tegra_clk_periph_gate`, which is much smaller. Writing the callback pointers into this structure overwrites adjacent SLAB memory. -- --- Patch [3]: [PATCH v2 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes --- commit 2497fc2e2b1505b1ff38584be3fcc67d52de87c4 Author: Svyatoslav Ryhel <clamor95@gmail.com> ARM: tegra: tf701t: Add MC and EMC timing nodes Configure Memory Controllers of ASUS TF701T. > diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > index 55e9256e80f33..00eeedf3ef7a5 100644 > --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > @@ -101,6 +101,89 @@ panel_secondary: panel@0 { > }; > }; > > + clock@60006000 { > + emc-timings-0 { > + nvidia,ram-code = <0>; [Severity: Medium] Does the nvidia,tegra114-car DT binding support emc-timings? The schema enforces additionalProperties: false and explicitly rejects emc-timings. Furthermore, since clk-tegra114.c lacks the specialized tegra_clk_emc driver and does not parse these timings, does this addition become dead code? [ ... ] > @@ -1610,6 +1693,636 @@ i2c-thermtrip { > }; > }; > > + memory-controller@70019000 { > + emc-timings-0 { > + /* Mozart Rev B Hynix DDR3 792MHz */ > + nvidia,ram-code = <0>; [Severity: Critical] This is a pre-existing issue, but does adding these memory controller nodes cause the tegra114-emc driver to probe, which unconditionally triggers an out-of-bounds heap write? In tegra114_emc_probe(), it unconditionally calls tegra124_clk_set_emc_callbacks(), which looks up the "emc" clock and uses container_of() to cast its clk_hw pointer to a struct tegra_clk_emc: drivers/clk/tegra/clk-tegra124-emc.c:tegra124_clk_set_emc_callbacks() { ... tegra = container_of(hw, struct tegra_clk_emc, hw); tegra->prepare_timing_change = prep_cb; tegra->complete_timing_change = complete_cb; ... } However, on Tegra114, the "emc" clock is initialized by tegra_periph_clk_init() as a much smaller struct tegra_clk_periph_gate. Would writing these callback pointers overwrite adjacent SLAB memory? > + > + timing-12750000 { > + clock-frequency = <12750000>; -- Sashiko AI review · https://sashiko.dev/#/patchset/20260721101059.451699-1-clamor95@gmail.com?part=3 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 04/10] ARM: tegra: tf701t: Remove pin_ prefix from PMIC pinmux 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel ` (2 preceding siblings ...) 2026-07-21 10:10 ` [PATCH v2 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 05/10] ARM: tegra: tf701t: Add thermal zones for nct1008 sensor Svyatoslav Ryhel ` (5 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Schema discourages using "_" in node names. Since pin names in palmas pinmux is not an ABI, remove all "pin_" prefixes from names. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- .../boot/dts/nvidia/tegra114-asus-tf701t.dts | 20 +++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 00eeedf3ef7a5..a27d3c4f2c63c 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -1462,52 +1462,52 @@ pinmux { pinctrl-0 = <&palmas_default>; palmas_default: pinmux { - pin_gpio0 { + gpio0 { pins = "gpio0"; function = "gpio"; }; - pin_gpio1 { + gpio1 { pins = "gpio1"; function = "gpio"; }; - pin_gpio2 { + gpio2 { pins = "gpio2"; function = "gpio"; }; - pin_gpio3 { + gpio3 { pins = "gpio3"; function = "gpio"; }; - pin_gpio4 { + gpio4 { pins = "gpio4"; function = "gpio"; }; - pin_gpio5 { + gpio5 { pins = "gpio5"; function = "gpio"; }; - pin_gpio6 { + gpio6 { pins = "gpio6"; function = "gpio"; }; - pin_gpio7 { + gpio7 { pins = "gpio7"; function = "gpio"; }; - pin_powergood { + powergood { pins = "powergood"; function = "powergood"; }; - pin_vac { + vac { pins = "vac"; function = "vac"; }; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 05/10] ARM: tegra: tf701t: Add thermal zones for nct1008 sensor 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel ` (3 preceding siblings ...) 2026-07-21 10:10 ` [PATCH v2 04/10] ARM: tegra: tf701t: Remove pin_ prefix from PMIC pinmux Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 06/10] ARM: tegra: tf701t: Tune MMC devices Svyatoslav Ryhel ` (4 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel ASUS TF701T has an additional thermal sensor for more accurate readings. Add thermal zones for this sensor. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- .../boot/dts/nvidia/tegra114-asus-tf701t.dts | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index a27d3c4f2c63c..83f8dd84d28a2 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -4,6 +4,7 @@ #include <dt-bindings/input/gpio-keys.h> #include <dt-bindings/input/input.h> +#include <dt-bindings/thermal/thermal.h> #include "tegra114.dtsi" @@ -2682,4 +2683,86 @@ vdd_1v8_touch: regulator-touch-vio { enable-active-high; vin-supply = <&vdd_3v3_sys>; }; + + thermal-zones { + /* + * NCT72 has two sensors: + * + * 0: internal that monitors ambient/skin temperature + * 1: external that is connected to the CPU's diode + * + * Ideally we should use userspace thermal governor, + * but it's a much more complex solution. The "skin" + * zone exists as a simpler solution which prevents + * Transformer from getting too hot from a user's + * tactile perspective. The CPU zone is intended to + * protect silicon from damage. + */ + + nct72-skin-thermal { + polling-delay-passive = <1000>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&temp_sensor 0>; + + trips { + skin_alert_trip: skin-alert { + /* throttle at 57C until temperature drops to 56.5C */ + temperature = <57000>; + hysteresis = <500>; + type = "passive"; + }; + + skin-crit { + /* shut down at 65C */ + temperature = <65000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map-skin { + trip = <&skin_alert_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + nct72-cpu-thermal { + polling-delay-passive = <1000>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&temp_sensor 1>; + + trips { + cpu_alert_trip: cpu-alert { + /* throttle at 75C until temperature drops to 74.5C */ + temperature = <75000>; + hysteresis = <500>; + type = "passive"; + }; + + cpu-crit { + /* shut down at 105C */ + temperature = <105000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map-cpu { + trip = <&cpu_alert_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; }; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 06/10] ARM: tegra: tf701t: Tune MMC devices 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel ` (4 preceding siblings ...) 2026-07-21 10:10 ` [PATCH v2 05/10] ARM: tegra: tf701t: Add thermal zones for nct1008 sensor Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:33 ` sashiko-bot 2026-07-21 10:10 ` [PATCH v2 07/10] ARM: tegra: tf701t: Fix BCM43341 WiFi/BT chip configuration Svyatoslav Ryhel ` (3 subsequent siblings) 9 siblings, 1 reply; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Add SDR104 mode to WiFi SDIO and uSD device nodes, remove mmc-ddr-1_8v which is eMMC specific and improve their power sequences. The uSD card refuses to work reliably with fixed regulator and 1.8V IO supply. Adjust configuration to mimic setup proposed by the vendor in the downstream kernel. Add HS200 mode support to the eMMC sdmmc device node. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- .../boot/dts/nvidia/tegra114-asus-tf701t.dts | 35 +++++++------------ 1 file changed, 13 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 83f8dd84d28a2..3de5c84d5f009 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -1645,9 +1645,9 @@ ldo8 { vddio_usd: ldo9 { regulator-name = "vddio_usd"; - /* min voltage of 1.8v is not stable */ - regulator-min-microvolt = <2900000>; + regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2900000>; + regulator-boot-on; }; avdd_hdmi: ldoln { @@ -2350,9 +2350,9 @@ brcm_wifi_pwrseq: pwrseq-wifi { clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>; clock-names = "ext_clock"; - reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; - post-power-on-delay-ms = <300>; - power-off-delay-us = <300>; + reset-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <100>; + power-off-delay-us = <100>; }; /* WiFi */ @@ -2372,9 +2372,7 @@ mmc@78000000 { non-removable; sd-uhs-ddr50; - mmc-ddr-1_8v; - - power-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>; + sd-uhs-sdr104; nvidia,default-tap = <0x2>; nvidia,default-trim = <0x2>; @@ -2396,14 +2394,18 @@ wifi@1 { /* MicroSD card */ mmc@78000400 { status = "okay"; - bus-width = <4>; + cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + power-gpios = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; + + sd-uhs-ddr50; + sd-uhs-sdr104; nvidia,default-tap = <0x3>; nvidia,default-trim = <0x3>; - vmmc-supply = <&vdd_2v9_usd>; + vmmc-supply = <&vcore_emmc>; vqmmc-supply = <&vddio_usd>; }; @@ -2414,6 +2416,7 @@ mmc@78000600 { non-removable; mmc-ddr-1_8v; + mmc-hs200-1_8v; vmmc-supply = <&vcore_emmc>; vqmmc-supply = <&vdd_1v8_vio>; @@ -2608,17 +2611,6 @@ hdmi_5v0_sys: regulator-hdmi { vin-supply = <&vdd_smps10_out2>; }; - vdd_2v9_usd: regulator-vdd-usd { - compatible = "regulator-fixed"; - regulator-name = "vdd_sd_slot"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - regulator-boot-on; - gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <&vcore_emmc>; - }; - vdd_1v8_cam: regulator-cam-vio { compatible = "regulator-fixed"; regulator-name = "vdd_1v8_cam"; @@ -2655,7 +2647,6 @@ vdd_3v3_com: regulator-com { regulator-name = "vdd_3v3_com"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-always-on; regulator-boot-on; gpio = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; enable-active-high; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 06/10] ARM: tegra: tf701t: Tune MMC devices 2026-07-21 10:10 ` [PATCH v2 06/10] ARM: tegra: tf701t: Tune MMC devices Svyatoslav Ryhel @ 2026-07-21 10:33 ` sashiko-bot 0 siblings, 0 replies; 14+ messages in thread From: sashiko-bot @ 2026-07-21 10:33 UTC (permalink / raw) To: Svyatoslav Ryhel; +Cc: devicetree, conor+dt, robh Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [High] Moving the MicroSD card power control to `power-gpios` and a shared regulator breaks MMC power cycling, preventing UHS-I (1.8V) error recovery. -- --- Patch [6]: [PATCH v2 06/10] ARM: tegra: tf701t: Tune MMC devices --- commit 08fae6eaa1d66420a7beb84b307b949d0eb99b35 Author: Svyatoslav Ryhel <clamor95@gmail.com> ARM: tegra: tf701t: Tune MMC devices This commit adds SDR104 mode to WiFi SDIO and uSD device nodes, removes mmc-ddr-1_8v, and improves power sequences. The uSD card configuration is adjusted to mimic the downstream kernel setup. > diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > index 83f8dd84d28a2..3de5c84d5f009 100644 > --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts [ ... ] > @@ -2396,14 +2394,18 @@ wifi@1 { > /* MicroSD card */ > mmc@78000400 { > status = "okay"; > - > bus-width = <4>; > + > cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; > + power-gpios = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; > + > + sd-uhs-ddr50; > + sd-uhs-sdr104; > > nvidia,default-tap = <0x3>; > nvidia,default-trim = <0x3>; > > - vmmc-supply = <&vdd_2v9_usd>; > + vmmc-supply = <&vcore_emmc>; [Severity: High] Does replacing the dynamic regulator with a static power-gpios property and a shared upstream regulator prevent the MMC subsystem from cycling VDD? During an MMC power cycle (e.g., error recovery or system reset), the MMC core attempts to cycle vmmc-supply. However, vmmc-supply is now the shared vcore_emmc, which remains on because the non-removable eMMC holds a reference. Meanwhile, the actual load switch for the MicroSD slot (TEGRA_GPIO(K, 1)) is permanently held high during probe and never toggled: drivers/mmc/host/sdhci-tegra.c:sdhci_tegra_probe() { ... tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power", GPIOD_OUT_HIGH); ... } If UHS-I 1.8V mode negotiation fails, or if a soft reboot occurs while the card is in 1.8V mode, the card will remain stuck expecting 1.8V signalling. The host will revert to 3.3V (or 2.9V) and fail to initialize the card until a hard cold boot. > vqmmc-supply = <&vddio_usd>; > }; [ ... ] > @@ -2608,17 +2611,6 @@ hdmi_5v0_sys: regulator-hdmi { > vin-supply = <&vdd_smps10_out2>; > }; > > - vdd_2v9_usd: regulator-vdd-usd { > - compatible = "regulator-fixed"; > - regulator-name = "vdd_sd_slot"; > - regulator-min-microvolt = <2900000>; > - regulator-max-microvolt = <2900000>; > - regulator-boot-on; > - gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; > - enable-active-high; > - vin-supply = <&vcore_emmc>; > - }; > - -- Sashiko AI review · https://sashiko.dev/#/patchset/20260721101059.451699-1-clamor95@gmail.com?part=6 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 07/10] ARM: tegra: tf701t: Fix BCM43341 WiFi/BT chip configuration 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel ` (5 preceding siblings ...) 2026-07-21 10:10 ` [PATCH v2 06/10] ARM: tegra: tf701t: Tune MMC devices Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 08/10] ARM: tegra: tf701t: Complete power sensor node Svyatoslav Ryhel ` (2 subsequent siblings) 9 siblings, 0 replies; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Drop reset GPIO from bluetooth part. Add lpo clock to both WiFi and bluetooth nodes. Add 'brcm,bcm43340-fmac' as primary compatible and 'brcm,bcm4329-fmac' remains as fallback. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 3de5c84d5f009..b71a02b3fd86f 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -1300,8 +1300,9 @@ bluetooth { compatible = "brcm,bcm4334-bt"; max-speed = <4000000>; - clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>; - clock-names = "txco"; + clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>, + <&palmas_clk32k>; + clock-names = "txco", "lpo"; interrupt-parent = <&gpio>; interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>; @@ -1309,7 +1310,6 @@ bluetooth { device-wakeup-gpios = <&gpio TEGRA_GPIO(EE, 1) GPIO_ACTIVE_HIGH>; shutdown-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio TEGRA_GPIO(Q, 6) GPIO_ACTIVE_LOW>; vbat-supply = <&vdd_3v3_com>; vddio-supply = <&vdd_1v8_vio>; @@ -1450,7 +1450,7 @@ palmas_gpio: gpio { #gpio-cells = <2>; }; - palmas_clk32kg@0 { + palmas_clk32k: palmas_clk32kg@0 { compatible = "ti,palmas-clk32kg"; #clock-cells = <0>; }; @@ -2382,9 +2382,12 @@ mmc@78000000 { vqmmc-supply = <&vdd_1v8_vio>; wifi@1 { - compatible = "brcm,bcm4329-fmac"; + compatible = "brcm,bcm43340-fmac", "brcm,bcm4329-fmac"; reg = <1>; + clocks = <&palmas_clk32k>; + clock-names = "lpo"; + interrupt-parent = <&gpio>; interrupts = <TEGRA_GPIO(U, 5) IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "host-wake"; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 08/10] ARM: tegra: tf701t: Complete power sensor node 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel ` (6 preceding siblings ...) 2026-07-21 10:10 ` [PATCH v2 07/10] ARM: tegra: tf701t: Fix BCM43341 WiFi/BT chip configuration Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 10/10] ARM: tegra: tf701t: Add chosen node Svyatoslav Ryhel 9 siblings, 0 replies; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Add missing vs-supply and io-channel-cells. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index b71a02b3fd86f..32d55c18c7446 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -1391,6 +1391,9 @@ power-sensor@44 { reg = <0x44>; shunt-resistor = <5000>; + + vs-supply = <&vdd_3v3_sys>; + #io-channel-cells = <1>; }; }; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel ` (7 preceding siblings ...) 2026-07-21 10:10 ` [PATCH v2 08/10] ARM: tegra: tf701t: Complete power sensor node Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 2026-07-21 10:23 ` sashiko-bot 2026-07-21 10:10 ` [PATCH v2 10/10] ARM: tegra: tf701t: Add chosen node Svyatoslav Ryhel 9 siblings, 1 reply; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Set UART-B line to use hsuart since it has GPS device linked to it. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 32d55c18c7446..0d182fa5c1af2 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -1283,6 +1283,11 @@ drive-gma { }; serial@70006040 { + compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart"; + reset-names = "serial"; + /delete-property/ reg-shift; + status = "okay"; + /* GPS */ }; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS 2026-07-21 10:10 ` [PATCH v2 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS Svyatoslav Ryhel @ 2026-07-21 10:23 ` sashiko-bot 0 siblings, 0 replies; 14+ messages in thread From: sashiko-bot @ 2026-07-21 10:23 UTC (permalink / raw) To: Svyatoslav Ryhel; +Cc: devicetree, robh, conor+dt Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] Undocumented compatible string `nvidia,tegra114-hsuart`. -- --- Patch [9]: [PATCH v2 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS --- commit de78632e3f3da744e644c7f7a6023ab3e302145b Author: Svyatoslav Ryhel <clamor95@gmail.com> ARM: tegra: tf701t: Configure UART-B line used for GPS This commit configures the UART-B line on the Tegra114 Asus TF701T device to use the high-speed UART (hsuart) driver. This change is necessary because the GPS device is linked to this specific serial port. > diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > index 32d55c18c7446..0d182fa5c1af2 100644 > --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts > @@ -1283,6 +1283,11 @@ drive-gma { > }; > > serial@70006040 { > + compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart"; [Severity: Low] Is it expected for "nvidia,tegra114-hsuart" to be undocumented in the device tree bindings? Using this compatible string here will trigger a dtbs_check warning during build validation since it is missing from the YAML binding located at Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.yaml. > + reset-names = "serial"; > + /delete-property/ reg-shift; > + status = "okay"; > + > /* GPS */ > }; > -- Sashiko AI review · https://sashiko.dev/#/patchset/20260721101059.451699-1-clamor95@gmail.com?part=9 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 10/10] ARM: tegra: tf701t: Add chosen node 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel ` (8 preceding siblings ...) 2026-07-21 10:10 ` [PATCH v2 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS Svyatoslav Ryhel @ 2026-07-21 10:10 ` Svyatoslav Ryhel 9 siblings, 0 replies; 14+ messages in thread From: Svyatoslav Ryhel @ 2026-07-21 10:10 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Thierry Reding, Jonathan Hunter, Svyatoslav Ryhel Cc: devicetree, linux-tegra, linux-kernel Add chosen node since some bootloaders may require it and add stdout link to UART-D to simplify getting kernel log via console. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> --- arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts index 0d182fa5c1af2..1b9839a855610 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -26,6 +26,10 @@ aliases { serial2 = &uartb; /* GPS */ }; + chosen { + stdout-path = "serial0:115200n8"; + }; + firmware { trusted-foundations { compatible = "tlm,trusted-foundations"; -- 2.53.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2026-07-21 10:33 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-21 10:10 [PATCH v2 00/10] ARM: tegra: tf701t: Add new features Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 01/10] ARM: tegra: tf701t: Configure CPU DFLL clock node Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 02/10] ARM: tegra: tf701t: Add core-supply to PMC node Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 03/10] ARM: tegra: tf701t: Add MC and EMC timing nodes Svyatoslav Ryhel 2026-07-21 10:31 ` sashiko-bot 2026-07-21 10:10 ` [PATCH v2 04/10] ARM: tegra: tf701t: Remove pin_ prefix from PMIC pinmux Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 05/10] ARM: tegra: tf701t: Add thermal zones for nct1008 sensor Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 06/10] ARM: tegra: tf701t: Tune MMC devices Svyatoslav Ryhel 2026-07-21 10:33 ` sashiko-bot 2026-07-21 10:10 ` [PATCH v2 07/10] ARM: tegra: tf701t: Fix BCM43341 WiFi/BT chip configuration Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 08/10] ARM: tegra: tf701t: Complete power sensor node Svyatoslav Ryhel 2026-07-21 10:10 ` [PATCH v2 09/10] ARM: tegra: tf701t: Configure UART-B line used for GPS Svyatoslav Ryhel 2026-07-21 10:23 ` sashiko-bot 2026-07-21 10:10 ` [PATCH v2 10/10] ARM: tegra: tf701t: Add chosen node Svyatoslav Ryhel
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.