* [PATCH v4] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
@ 2026-07-22 12:32 Udaya Kiran Challa
2026-07-22 12:44 ` sashiko-bot
0 siblings, 1 reply; 2+ messages in thread
From: Udaya Kiran Challa @ 2026-07-22 12:32 UTC (permalink / raw)
To: linusw, robh, krzk+dt, conor+dt
Cc: skhan, me, linux-gpio, devicetree, linux-kernel,
Udaya Kiran Challa
Convert Microchip PIC32 Pin Controller devicetree binding
from legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
Changelog:
Changes since v3:
- Drop "|" from description fields
- Remove '#address-cells' and '#size-cells' properties from the schema
- Consolidate repeated pin-node property definitions into a single
$defs/pin-node entry
- Replace the two patternProperties blocks with additionalProperties
using oneOf to allow either:
- container nodes holding nested pin configuration nodes, or
- direct pin configuration nodes.
- Update $ref to use the absolute schema path
/schemas/pinctrl/pinmux-node.yaml#
Link to v3:https://lore.kernel.org/all/20260719183431.124061-1-challauday369@gmail.com/
Changes since v2:
- Add container node for grouped pin configuration sub-nodes
- Correct regex patterns of direct and nested child nodes
- Fix interrupts values in uart2 example
Link to v2:https://lore.kernel.org/all/20260707144223.120417-1-challauday369@gmail.com/
Changes since v1:
- Add interrupts and clocks to uart2 example to satisfy uart schema validation
- Corect regex patterns to accept standard DT node naming conventions
- Add function property to top-level pin configuration nodes
- Remove restrictive enum from function property to support all mux functions
Link to v1:https://lore.kernel.org/all/20260705132521.159522-1-challauday369@gmail.com/
---
.../pinctrl/microchip,pic32-pinctrl.txt | 60 ----------
.../pinctrl/microchip,pic32mzda-pinctrl.yaml | 107 ++++++++++++++++++
2 files changed, 107 insertions(+), 60 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
deleted file mode 100644
index 51efd2085113..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
+++ /dev/null
@@ -1,60 +0,0 @@
-* Microchip PIC32 Pin Controller
-
-Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
-../interrupt-controller/interrupts.txt for generic information regarding
-pin controller, GPIO, and interrupt bindings.
-
-PIC32 'pin configuration node' is a node of a group of pins which can be
-used for a specific device or function. This node represents configurations of
-pins, optional function, and optional mux related configuration.
-
-Required properties for pin controller node:
- - compatible: "microchip,pic32mada-pinctrl"
- - reg: Address range of the pinctrl registers.
- - clocks: Clock specifier (see clock bindings for details)
-
-Required properties for pin configuration sub-nodes:
- - pins: List of pins to which the configuration applies.
-
-Optional properties for pin configuration sub-nodes:
-----------------------------------------------------
- - function: Mux function for the specified pins.
- - bias-pull-up: Enable weak pull-up.
- - bias-pull-down: Enable weak pull-down.
- - input-enable: Set the pin as an input.
- - output-low: Set the pin as an output level low.
- - output-high: Set the pin as an output level high.
- - microchip,digital: Enable digital I/O.
- - microchip,analog: Enable analog I/O.
-
-Example:
-
-pic32_pinctrl: pinctrl@1f801400{
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "microchip,pic32mzda-pinctrl";
- reg = <0x1f801400 0x400>;
- clocks = <&rootclk PB1CLK>;
-
- pinctrl_uart2: pinctrl_uart2 {
- uart2-tx {
- pins = "G9";
- function = "U2TX";
- microchip,digital;
- output-low;
- };
- uart2-rx {
- pins = "B0";
- function = "U2RX";
- microchip,digital;
- input-enable;
- };
- };
-};
-
-uart2: serial@1f822200 {
- compatible = "microchip,pic32mzda-uart";
- reg = <0x1f822200 0x50>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
-};
diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
new file mode 100644
index 000000000000..a1ecae3b1cd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
@@ -0,0 +1,107 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/microchip,pic32mzda-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PIC32 Pin Controller
+
+maintainers:
+ - Linus Walleij <linusw@kernel.org>
+
+description:
+ PIC32 pin configuration node is a node of a group of pins which can be used
+ for a specific device or function. This node represents configurations of
+ pins, optional function, and optional mux related configuration.
+
+properties:
+ compatible:
+ const: microchip,pic32mzda-pinctrl
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+$defs:
+ pin-node:
+ type: object
+ $ref: /schemas/pinctrl/pinmux-node.yaml#
+
+ properties:
+ pins:
+ description: List of pins to which the configuration applies.
+ items:
+ type: string
+ minItems: 1
+
+ function: true
+
+ bias-pull-up: true
+ bias-pull-down: true
+ input-enable: true
+ output-low: true
+ output-high: true
+
+ microchip,digital:
+ description: Enable digital I/O.
+ type: boolean
+
+ microchip,analog:
+ description: Enable analog I/O.
+ type: boolean
+
+ required:
+ - pins
+
+ unevaluatedProperties: false
+
+additionalProperties:
+ oneOf:
+ - additionalProperties:
+ $ref: '#/$defs/pin-node'
+ - $ref: '#/$defs/pin-node'
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+examples:
+ - |
+ #include <dt-bindings/clock/microchip,pic32-clock.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ pic32_pinctrl: pinctrl@1f801400 {
+ compatible = "microchip,pic32mzda-pinctrl";
+ reg = <0x1f801400 0x400>;
+ clocks = <&rootclk PB1CLK>;
+
+ pinctrl_uart2: pinctrl_uart2 {
+ uart2-tx {
+ pins = "G9";
+ function = "U2TX";
+ microchip,digital;
+ output-low;
+ };
+
+ uart2-rx {
+ pins = "B0";
+ function = "U2RX";
+ microchip,digital;
+ input-enable;
+ };
+ };
+ };
+
+ uart2: serial@1f822200 {
+ compatible = "microchip,pic32mzda-uart";
+ reg = <0x1f822200 0x50>;
+ interrupts = <145 IRQ_TYPE_LEVEL_HIGH>,
+ <146 IRQ_TYPE_LEVEL_HIGH>,
+ <147 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rootclk PB2CLK>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v4] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
2026-07-22 12:32 [PATCH v4] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Udaya Kiran Challa
@ 2026-07-22 12:44 ` sashiko-bot
0 siblings, 0 replies; 2+ messages in thread
From: sashiko-bot @ 2026-07-22 12:44 UTC (permalink / raw)
To: Udaya Kiran Challa; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] The top-level `additionalProperties` logic using `oneOf` silently accepts undefined non-object properties and breaks validation for standard container nodes due to injected `phandle` properties.
- [Medium] The `$defs/pin-node` definition bypasses all type and constraint checking for standard pin configuration properties because it fails to reference `pincfg-node.yaml`.
- [Low] The removal of `#address-cells` and `#size-cells` from the schema creates a mismatch with the existing `pic32mzda.dtsi`, which will cause `dtbs_check` warnings.
--
--- Patch [1]: [PATCH v4] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema ---
commit 238b9bfa23edd44c05fbb35e962f0ab9f0bb9f25
Author: Udaya Kiran Challa <challauday369@gmail.com>
Date: Wed Jul 22 12:32:43 2026 +0000
dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
This commit converts the Microchip PIC32 Pin Controller devicetree binding
from legacy text format to DT schema. It consolidates pin-node properties and
updates the schema layout to support nested or direct pin configurations.
Link to v3: https://lore.kernel.org/all/20260719183431.124061-1-challauday369@gmail.com/
Link to v2: https://lore.kernel.org/all/20260707144223.120417-1-challauday369@gmail.com/
Link to v1: https://lore.kernel.org/all/20260705132521.159522-1-challauday369@gmail.com/
> diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
> new file mode 100644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
> @@ -0,0 +1,107 @@
[ ... ]
> +properties:
> + compatible:
> + const: microchip,pic32mzda-pinctrl
> +
> + reg:
> + maxItems: 1
[Severity: Low]
Even though the changelog mentions removing #address-cells and #size-cells
from the schema, aren't these properties still present in the
pinctrl@1f801400 node in arch/mips/boot/dts/pic32/pic32mzda.dtsi?
Will their removal from the schema cause dtbs_check warnings for the
existing in-tree device tree?
> +
> + clocks:
> + maxItems: 1
> +
> +$defs:
> + pin-node:
> + type: object
> + $ref: /schemas/pinctrl/pinmux-node.yaml#
> +
> + properties:
> + pins:
> + description: List of pins to which the configuration applies.
> + items:
> + type: string
> + minItems: 1
> +
> + function: true
> +
> + bias-pull-up: true
> + bias-pull-down: true
> + input-enable: true
> + output-low: true
> + output-high: true
[Severity: Medium]
Does this bypass type and constraint checking for the generic pin
configuration properties?
By assigning these generic properties to true without also including a
$ref: /schemas/pinctrl/pincfg-node.yaml#, it looks like the schema
validator might silently accept any value or type for them, missing
mutually exclusive constraints like having both output-low and
output-high present.
> +
> + microchip,digital:
> + description: Enable digital I/O.
> + type: boolean
> +
[ ... ]
> + required:
> + - pins
> +
> + unevaluatedProperties: false
> +
> +additionalProperties:
> + oneOf:
> + - additionalProperties:
> + $ref: '#/$defs/pin-node'
> + - $ref: '#/$defs/pin-node'
[Severity: High]
Will this oneOf construct silently accept undefined scalar properties?
Because the first branch lacks a type: object constraint, a typoed
scalar property might trivially pass the first branch and satisfy the
oneOf.
Also, for valid child container nodes referenced via a phandle, the
devicetree compiler automatically injects a phandle property. Since
that injected phandle is not an object, won't it fail the $ref type
check here and cause spurious dtbs_check errors for perfectly valid
hardware configurations?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260722123243.341346-1-challauday369@gmail.com?part=1
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2026-07-22 12:44 ` sashiko-bot
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