From: Linu Cherian <linu.cherian@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Ryan Roberts <ryan.roberts@arm.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Linu Cherian <linu.cherian@arm.com>,
Gavin Shan <gshan@redhat.com>
Subject: [PATCH v4 1/6] arm64: cputype: Add Cortex-A520AE definitions
Date: Thu, 23 Jul 2026 10:10:28 +0530 [thread overview]
Message-ID: <20260723044034.2983651-2-linu.cherian@arm.com> (raw)
In-Reply-To: <20260723044034.2983651-1-linu.cherian@arm.com>
Add cputype definitions for Cortex-A520AE.
The definition can be found in Cortex-A520AE TRM,
https://developer.arm.com/documentation/107726/0001/
as part of MIDR_EL1 bit descriptions.
This is going to be used in the bbml3 support list.
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Linu Cherian <linu.cherian@arm.com>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 1b9f0cda1336..e41fae46426b 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -82,6 +82,7 @@
#define ARM_CPU_PART_CORTEX_X1 0xD44
#define ARM_CPU_PART_CORTEX_A510 0xD46
#define ARM_CPU_PART_CORTEX_A520 0xD80
+#define ARM_CPU_PART_CORTEX_A520AE 0xD88
#define ARM_CPU_PART_CORTEX_A710 0xD47
#define ARM_CPU_PART_CORTEX_A715 0xD4D
#define ARM_CPU_PART_CORTEX_X2 0xD48
@@ -176,6 +177,7 @@
#define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)
#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
#define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520)
+#define MIDR_CORTEX_A520AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520AE)
#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
#define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715)
#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
--
2.43.0
next prev parent reply other threads:[~2026-07-23 4:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 4:40 [PATCH v4 0/6] Add BBML3 cpu feature Linu Cherian
2026-07-23 4:40 ` Linu Cherian [this message]
2026-07-23 4:40 ` [PATCH v4 2/6] arm64: cputype: Add C1-Nano definitions Linu Cherian
2026-07-23 4:40 ` [PATCH v4 3/6] arm64: cpufeature: Extend bbml2_noabort support list Linu Cherian
2026-07-23 7:26 ` Anshuman Khandual
2026-07-23 4:40 ` [PATCH v4 4/6] arm64: sysreg: Add BBM_3 Linu Cherian
2026-07-23 4:40 ` [PATCH v4 5/6] arm64: cpufeature: Rename BBML2_NOABORT as BBML3 Linu Cherian
2026-08-06 17:11 ` Will Deacon
2026-08-07 2:32 ` Linu Cherian
2026-07-23 4:40 ` [PATCH v4 6/6] arm64: cpufeature: Detect BBML3 based on ID_AA64MMFR2_EL1.BBM Linu Cherian
2026-07-31 15:13 ` Will Deacon
2026-08-03 3:52 ` Linu Cherian
2026-08-03 4:19 ` Anshuman Khandual
2026-08-04 13:51 ` Will Deacon
2026-08-05 9:20 ` Linu Cherian
2026-08-06 11:26 ` Will Deacon
2026-08-06 17:11 ` [PATCH v4 0/6] Add BBML3 cpu feature Will Deacon
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