From: Yixun Lan <dlan@kernel.org>
To: Zhengyu He <hezhy472013@gmail.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Mark Brown <broonie@kernel.org>,
Alex Elder <elder@kernel.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, wefu@redhat.com,
Cody Kang <cody.kang.hk@outlook.com>
Subject: Re: [PATCH 4/4] riscv: dts: spacemit: enable SPI0 on K3 CoM260-IFX
Date: Sat, 25 Jul 2026 13:13:49 +0000 [thread overview]
Message-ID: <20260725131349-GKD77545@kernel.org> (raw)
In-Reply-To: <20260717-k3-com260-spi-v7-2-rc2-b4-preview-20260716-v1-4-969a1b0f783f@gmail.com>
Hi Zhengyu,
On 07:45 Fri 17 Jul , Zhengyu He wrote:
> SPI0 is the first enabled PDMA consumer on CoM260-IFX, so enable the
> PDMA controller together with SPI0.
>
> The board exposes SPI0 on its 40-pin header:
>
> pin 19: MOSI
> pin 21: MISO
> pin 23: SCLK
> pin 24: CS0
>
> Define the pinctrl state used by this header wiring, and describe the SPI
> NOR on chip select 0 for the current validation setup.
>
> (This was tested using a Winbond W25Q64JV SPI NOR chip.)
>
It's fine to test spi controller with an external attached NOR flash,
but doesn't make sense to enable it permanently in board dts level.
I think it's probably better to provide as an independent dtso file,
which more flexible to let user decide to enable it or not..
Anyway, I will leave out this patch for further discussion, and
only pick patch 1 & 3 for now, thanks
> Signed-off-by: Cody Kang <cody.kang.hk@outlook.com>
> Signed-off-by: Zhengyu He <hezhy472013@gmail.com>
> ---
> arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts | 13 ++++++++++++-
> arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 21 +++++++++++++++++++++
> 2 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
> index 238bb03d0e9e..01a7135df864 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
> @@ -11,11 +11,22 @@ / {
> compatible = "spacemit,k3-com260-ifx", "spacemit,k3-com260", "spacemit,k3";
>
> aliases {
> - serial0 = &uart0;
> ethernet0 = ð1;
> + serial0 = &uart0;
> + spi0 = &spi0;
> };
>
> chosen {
> stdout-path = "serial0:115200n8";
> };
> };
> +
> +&pdma {
> + status = "okay";
> +};
> +
> +&spi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&ssp0_2_cfg>;
> + status = "okay";
> +};
..
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
> index 3ee1471f3798..9b7617f3846c 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
> @@ -679,6 +679,27 @@ pwm19-2-pins {
> };
> };
>
> + /omit-if-no-ref/
> + ssp0_2_cfg: ssp0-2-cfg {
> + ssp0-0-pins {
> + pinmux = <K3_PADCONF(104, 1)>, /* ssp0 tx */
> + <K3_PADCONF(105, 1)>, /* ssp0 rx */
> + <K3_PADCONF(106, 1)>; /* ssp0 clk */
> +
> + bias-disable;
> + drive-strength = <25>;
> + power-source = <1800>;
> + };
> +
> + ssp0-1-pins {
> + pinmux = <K3_PADCONF(107, 1)>; /* ssp0 frm */
> +
> + bias-pull-up = <0>;
> + drive-strength = <25>;
> + power-source = <1800>;
> + };
> + };
> +
If you can put spi pinctrl data as a separate patch, then I'd be happy
to include, just be sure to list all spi controller pinctrl info
> /omit-if-no-ref/
> uart0_0_cfg: uart0-0-cfg {
> uart0-0-pins {
>
> --
> 2.53.0
>
--
Yixun Lan (dlan)
WARNING: multiple messages have this Message-ID (diff)
From: Yixun Lan <dlan@kernel.org>
To: Zhengyu He <hezhy472013@gmail.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Mark Brown <broonie@kernel.org>,
Alex Elder <elder@kernel.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, wefu@redhat.com,
Cody Kang <cody.kang.hk@outlook.com>
Subject: Re: [PATCH 4/4] riscv: dts: spacemit: enable SPI0 on K3 CoM260-IFX
Date: Sat, 25 Jul 2026 13:13:49 +0000 [thread overview]
Message-ID: <20260725131349-GKD77545@kernel.org> (raw)
In-Reply-To: <20260717-k3-com260-spi-v7-2-rc2-b4-preview-20260716-v1-4-969a1b0f783f@gmail.com>
Hi Zhengyu,
On 07:45 Fri 17 Jul , Zhengyu He wrote:
> SPI0 is the first enabled PDMA consumer on CoM260-IFX, so enable the
> PDMA controller together with SPI0.
>
> The board exposes SPI0 on its 40-pin header:
>
> pin 19: MOSI
> pin 21: MISO
> pin 23: SCLK
> pin 24: CS0
>
> Define the pinctrl state used by this header wiring, and describe the SPI
> NOR on chip select 0 for the current validation setup.
>
> (This was tested using a Winbond W25Q64JV SPI NOR chip.)
>
It's fine to test spi controller with an external attached NOR flash,
but doesn't make sense to enable it permanently in board dts level.
I think it's probably better to provide as an independent dtso file,
which more flexible to let user decide to enable it or not..
Anyway, I will leave out this patch for further discussion, and
only pick patch 1 & 3 for now, thanks
> Signed-off-by: Cody Kang <cody.kang.hk@outlook.com>
> Signed-off-by: Zhengyu He <hezhy472013@gmail.com>
> ---
> arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts | 13 ++++++++++++-
> arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 21 +++++++++++++++++++++
> 2 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
> index 238bb03d0e9e..01a7135df864 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
> +++ b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts
> @@ -11,11 +11,22 @@ / {
> compatible = "spacemit,k3-com260-ifx", "spacemit,k3-com260", "spacemit,k3";
>
> aliases {
> - serial0 = &uart0;
> ethernet0 = ð1;
> + serial0 = &uart0;
> + spi0 = &spi0;
> };
>
> chosen {
> stdout-path = "serial0:115200n8";
> };
> };
> +
> +&pdma {
> + status = "okay";
> +};
> +
> +&spi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&ssp0_2_cfg>;
> + status = "okay";
> +};
..
> diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
> index 3ee1471f3798..9b7617f3846c 100644
> --- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
> @@ -679,6 +679,27 @@ pwm19-2-pins {
> };
> };
>
> + /omit-if-no-ref/
> + ssp0_2_cfg: ssp0-2-cfg {
> + ssp0-0-pins {
> + pinmux = <K3_PADCONF(104, 1)>, /* ssp0 tx */
> + <K3_PADCONF(105, 1)>, /* ssp0 rx */
> + <K3_PADCONF(106, 1)>; /* ssp0 clk */
> +
> + bias-disable;
> + drive-strength = <25>;
> + power-source = <1800>;
> + };
> +
> + ssp0-1-pins {
> + pinmux = <K3_PADCONF(107, 1)>; /* ssp0 frm */
> +
> + bias-pull-up = <0>;
> + drive-strength = <25>;
> + power-source = <1800>;
> + };
> + };
> +
If you can put spi pinctrl data as a separate patch, then I'd be happy
to include, just be sure to list all spi controller pinctrl info
> /omit-if-no-ref/
> uart0_0_cfg: uart0-0-cfg {
> uart0-0-pins {
>
> --
> 2.53.0
>
--
Yixun Lan (dlan)
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next prev parent reply other threads:[~2026-07-25 13:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-17 14:45 [PATCH 0/4] spi: spacemit: support K3 SPI controllers Zhengyu He
2026-07-17 14:45 ` Zhengyu He
2026-07-17 14:45 ` [PATCH 1/4] riscv: dts: spacemit: add K3 PDMA request numbers Zhengyu He
2026-07-17 14:45 ` Zhengyu He
2026-07-25 13:15 ` Yixun Lan
2026-07-25 13:15 ` Yixun Lan
2026-07-17 14:45 ` [PATCH 2/4] spi: dt-bindings: spacemit: add K3 SPI compatible Zhengyu He
2026-07-17 14:45 ` Zhengyu He
2026-07-17 14:45 ` [PATCH 3/4] riscv: dts: spacemit: add SPI controllers for K3 Zhengyu He
2026-07-17 14:45 ` Zhengyu He
2026-07-25 13:15 ` Yixun Lan
2026-07-25 13:15 ` Yixun Lan
2026-07-17 14:45 ` [PATCH 4/4] riscv: dts: spacemit: enable SPI0 on K3 CoM260-IFX Zhengyu He
2026-07-17 14:45 ` Zhengyu He
2026-07-17 14:51 ` sashiko-bot
2026-07-25 13:13 ` Yixun Lan [this message]
2026-07-25 13:13 ` Yixun Lan
2026-07-21 21:41 ` (subset) [PATCH 0/4] spi: spacemit: support K3 SPI controllers Mark Brown
2026-07-21 21:41 ` Mark Brown
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