From: sashiko-bot@kernel.org
To: "Sasha Finkelstein" <k@chaosmail.tech>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 7/7] spmi: apple: interrupt controller functionality
Date: Sat, 25 Jul 2026 13:59:49 +0000 [thread overview]
Message-ID: <20260725135949.AA3A61F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260725-t603x-spmi-v1-7-e1a29fcd2d38@chaosmail.tech>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Using the 32-bit `BIT()` macro with 64-bit integers causes data truncation and undefined behavior on 32-bit architectures.
- [Low] Missing inclusion of `<linux/io-64-nonatomic-lo-hi.h>` causes build failures on 32-bit architectures under `COMPILE_TEST`.
--
--- Patch [7]: [PATCH 7/7] spmi: apple: interrupt controller functionality ---
commit d1caa99a04e657899090218f53dc529fd1b04548
Author: Alba Mendez <me@alba.sh>
spmi: apple: interrupt controller functionality
Add support for interrupts sent by slave devices.
> diff --git a/drivers/spmi/spmi-apple-controller.c b/drivers/spmi/spmi-apple-controller.c
> index d627187b3ac00..13b48fd66aec4 100644
> --- a/drivers/spmi/spmi-apple-controller.c
> +++ b/drivers/spmi/spmi-apple-controller.c
[ ... ]
> @@ -228,11 +234,123 @@ static void apple_spmi_irq_unmask_raw(struct apple_spmi *spmi, u32 irq)
> writel(readl(reg) | BIT(irq % 32), reg);
> }
>
> +static void apple_spmi_irq_ack(struct irq_data *d)
> +{
> + struct apple_spmi *spmi = irq_data_get_irq_chip_data(d);
> +
> + apple_spmi_irq_ack_raw(spmi, d->hwirq);
> +}
> +
> +static void apple_spmi_irq_mask(struct irq_data *d)
> +{
> + struct apple_spmi *spmi = irq_data_get_irq_chip_data(d);
> + unsigned long flags;
> +
> + raw_spin_lock_irqsave(&spmi->irq_mask_lock, flags);
> + apple_spmi_irq_mask_raw(spmi, d->hwirq);
> + spmi->irq_mask_cache[d->hwirq / 64] &= ~BIT(d->hwirq % 64);
[Severity: High]
Does using BIT() instead of BIT_ULL() here unintentionally clear the upper
32 bits of the 64-bit irq_mask_cache entry on 32-bit systems?
When d->hwirq % 64 is >= 32, this might also cause undefined behavior on
32-bit architectures, which can be reached via COMPILE_TEST.
> + raw_spin_unlock_irqrestore(&spmi->irq_mask_lock, flags);
> +}
> +
> +static void apple_spmi_irq_unmask(struct irq_data *d)
> +{
> + struct apple_spmi *spmi = irq_data_get_irq_chip_data(d);
> + unsigned long flags;
> +
> + raw_spin_lock_irqsave(&spmi->irq_mask_lock, flags);
> + apple_spmi_irq_unmask_raw(spmi, d->hwirq);
> + spmi->irq_mask_cache[d->hwirq / 64] |= BIT(d->hwirq % 64);
[Severity: High]
Similarly, could this cause undefined behavior on 32-bit systems when
d->hwirq % 64 is >= 32?
> + raw_spin_unlock_irqrestore(&spmi->irq_mask_lock, flags);
> +}
[ ... ]
> @@ -241,6 +359,23 @@ static irqreturn_t apple_spmi_irq_handler(int irq, void *dev_id)
> handled = true;
> }
>
> + for (offset = 0; offset < SPMI_IRQ_USER_SIZE; offset += sizeof(val)) {
> + val = readq(spmi->regs + SPMI_IRQ_ACK_BASE + offset);
[Severity: Low]
Does calling readq() here cause a build failure on 32-bit architectures
under COMPILE_TEST since <linux/io-64-nonatomic-lo-hi.h> is not included?
> + /**
> + * because of other masters in the bus, we're going to get a multitude of
> + * interrupts we're not interested in. irq_resolve_mapping isn't very
> + * optimized for the nonexistent path, so instead we mask with (a locally
> + * cached version of) the IRQ mask
> + */
> + val &= spmi->irq_mask_cache[offset / sizeof(val)];
> + while (val) {
> + bit = __builtin_ctzll(val);
> + generic_handle_domain_irq(spmi->irqd, offset * 8 + bit);
> + handled = true;
> + val &= ~BIT(bit);
[Severity: High]
Since val is a 64-bit integer, and bit can range from 0 to 63, would
~BIT(bit) on 32-bit systems produce a 32-bit inverted mask that zero-extends
when promoted to 64 bits? This might unintentionally clear the upper 32 bits
of val.
> + }
> + }
> +
> return handled ? IRQ_HANDLED : IRQ_NONE;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260725-t603x-spmi-v1-0-e1a29fcd2d38@chaosmail.tech?part=7
prev parent reply other threads:[~2026-07-25 13:59 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-25 13:47 [PATCH 0/7] spmi: apple: Additional commands and interrupt support Sasha Finkelstein
2026-07-25 13:47 ` [PATCH 1/7] dt-bindings: spmi: apple,spmi: Add t603x Sasha Finkelstein
2026-07-25 13:52 ` sashiko-bot
2026-07-25 13:47 ` [PATCH 2/7] spmi: apple: Validate FIFO state Sasha Finkelstein
2026-07-25 14:00 ` sashiko-bot
2026-07-25 13:48 ` [PATCH 3/7] spmi: apple: check transaction status Sasha Finkelstein
2026-07-25 14:02 ` sashiko-bot
2026-07-25 13:48 ` [PATCH 4/7] spmi: apple: Implement remaining commands Sasha Finkelstein
2026-07-25 14:02 ` sashiko-bot
2026-07-25 13:48 ` [PATCH 5/7] spmi: apple: lock around FIFOs Sasha Finkelstein
2026-07-25 14:01 ` sashiko-bot
2026-07-25 13:48 ` [PATCH 6/7] spmi: apple: use IRQ for RX FIFO if possible Sasha Finkelstein
2026-07-25 14:00 ` sashiko-bot
2026-07-25 13:48 ` [PATCH 7/7] spmi: apple: interrupt controller functionality Sasha Finkelstein
2026-07-25 13:59 ` sashiko-bot [this message]
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