Re: [PATCH 2/6] dt-bindings: ptp: Document TSCSS hardware on Qualcomm QDU1000 SoC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The DT binding schema fails to forbid ETU slice subnodes and related address properties when the ETU clock is missing.
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--- Patch [2]: [PATCH 2/6] dt-bindings: ptp: Document TSCSS hardware on Qualcomm QDU1000 SoC ---
commit fa3eee253cb3594f0f82d586d18506452f967b6b
Author: Imran Shaik <imran.shaik@oss.qualcomm.com>

dt-bindings: ptp: Document TSCSS hardware on Qualcomm QDU1000 SoC

This commit adds Devicetree bindings for the Timestamp Counter Subsystem
(TSCSS) found on the Qualcomm QDU1000 SoC. It defines the required properties
for the core TSC block as well as the optional Event Timestamp Unit (ETU)
block and its slice subnodes.

> diff --git a/Documentation/devicetree/bindings/ptp/qcom,qdu1000-tscss.yaml b/Documentation/devicetree/bindings/ptp/qcom,qdu1000-tscss.yaml
> new file mode 100644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ptp/qcom,qdu1000-tscss.yaml
[ ... ]
> +allOf:
> +  - if:
> +      properties:
> +        clock-names:
> +          contains:
> +            const: etu
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 3
> +        clock-names:
> +          minItems: 3
> +      required:
> +        - "#address-cells"
> +        - "#size-cells"
> +        - ranges

[Severity: Low]
Does this conditional block need an 'else' clause to forbid the ETU slice
subnodes and related address properties when the ETU clock is missing?

The commit message notes that support for the ETU block requires the ETU
clock along with the slice subnodes. Without an 'else' block explicitly
setting '#address-cells', 'ranges', and 'patternProperties: 
"^etu-slice@[0-9a-f]+$"' to false, a device tree could configure ETU
slices while omitting the required ETU clock and still incorrectly pass
schema validation.

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Sashiko AI review · https://sashiko.dev/#/patchset/20260727-tscss-v1-0-beed14e72510@oss.qualcomm.com?part=2