Re: [PATCH v4 4/4] arm64: dts: qcom: hamoa-pmics: Add ADC support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Mismatch between configured pinctrl pins and ADC AMUX channels for system thermistors.
--

--- Patch [4]: [PATCH v4 4/4] arm64: dts: qcom: hamoa-pmics: Add ADC support ---
commit abcfdfa0b33d2473870045c8d56652b236189ed1
Author: Ayyagari Ushasreevalli <aushasre@qti.qualcomm.com>

arm64: dts: qcom: hamoa-pmics: Add ADC support
    
This commit adds ADC nodes and defines channels for die temperature, VPH power,
and system thermistors for various PMICs on hamoa boards. It also wires up
io-channels for the temp_alarm nodes to get temperature readings.

> diff --git a/arch/arm64/boot/dts/qcom/hamoa-pmics.dtsi b/arch/arm64/boot/dts/qcom/hamoa-pmics.dtsi
> index 6a31a0adf8be4..17d754d57e189 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa-pmics.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hamoa-pmics.dtsi

[ ... ]

> @@ -277,6 +279,134 @@ pmk8550_pwm: pwm {
>  
>  			status = "disabled";
>  		};
> +
> +		pmk8550_vadc: adc@9000 {
> +			compatible = "qcom,spmi-adc5-gen3";
> +			reg = <0x9000>, <0x9100>;
> +			interrupts-extended = <&spmi_bus0 0x0 0x90 0x1 IRQ_TYPE_EDGE_RISING>,
> +					      <&spmi_bus0 0x0 0x91 0x1 IRQ_TYPE_EDGE_RISING>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			#io-channel-cells = <1>;
> +			pinctrl-0 = <&sys_therm_0_gpio3>, <&sys_therm_1_gpio4>;
> +			pinctrl-names = "default";

[ ... ]

> +			channel@14a {
> +				reg = <ADC5_GEN3_AMUX1_GPIO_100K_PU(1)>;
> +				label = "pm8550_gpio_01";
> +				qcom,ratiometric;
> +				qcom,hw-settle-time = <200>;
> +				qcom,pre-scaling = <1 1>;
> +			};
> +
> +			channel@14b {
> +				reg = <ADC5_GEN3_AMUX2_GPIO_100K_PU(1)>;
> +				label = "pm8550_gpio_02";
> +				qcom,ratiometric;
> +				qcom,hw-settle-time = <200>;
> +				qcom,pre-scaling = <1 1>;
> +			};

[Severity: Medium]
Is there a mismatch between the configured pinctrl pins and the ADC AMUX
channels being read here?

The pinctrl explicitly configures GPIO3 and GPIO4 (sys_therm_0_gpio3 and
sys_therm_1_gpio4) as analog inputs for the system thermistors. However, the
channel definitions above use ADC5_GEN3_AMUX1_GPIO (GPIO1) and
ADC5_GEN3_AMUX2_GPIO (GPIO2) with labels pm8550_gpio_01 and pm8550_gpio_02.

Could this cause the ADC to read from unconfigured pins and return floating
temperature values, while the actual thermistor pins remain unread?

[ ... ]

> @@ -301,6 +433,18 @@ pm8550_gpios: gpio@8800 {
>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> +
> +			sys_therm_0_gpio3: sys-therm-0-gpio3-state {
> +				pins = "gpio3";
> +				function = PMIC_GPIO_FUNC_NORMAL;
> +				bias-high-impedance;
> +			};
> +
> +			sys_therm_1_gpio4: sys-therm-1-gpio4-state {
> +				pins = "gpio4";
> +				function = PMIC_GPIO_FUNC_NORMAL;
> +				bias-high-impedance;
> +			};
>  		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260728-adc5_gen3_dt-v4-0-355f0edece77@oss.qualcomm.com?part=4