All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Mattijs Korpershoek" <mkorpershoek@kernel.org>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org,
	neil.armstrong@linaro.org, olteanv@gmail.com,
	linux-phy@lists.infradead.org, vkoul@kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: phy: Add sa8255p high-speed USB PHY
Date: Thu, 30 Jul 2026 14:06:05 +0000	[thread overview]
Message-ID: <20260730140606.08BEC1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260730-phy-qcom-snps-femto-v2-8255-v1-1-8b8bf5105a68@kernel.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing hardware-specific PHY tuning parameters for the Synopsys Femto High-Speed USB PHY V2.
--

--- Patch [1]: [PATCH 1/2] dt-bindings: phy: Add sa8255p high-speed USB PHY ---
commit 04bc91a6fe06261e099ae8fda1bb90e34d0f28fc
Author: Mattijs Korpershoek <mkorpershoek@kernel.org>

dt-bindings: phy: Add sa8255p high-speed USB PHY

This commit introduces a new device tree binding for the Qualcomm SA8255p 
Synopsys Femto High-Speed USB PHY V2. It specifies that the hardware uses 
SCMI power domains to manage resources like clocks, interconnects, and 
resets, rather than defining them individually.

> diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml
> new file mode 100644
> index 0000000000000..09f7ca6e7f727
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml

[ ... ]

> +required:
> +  - compatible
> +  - reg
> +  - "#phy-cells"
> +  - power-domains
> +  - power-domain-names
> +
> +additionalProperties: false

[Severity: Medium]
Since this IP block is still the Synopsys Femto High-Speed USB PHY V2, 
would board configurations for this platform still need to apply standard 
hardware tuning parameters (such as qcom,squelch-detector-bp)?

While clocks and resets are abstracted into SCMI power domains here, the 
memory-mapped reg space is still provided and typically used to program 
these signal characteristics. With additionalProperties set to false, 
schema validation will fail for any board device tree that attempts to 
override these valid PHY tuning properties.

Might it be necessary to include these tuning properties, perhaps by 
referencing a common schema, so that boards can safely tune squelch 
detection and pre-emphasis without triggering validation errors?

> +
> +examples:
> +  - |
> +    soc {

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260730-phy-qcom-snps-femto-v2-8255-v1-0-8b8bf5105a68@kernel.org?part=1

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Mattijs Korpershoek" <mkorpershoek@kernel.org>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org,
	neil.armstrong@linaro.org, olteanv@gmail.com,
	linux-phy@lists.infradead.org, vkoul@kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: phy: Add sa8255p high-speed USB PHY
Date: Thu, 30 Jul 2026 14:06:05 +0000	[thread overview]
Message-ID: <20260730140606.08BEC1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260730-phy-qcom-snps-femto-v2-8255-v1-1-8b8bf5105a68@kernel.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing hardware-specific PHY tuning parameters for the Synopsys Femto High-Speed USB PHY V2.
--

--- Patch [1]: [PATCH 1/2] dt-bindings: phy: Add sa8255p high-speed USB PHY ---
commit 04bc91a6fe06261e099ae8fda1bb90e34d0f28fc
Author: Mattijs Korpershoek <mkorpershoek@kernel.org>

dt-bindings: phy: Add sa8255p high-speed USB PHY

This commit introduces a new device tree binding for the Qualcomm SA8255p 
Synopsys Femto High-Speed USB PHY V2. It specifies that the hardware uses 
SCMI power domains to manage resources like clocks, interconnects, and 
resets, rather than defining them individually.

> diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml
> new file mode 100644
> index 0000000000000..09f7ca6e7f727
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,sa8255p-usb-hs-phy.yaml

[ ... ]

> +required:
> +  - compatible
> +  - reg
> +  - "#phy-cells"
> +  - power-domains
> +  - power-domain-names
> +
> +additionalProperties: false

[Severity: Medium]
Since this IP block is still the Synopsys Femto High-Speed USB PHY V2, 
would board configurations for this platform still need to apply standard 
hardware tuning parameters (such as qcom,squelch-detector-bp)?

While clocks and resets are abstracted into SCMI power domains here, the 
memory-mapped reg space is still provided and typically used to program 
these signal characteristics. With additionalProperties set to false, 
schema validation will fail for any board device tree that attempts to 
override these valid PHY tuning properties.

Might it be necessary to include these tuning properties, perhaps by 
referencing a common schema, so that boards can safely tune squelch 
detection and pre-emphasis without triggering validation errors?

> +
> +examples:
> +  - |
> +    soc {

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260730-phy-qcom-snps-femto-v2-8255-v1-0-8b8bf5105a68@kernel.org?part=1

  reply	other threads:[~2026-07-30 14:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-30 13:58 [PATCH 0/2] Add support for SA8255P in the phy-qcom-snps-femto-v2 phy driver Mattijs Korpershoek
2026-07-30 13:58 ` Mattijs Korpershoek
2026-07-30 13:58 ` [PATCH 1/2] dt-bindings: phy: Add sa8255p high-speed USB PHY Mattijs Korpershoek
2026-07-30 13:58   ` Mattijs Korpershoek
2026-07-30 14:06   ` sashiko-bot [this message]
2026-07-30 14:06     ` sashiko-bot
2026-07-30 14:13     ` Mattijs Korpershoek
2026-07-30 14:13       ` Mattijs Korpershoek
2026-07-30 13:58 ` [PATCH 2/2] phy: qcom-snps-femto-v2: Add support for SA8255P Mattijs Korpershoek
2026-07-30 13:58   ` Mattijs Korpershoek
2026-07-30 14:13   ` sashiko-bot
2026-07-30 14:13     ` sashiko-bot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260730140606.08BEC1F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=mkorpershoek@kernel.org \
    --cc=neil.armstrong@linaro.org \
    --cc=olteanv@gmail.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.