* [PATCH 1/4] drm/amdgpu: Reject UVD message with dimensions above 4096
@ 2026-07-30 17:02 David Rosca
2026-07-30 17:02 ` [PATCH 2/4] drm/amdgpu: Fix UVD dpb min size calculation for H264 David Rosca
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: David Rosca @ 2026-07-30 17:02 UTC (permalink / raw)
To: amd-gfx; +Cc: David Rosca
Fixes potential overflow in DPB size calculations.
Signed-off-by: David Rosca <david.rosca@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index e8b0c62f72be..63561d1d7963 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -655,8 +655,8 @@ static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg,
unsigned int image_size, tmp, min_dpb_size, num_dpb_buffer;
unsigned int min_ctx_size = ~0;
- /* Reject invalid dimensions to prevent division by zero */
- if (width < 16 || height < 16) {
+ /* Reject invalid dimensions */
+ if (width < 16 || height < 16 || width > 4096 || height > 4096) {
dev_WARN_ONCE(adev->dev, 1,
"Invalid UVD decoding dimensions (%dx%d)!\n",
width, height);
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/4] drm/amdgpu: Fix UVD dpb min size calculation for H264
2026-07-30 17:02 [PATCH 1/4] drm/amdgpu: Reject UVD message with dimensions above 4096 David Rosca
@ 2026-07-30 17:02 ` David Rosca
2026-07-30 17:02 ` [PATCH 3/4] drm/amdgpu: Fix UVD decode image min size calculation David Rosca
2026-07-30 17:02 ` [PATCH 4/4] drm/amdgpu: Fix UVD min buffer sizes David Rosca
2 siblings, 0 replies; 5+ messages in thread
From: David Rosca @ 2026-07-30 17:02 UTC (permalink / raw)
To: amd-gfx; +Cc: David Rosca
This should use actual number of references from the decode
message, instead of maximum derived from level.
Signed-off-by: David Rosca <david.rosca@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 62 ++-----------------------
1 file changed, 4 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 63561d1d7963..fa899e321f48 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -646,11 +646,9 @@ static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg,
unsigned int height = msg[7];
unsigned int dpb_size = msg[9];
unsigned int pitch = msg[28];
- unsigned int level = msg[57];
unsigned int width_in_mb = width / 16;
unsigned int height_in_mb = ALIGN(height / 16, 2);
- unsigned int fs_in_mb = width_in_mb * height_in_mb;
unsigned int image_size, tmp, min_dpb_size, num_dpb_buffer;
unsigned int min_ctx_size = ~0;
@@ -669,35 +667,9 @@ static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg,
switch (stream_type) {
case 0: /* H264 */
- switch (level) {
- case 30:
- num_dpb_buffer = 8100 / fs_in_mb;
- break;
- case 31:
- num_dpb_buffer = 18000 / fs_in_mb;
- break;
- case 32:
- num_dpb_buffer = 20480 / fs_in_mb;
- break;
- case 41:
- num_dpb_buffer = 32768 / fs_in_mb;
- break;
- case 42:
- num_dpb_buffer = 34816 / fs_in_mb;
- break;
- case 50:
- num_dpb_buffer = 110400 / fs_in_mb;
- break;
- case 51:
- num_dpb_buffer = 184320 / fs_in_mb;
- break;
- default:
- num_dpb_buffer = 184320 / fs_in_mb;
- break;
- }
- num_dpb_buffer++;
+ num_dpb_buffer = ((msg[61] >> 16) & 0xff) + 1;
if (num_dpb_buffer > 17)
- num_dpb_buffer = 17;
+ return -EINVAL;
/* reference picture buffer */
min_dpb_size = image_size * num_dpb_buffer;
@@ -747,35 +719,9 @@ static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg,
break;
case 7: /* H264 Perf */
- switch (level) {
- case 30:
- num_dpb_buffer = 8100 / fs_in_mb;
- break;
- case 31:
- num_dpb_buffer = 18000 / fs_in_mb;
- break;
- case 32:
- num_dpb_buffer = 20480 / fs_in_mb;
- break;
- case 41:
- num_dpb_buffer = 32768 / fs_in_mb;
- break;
- case 42:
- num_dpb_buffer = 34816 / fs_in_mb;
- break;
- case 50:
- num_dpb_buffer = 110400 / fs_in_mb;
- break;
- case 51:
- num_dpb_buffer = 184320 / fs_in_mb;
- break;
- default:
- num_dpb_buffer = 184320 / fs_in_mb;
- break;
- }
- num_dpb_buffer++;
+ num_dpb_buffer = ((msg[61] >> 16) & 0xff) + 1;
if (num_dpb_buffer > 17)
- num_dpb_buffer = 17;
+ return -EINVAL;
/* reference picture buffer */
min_dpb_size = image_size * num_dpb_buffer;
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/4] drm/amdgpu: Fix UVD decode image min size calculation
2026-07-30 17:02 [PATCH 1/4] drm/amdgpu: Reject UVD message with dimensions above 4096 David Rosca
2026-07-30 17:02 ` [PATCH 2/4] drm/amdgpu: Fix UVD dpb min size calculation for H264 David Rosca
@ 2026-07-30 17:02 ` David Rosca
2026-07-30 17:02 ` [PATCH 4/4] drm/amdgpu: Fix UVD min buffer sizes David Rosca
2 siblings, 0 replies; 5+ messages in thread
From: David Rosca @ 2026-07-30 17:02 UTC (permalink / raw)
To: amd-gfx; +Cc: David Rosca
This needs to use pitch instead of width. Also reject pitch
over 4096 to avoid overflow.
Signed-off-by: David Rosca <david.rosca@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index fa899e321f48..947a6cd45881 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -759,7 +759,7 @@ static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg,
return -EINVAL;
}
- if (width > pitch) {
+ if (width > pitch || pitch > 4096) {
DRM_ERROR("Invalid UVD decoding target pitch!\n");
return -EINVAL;
}
@@ -771,7 +771,7 @@ static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg,
}
buf_sizes[0x1] = dpb_size;
- buf_sizes[0x2] = image_size;
+ buf_sizes[0x2] = (pitch * height) * 3 / 2;
buf_sizes[0x4] = min_ctx_size;
/* store image width to adjust nb memory pstate */
adev->uvd.decode_image_width = width;
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 4/4] drm/amdgpu: Fix UVD min buffer sizes
2026-07-30 17:02 [PATCH 1/4] drm/amdgpu: Reject UVD message with dimensions above 4096 David Rosca
2026-07-30 17:02 ` [PATCH 2/4] drm/amdgpu: Fix UVD dpb min size calculation for H264 David Rosca
2026-07-30 17:02 ` [PATCH 3/4] drm/amdgpu: Fix UVD decode image min size calculation David Rosca
@ 2026-07-30 17:02 ` David Rosca
2026-08-05 14:57 ` Liu, Leo
2 siblings, 1 reply; 5+ messages in thread
From: David Rosca @ 2026-07-30 17:02 UTC (permalink / raw)
To: amd-gfx; +Cc: David Rosca
Use correct size for message buffer = sizeof(struct ruvd_msg).
Add ITSCALING_TABLE_BUFFER size.
Signed-off-by: David Rosca <david.rosca@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 947a6cd45881..e2d0f23d48aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -918,15 +918,16 @@ static int amdgpu_uvd_cs_pass2(struct amdgpu_uvd_cs_ctx *ctx)
ctx->buf_sizes[cmd]);
return -EINVAL;
}
+ } else if (cmd == 0x204 || cmd == 0x206) {
+ unsigned int min_size = ctx->buf_sizes[cmd == 0x204 ? 5 : 4];
- } else if (cmd == 0x206) {
- if ((end - start) < ctx->buf_sizes[4]) {
+ if ((end - start) < min_size) {
DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd,
(unsigned int)(end - start),
- ctx->buf_sizes[4]);
+ min_size);
return -EINVAL;
}
- } else if ((cmd != 0x100) && (cmd != 0x204)) {
+ } else if ((cmd != 0x100)) {
DRM_ERROR("invalid UVD command %X!\n", cmd);
return -EINVAL;
}
@@ -1056,11 +1057,12 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser,
{
struct amdgpu_uvd_cs_ctx ctx = {};
unsigned int buf_sizes[] = {
- [0x00000000] = 2048,
+ [0x00000000] = 3556,
[0x00000001] = 0xFFFFFFFF,
[0x00000002] = 0xFFFFFFFF,
[0x00000003] = 2048,
[0x00000004] = 0xFFFFFFFF,
+ [0x00000005] = 992,
};
int r;
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* RE: [PATCH 4/4] drm/amdgpu: Fix UVD min buffer sizes
2026-07-30 17:02 ` [PATCH 4/4] drm/amdgpu: Fix UVD min buffer sizes David Rosca
@ 2026-08-05 14:57 ` Liu, Leo
0 siblings, 0 replies; 5+ messages in thread
From: Liu, Leo @ 2026-08-05 14:57 UTC (permalink / raw)
To: Rosca, David, amd-gfx@lists.freedesktop.org; +Cc: Rosca, David
AMD General
The series is:
Acked-by: Leo Liu <leo.liu@amd.com>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> David Rosca
> Sent: July 30, 2026 1:03 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Rosca, David <David.Rosca@amd.com>
> Subject: [PATCH 4/4] drm/amdgpu: Fix UVD min buffer sizes
>
> Use correct size for message buffer = sizeof(struct ruvd_msg).
> Add ITSCALING_TABLE_BUFFER size.
>
> Signed-off-by: David Rosca <david.rosca@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> index 947a6cd45881..e2d0f23d48aa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> @@ -918,15 +918,16 @@ static int amdgpu_uvd_cs_pass2(struct
> amdgpu_uvd_cs_ctx *ctx)
> ctx->buf_sizes[cmd]);
> return -EINVAL;
> }
> + } else if (cmd == 0x204 || cmd == 0x206) {
> + unsigned int min_size = ctx->buf_sizes[cmd == 0x204 ? 5 : 4];
>
> - } else if (cmd == 0x206) {
> - if ((end - start) < ctx->buf_sizes[4]) {
> + if ((end - start) < min_size) {
> DRM_ERROR("buffer (%d) to small (%d / %d)!\n",
> cmd,
> (unsigned int)(end - start),
> - ctx->buf_sizes[4]);
> + min_size);
> return -EINVAL;
> }
> - } else if ((cmd != 0x100) && (cmd != 0x204)) {
> + } else if ((cmd != 0x100)) {
> DRM_ERROR("invalid UVD command %X!\n", cmd);
> return -EINVAL;
> }
> @@ -1056,11 +1057,12 @@ int amdgpu_uvd_ring_parse_cs(struct
> amdgpu_cs_parser *parser,
> {
> struct amdgpu_uvd_cs_ctx ctx = {};
> unsigned int buf_sizes[] = {
> - [0x00000000] = 2048,
> + [0x00000000] = 3556,
> [0x00000001] = 0xFFFFFFFF,
> [0x00000002] = 0xFFFFFFFF,
> [0x00000003] = 2048,
> [0x00000004] = 0xFFFFFFFF,
> + [0x00000005] = 992,
> };
> int r;
>
> --
> 2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread
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Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2026-07-30 17:02 [PATCH 1/4] drm/amdgpu: Reject UVD message with dimensions above 4096 David Rosca
2026-07-30 17:02 ` [PATCH 2/4] drm/amdgpu: Fix UVD dpb min size calculation for H264 David Rosca
2026-07-30 17:02 ` [PATCH 3/4] drm/amdgpu: Fix UVD decode image min size calculation David Rosca
2026-07-30 17:02 ` [PATCH 4/4] drm/amdgpu: Fix UVD min buffer sizes David Rosca
2026-08-05 14:57 ` Liu, Leo
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