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From: Igor Paunovic <royalnet026@gmail.com>
To: Jiaxing Hu <gahing@gahingwoo.com>
Cc: Tomeu Vizoso <tomeu@tomeuvizoso.net>,
	Heiko Stuebner <heiko@sntech.de>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Igor Paunovic <royalnet026@gmail.com>
Subject: Re: [PATCH 2/2] accel/rocket: keep core slots stable across unbind and rebind
Date: Fri, 31 Jul 2026 08:57:44 +0200	[thread overview]
Message-ID: <20260731065744.12961-1-royalnet026@gmail.com> (raw)
In-Reply-To: <20260730113256.1418091-1-gahing@gahingwoo.com>

Hi Jiaxing,

Thanks - that is exactly the kind of hole a reviewer is for. You were
right on all three counts: the failure path left the slot marked live,
and the live-slot walk in rocket_job_open() could then write one entry
past its allocation.

v2 is out with all three addressed:
https://lore.kernel.org/dri-devel/20260731064933.12548-1-royalnet026@gmail.com/

I also exercised the path you described on RK3588 - a forced error
return in rocket_core_init() for core 2 with cores 0 and 1 bound: the
slot is released, the device comes up with the two remaining cores,
and inference passes bit-exact with only the two live cores'
interrupts firing.

Thanks again for the careful review,
Igor

WARNING: multiple messages have this Message-ID (diff)
From: Igor Paunovic <royalnet026@gmail.com>
To: Jiaxing Hu <gahing@gahingwoo.com>
Cc: Tomeu Vizoso <tomeu@tomeuvizoso.net>,
	Heiko Stuebner <heiko@sntech.de>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Igor Paunovic <royalnet026@gmail.com>
Subject: Re: [PATCH 2/2] accel/rocket: keep core slots stable across unbind and rebind
Date: Fri, 31 Jul 2026 08:57:44 +0200	[thread overview]
Message-ID: <20260731065744.12961-1-royalnet026@gmail.com> (raw)
In-Reply-To: <20260730113256.1418091-1-gahing@gahingwoo.com>

Hi Jiaxing,

Thanks - that is exactly the kind of hole a reviewer is for. You were
right on all three counts: the failure path left the slot marked live,
and the live-slot walk in rocket_job_open() could then write one entry
past its allocation.

v2 is out with all three addressed:
https://lore.kernel.org/dri-devel/20260731064933.12548-1-royalnet026@gmail.com/

I also exercised the path you described on RK3588 - a forced error
return in rocket_core_init() for core 2 with cores 0 and 1 bound: the
slot is released, the device comes up with the two remaining cores,
and inference passes bit-exact with only the two live cores'
interrupts firing.

Thanks again for the careful review,
Igor

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

  reply	other threads:[~2026-07-31  6:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-30  8:03 [PATCH 0/2] accel/rocket: fix shared-device lifecycle on probe failure and unbind Igor Paunovic
2026-07-30  8:03 ` Igor Paunovic
2026-07-30  8:03 ` [PATCH 1/2] accel/rocket: release the shared device's devres on teardown Igor Paunovic
2026-07-30  8:03   ` Igor Paunovic
2026-07-30  8:03 ` [PATCH 2/2] accel/rocket: keep core slots stable across unbind and rebind Igor Paunovic
2026-07-30  8:03   ` Igor Paunovic
2026-07-30 11:32   ` Jiaxing Hu
2026-07-30 11:32     ` Jiaxing Hu
2026-07-31  6:57     ` Igor Paunovic [this message]
2026-07-31  6:57       ` Igor Paunovic

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