Re: [PATCH v9 03/12] dt-bindings: clk: zte: Add zx297520v3 LSP clock and reset controller - sashiko-bot

From: sashiko-bot@kernel.org
To: "Stefan Dösinger" <stefandoesinger@gmail.com>
Cc: olteanv@gmail.com, linux-phy@lists.infradead.org,
	robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org,
	vkoul@kernel.org, mfd@lists.linux.dev, neil.armstrong@linaro.org,
	lee@kernel.org
Subject: Re: [PATCH v9 03/12] dt-bindings: clk: zte: Add zx297520v3 LSP clock and reset controller
Date: Sun, 02 Aug 2026 20:40:02 +0000	[thread overview]
Message-ID: <20260802204003.216441F00A3D@smtp.kernel.org> (raw)
In-Reply-To: <20260802-zx29clk-v9-3-d05530d85d28@gmail.com>

> The clock controller of the zx297520v3 Low Speed Peripherals is
> relatively clean. One register per device with gates, muxes and resets
> and for some devices a divider. There are even bits in the matrix
> controller to control propagation of clock lines down to LSP.
> 
> The clocks are sorted by register address and I am convinced that the
> device list is complete. There are, however, a few more registers that
> are likely extra dividers for TDM and I2S devices.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Stefan Dösinger <stefandoesinger@gmail.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260802-zx29clk-v9-0-d05530d85d28@gmail.com?part=3

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