[PATCH] riscv: KVM: Flush VS-stage stale entries

From: Guo Ren <guoren@kernel.org>
To: guoyaxing@bosc.ac.cn
Cc: alex@ghiti.fr, anup@brainfault.org, aou@eecs.berkeley.edu,
	atish.patra@linux.dev, kvm-riscv@lists.infradead.org,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, majiuyue@bosc.ac.cn,
	minachou@andestech.com, palmer@dabbelt.com, pjw@kernel.org,
	"Guo Ren (Alibaba DAMO Academy)" <guoren@kernel.org>
Subject: [PATCH] riscv: KVM: Flush VS-stage stale entries
Date: Mon,  3 Aug 2026 13:54:54 +0000	[thread overview]
Message-ID: <20260803135454.2726112-1-guoren@kernel.org> (raw)
In-Reply-To: <20260802050015.104795-1-guoyaxing@bosc.ac.cn>

From: "Guo Ren (Alibaba DAMO Academy)" <guoren@kernel.org>

When a vCPU migrates to a different host CPU, the new CPU may retain
stale VS-stage TLB entries (GVA → GPA) left by a previous run of the
same guest. Issue an HFENCE.VVMA (all ASIDs, all addresses) inside
kvm_riscv_mmu_update_hgatp() whenever the vCPU is loaded on a CPU
different from the one it last exited on.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
---
Does this patch solve your problem? I would prefer to issue a full
HFENCE.VVMA whenever a new VMID is installed on a pCPU.
---
 arch/riscv/include/asm/kvm_mmu.h | 2 +-
 arch/riscv/kvm/mmu.c             | 5 ++++-
 arch/riscv/kvm/vcpu.c            | 4 ++--
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/include/asm/kvm_mmu.h b/arch/riscv/include/asm/kvm_mmu.h
index 5439e76f0a96..f0c5d2d01052 100644
--- a/arch/riscv/include/asm/kvm_mmu.h
+++ b/arch/riscv/include/asm/kvm_mmu.h
@@ -16,6 +16,6 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot,
 		      struct kvm_gstage_mapping *out_map);
 int kvm_riscv_mmu_alloc_pgd(struct kvm *kvm);
 void kvm_riscv_mmu_free_pgd(struct kvm *kvm);
-void kvm_riscv_mmu_update_hgatp(struct kvm_vcpu *vcpu);
+void kvm_riscv_mmu_update_hgatp(struct kvm_vcpu *vcpu, int cpu);
 
 #endif
diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
index 082f9b261733..b76a90f5811a 100644
--- a/arch/riscv/kvm/mmu.c
+++ b/arch/riscv/kvm/mmu.c
@@ -705,7 +705,7 @@ void kvm_riscv_mmu_free_pgd(struct kvm *kvm)
 		free_pages((unsigned long)pgd, get_order(kvm_riscv_gstage_pgd_size));
 }
 
-void kvm_riscv_mmu_update_hgatp(struct kvm_vcpu *vcpu)
+void kvm_riscv_mmu_update_hgatp(struct kvm_vcpu *vcpu, int cpu)
 {
 	struct kvm_arch *ka = &vcpu->kvm->arch;
 	unsigned long hgatp = kvm_riscv_gstage_mode(ka->pgd_levels)
@@ -718,4 +718,7 @@ void kvm_riscv_mmu_update_hgatp(struct kvm_vcpu *vcpu)
 
 	if (!kvm_riscv_gstage_vmid_bits())
 		kvm_riscv_local_hfence_gvma_all();
+
+	if (vcpu->arch.last_exit_cpu != cpu)
+		asm volatile(HFENCE_VVMA(zero, zero) : : : "memory");
 }
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index cf6e231e76e2..9692f5f5a70a 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -593,7 +593,7 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 		csr_write(CSR_VSATP, csr->vsatp);
 	}
 
-	kvm_riscv_mmu_update_hgatp(vcpu);
+	kvm_riscv_mmu_update_hgatp(vcpu, cpu);
 
 	kvm_riscv_vcpu_aia_load(vcpu, cpu);
 
@@ -686,7 +686,7 @@ static int kvm_riscv_check_vcpu_requests(struct kvm_vcpu *vcpu)
 			kvm_riscv_reset_vcpu(vcpu, true);
 
 		if (kvm_check_request(KVM_REQ_UPDATE_HGATP, vcpu))
-			kvm_riscv_mmu_update_hgatp(vcpu);
+			kvm_riscv_mmu_update_hgatp(vcpu, vcpu->cpu);
 
 		if (kvm_check_request(KVM_REQ_FENCE_I, vcpu))
 			kvm_riscv_fence_i_process(vcpu);
-- 
2.43.0


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