* [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump
@ 2026-08-05 17:15 Matt Turner
2026-08-05 17:15 ` [PATCH 2/5] linux-user/mips: " Matt Turner
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Matt Turner @ 2026-08-05 17:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Matt Turner, Laurent Vivier, Helge Deller, Pierrick Bouvier
A guest core carried only the general-purpose registers, so a debugger
opening one reported every floating-point register as unavailable --
including the arguments of the function that crashed.
Implement HAVE_ELF_CORE_FPREGS for Alpha: define target_elf_fpregset_t
to match the kernel's layout ($f0-$f30 plus the control register in the
slot $f31 would occupy) and fill it from elf_core_copy_fpregs().
Checked with lldb on a core from a program that faults with live values
in $f16 and $f17: both read back correctly, as does the control register.
Signed-off-by: Matt Turner <mattst88@gmail.com>
---
linux-user/alpha/elfload.c | 10 ++++++++++
linux-user/alpha/target_elf.h | 11 +++++++++++
2 files changed, 21 insertions(+)
diff --git ./linux-user/alpha/elfload.c ./linux-user/alpha/elfload.c
index 7be9e466b6..c2517516ad 100644
--- ./linux-user/alpha/elfload.c
+++ ./linux-user/alpha/elfload.c
@@ -32,3 +32,13 @@ const char *get_elf_cpu_model(uint32_t eflags)
{
return "ev67";
}
+
+void elf_core_copy_fpregs(target_elf_fpregset_t *r, const CPUAlphaState *env)
+{
+ int i;
+
+ for (i = 0; i < 31; i++) {
+ r->fpr[i] = tswap64(env->fir[i]);
+ }
+ r->fpcr = tswap64(cpu_alpha_load_fpcr((CPUAlphaState *)env));
+}
diff --git ./linux-user/alpha/target_elf.h ./linux-user/alpha/target_elf.h
index dd90c6f783..5efe7f3174 100644
--- ./linux-user/alpha/target_elf.h
+++ ./linux-user/alpha/target_elf.h
@@ -19,6 +19,17 @@
* r0-r30 at indices 0-30, pc at 31, ps at 32.
* r31 (hardwired zero) is not stored; pc occupies index 31.
*/
+/*
+ * The floating-point note holds $f0 through $f30 and then the control
+ * register in the slot $f31 would occupy; $f31 reads as zero.
+ */
+#define HAVE_ELF_CORE_FPREGS 1
+
+typedef struct target_elf_fpregset_t {
+ uint64_t fpr[31]; /* $f0-$f30 */
+ uint64_t fpcr; /* the slot for $f31 */
+} target_elf_fpregset_t;
+
typedef struct target_elf_gregset_t {
abi_ulong regs[31]; /* integer registers r0-r30 [0..30] */
abi_ulong pc; /* program counter [31] */
--
2.54.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/5] linux-user/mips: write the floating-point registers to a core dump
2026-08-05 17:15 [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump Matt Turner
@ 2026-08-05 17:15 ` Matt Turner
2026-08-05 17:15 ` [PATCH 3/5] linux-user/hppa: " Matt Turner
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Matt Turner @ 2026-08-05 17:15 UTC (permalink / raw)
To: qemu-devel
Cc: Matt Turner, Laurent Vivier, Helge Deller, Pierrick Bouvier,
Philippe Mathieu-Daudé, Jiaxun Yang
Write an NT_FPREGSET note for MIPS and MIPS64, matching the kernel's
elf_fpregset_t layout (ELF_NFPREG = 33): fpr[0..31] hold f0-f31, and
fcsr occupies the low 32 bits of slot 32. The pad field rounds the
struct to 33 × 8 bytes = 264 bytes.
Signed-off-by: Matt Turner <mattst88@gmail.com>
---
linux-user/mips/elfload.c | 8 ++++++++
linux-user/mips/target_elf.h | 13 +++++++++++++
linux-user/mips64/target_elf.h | 13 +++++++++++++
3 files changed, 34 insertions(+)
diff --git ./linux-user/mips/elfload.c ./linux-user/mips/elfload.c
index ce2c4514f3..1d62ae0a4d 100644
--- ./linux-user/mips/elfload.c
+++ ./linux-user/mips/elfload.c
@@ -130,6 +130,14 @@ const char *get_elf_base_platform(CPUState *cs)
#undef MATCH_PLATFORM_INSN
+void elf_core_copy_fpregs(target_elf_fpregset_t *r, const CPUMIPSState *env)
+{
+ for (int i = 0; i < 32; i++) {
+ r->fpr[i] = tswap64(env->active_fpu.fpr[i].d);
+ }
+ r->fcsr = tswap32(env->active_fpu.fcr31);
+}
+
/* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
#ifndef TARGET_MIPS64
void elf_core_copy_regs(target_elf_gregset_t *r, const CPUMIPSState *env)
diff --git ./linux-user/mips/target_elf.h ./linux-user/mips/target_elf.h
index 157306f7a0..426f905d3a 100644
--- ./linux-user/mips/target_elf.h
+++ ./linux-user/mips/target_elf.h
@@ -26,4 +26,17 @@ typedef struct target_elf_gregset_t {
};
} target_elf_gregset_t;
+#define HAVE_ELF_CORE_FPREGS 1
+
+/*
+ * Matches the kernel's elf_fpregset_t (ELF_NFPREG = 33):
+ * fpr[0..31] hold f0-f31; fcsr occupies the low 32 bits of slot 32.
+ * pad rounds the struct to 33 × 8 bytes = 264 bytes.
+ */
+typedef struct target_elf_fpregset_t {
+ uint64_t fpr[32];
+ uint32_t fcsr;
+ uint32_t pad;
+} target_elf_fpregset_t;
+
#endif
diff --git ./linux-user/mips64/target_elf.h ./linux-user/mips64/target_elf.h
index 061471a0f1..efb5d97563 100644
--- ./linux-user/mips64/target_elf.h
+++ ./linux-user/mips64/target_elf.h
@@ -32,4 +32,17 @@ typedef struct target_elf_gregset_t {
};
} target_elf_gregset_t;
+#define HAVE_ELF_CORE_FPREGS 1
+
+/*
+ * Matches the kernel's elf_fpregset_t (ELF_NFPREG = 33):
+ * fpr[0..31] hold f0-f31; fcsr occupies the low 32 bits of slot 32.
+ * pad rounds the struct to 33 × 8 bytes = 264 bytes.
+ */
+typedef struct target_elf_fpregset_t {
+ uint64_t fpr[32];
+ uint32_t fcsr;
+ uint32_t pad;
+} target_elf_fpregset_t;
+
#endif
--
2.54.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/5] linux-user/hppa: write the floating-point registers to a core dump
2026-08-05 17:15 [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump Matt Turner
2026-08-05 17:15 ` [PATCH 2/5] linux-user/mips: " Matt Turner
@ 2026-08-05 17:15 ` Matt Turner
2026-08-05 17:15 ` [PATCH 4/5] linux-user/riscv: " Matt Turner
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Matt Turner @ 2026-08-05 17:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Matt Turner, Laurent Vivier, Helge Deller, Pierrick Bouvier
Write an NT_FPREGSET note for HPPA, matching the kernel's
elf_fpregset_t layout (ELF_NFPREG = 32): fr0-fr31 as 64-bit values.
Signed-off-by: Matt Turner <mattst88@gmail.com>
---
linux-user/hppa/elfload.c | 7 +++++++
linux-user/hppa/target_elf.h | 9 +++++++++
2 files changed, 16 insertions(+)
diff --git ./linux-user/hppa/elfload.c ./linux-user/hppa/elfload.c
index ff4301b2ed..dd5b0b380e 100644
--- ./linux-user/hppa/elfload.c
+++ ./linux-user/hppa/elfload.c
@@ -17,6 +17,13 @@ const char *get_elf_platform(CPUState *cs)
return "PARISC";
}
+void elf_core_copy_fpregs(target_elf_fpregset_t *r, const CPUArchState *env)
+{
+ for (int i = 0; i < 32; i++) {
+ r->fpr[i] = tswap64(env->fr[i]);
+ }
+}
+
void elf_core_copy_regs(target_elf_gregset_t *r, const CPUArchState *env)
{
int i;
diff --git ./linux-user/hppa/target_elf.h ./linux-user/hppa/target_elf.h
index 22547b1437..4357873aff 100644
--- ./linux-user/hppa/target_elf.h
+++ ./linux-user/hppa/target_elf.h
@@ -39,4 +39,13 @@ typedef struct target_elf_gregset_t {
#define STACK_ALIGNMENT 64
#define VDSO_HEADER "vdso.c.inc"
+#define HAVE_ELF_CORE_FPREGS 1
+
+/*
+ * Matches the kernel's elf_fpregset_t (ELF_NFPREG = 32): fr0-fr31.
+ */
+typedef struct target_elf_fpregset_t {
+ uint64_t fpr[32];
+} target_elf_fpregset_t;
+
#endif
--
2.54.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 4/5] linux-user/riscv: write the floating-point registers to a core dump
2026-08-05 17:15 [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump Matt Turner
2026-08-05 17:15 ` [PATCH 2/5] linux-user/mips: " Matt Turner
2026-08-05 17:15 ` [PATCH 3/5] linux-user/hppa: " Matt Turner
@ 2026-08-05 17:15 ` Matt Turner
2026-08-05 17:15 ` [PATCH 5/5] linux-user/sh4: " Matt Turner
2026-08-07 16:12 ` [PATCH 1/5] linux-user/alpha: " Helge Deller
4 siblings, 0 replies; 6+ messages in thread
From: Matt Turner @ 2026-08-05 17:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Matt Turner, Laurent Vivier, Helge Deller, Pierrick Bouvier
Write an NT_FPREGSET note for RISC-V, matching struct __riscv_d_ext_state
from uapi/asm/ptrace.h: f0-f31 as 64-bit values followed by fcsr.
Signed-off-by: Matt Turner <mattst88@gmail.com>
---
linux-user/riscv/elfload.c | 9 +++++++++
linux-user/riscv/target_elf.h | 11 +++++++++++
2 files changed, 20 insertions(+)
diff --git ./linux-user/riscv/elfload.c ./linux-user/riscv/elfload.c
index afe103a631..1bc8beacb1 100644
--- ./linux-user/riscv/elfload.c
+++ ./linux-user/riscv/elfload.c
@@ -11,6 +11,15 @@ const char *get_elf_cpu_model(uint32_t eflags)
return "max";
}
+void elf_core_copy_fpregs(target_elf_fpregset_t *r, const CPURISCVState *env)
+{
+ for (int i = 0; i < 32; i++) {
+ r->fpr[i] = tswap64(env->fpr[i]);
+ }
+ r->fcsr = tswap32(((uint32_t)env->frm << FSR_RD_SHIFT) |
+ (riscv_cpu_get_fflags((CPURISCVState *)env) << FSR_AEXC_SHIFT));
+}
+
void elf_core_copy_regs(target_elf_gregset_t *r, const CPURISCVState *env)
{
r->pc = tswapal(env->pc);
diff --git ./linux-user/riscv/target_elf.h ./linux-user/riscv/target_elf.h
index 859f726578..185b81a2db 100644
--- ./linux-user/riscv/target_elf.h
+++ ./linux-user/riscv/target_elf.h
@@ -27,4 +27,15 @@ typedef struct target_elf_gregset_t {
abi_ulong regs[31];
} target_elf_gregset_t;
+#define HAVE_ELF_CORE_FPREGS 1
+
+/*
+ * Matches struct __riscv_d_ext_state from uapi/asm/ptrace.h:
+ * f0-f31 as 64-bit values followed by fcsr.
+ */
+typedef struct target_elf_fpregset_t {
+ uint64_t fpr[32];
+ uint32_t fcsr;
+} target_elf_fpregset_t;
+
#endif
--
2.54.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 5/5] linux-user/sh4: write the floating-point registers to a core dump
2026-08-05 17:15 [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump Matt Turner
` (2 preceding siblings ...)
2026-08-05 17:15 ` [PATCH 4/5] linux-user/riscv: " Matt Turner
@ 2026-08-05 17:15 ` Matt Turner
2026-08-07 16:12 ` [PATCH 1/5] linux-user/alpha: " Helge Deller
4 siblings, 0 replies; 6+ messages in thread
From: Matt Turner @ 2026-08-05 17:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Matt Turner, Laurent Vivier, Helge Deller, Pierrick Bouvier
Write an NT_FPREGSET note for SH4, matching struct user_fpu_struct
from arch/sh/include/asm/user.h: fr0-fr15, xf0-xf15, fpscr, fpul.
Signed-off-by: Matt Turner <mattst88@gmail.com>
---
linux-user/sh4/elfload.c | 10 ++++++++++
linux-user/sh4/target_elf.h | 12 ++++++++++++
2 files changed, 22 insertions(+)
diff --git ./linux-user/sh4/elfload.c ./linux-user/sh4/elfload.c
index f03ce49e7d..41601626ca 100644
--- ./linux-user/sh4/elfload.c
+++ ./linux-user/sh4/elfload.c
@@ -52,6 +52,16 @@ abi_ulong get_elf_hwcap(CPUState *cs)
return hwcap;
}
+void elf_core_copy_fpregs(target_elf_fpregset_t *r, const CPUSH4State *env)
+{
+ for (int i = 0; i < 16; i++) {
+ r->fpregs[i] = tswap32(env->fregs[i]);
+ r->xfpregs[i] = tswap32(env->fregs[16 + i]);
+ }
+ r->fpscr = tswap32(env->fpscr);
+ r->fpul = tswap32(env->fpul);
+}
+
void elf_core_copy_regs(target_elf_gregset_t *r, const CPUSH4State *env)
{
for (int i = 0; i < 16; i++) {
diff --git ./linux-user/sh4/target_elf.h ./linux-user/sh4/target_elf.h
index 3fcb63d409..5923022036 100644
--- ./linux-user/sh4/target_elf.h
+++ ./linux-user/sh4/target_elf.h
@@ -25,4 +25,16 @@ typedef struct target_elf_gregset_t {
struct target_pt_regs pt;
} target_elf_gregset_t;
+#define HAVE_ELF_CORE_FPREGS 1
+
+/*
+ * Matches struct user_fpu_struct from arch/sh/include/asm/user.h.
+ */
+typedef struct target_elf_fpregset_t {
+ uint32_t fpregs[16];
+ uint32_t xfpregs[16];
+ uint32_t fpscr;
+ uint32_t fpul;
+} target_elf_fpregset_t;
+
#endif
--
2.54.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump
2026-08-05 17:15 [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump Matt Turner
` (3 preceding siblings ...)
2026-08-05 17:15 ` [PATCH 5/5] linux-user/sh4: " Matt Turner
@ 2026-08-07 16:12 ` Helge Deller
4 siblings, 0 replies; 6+ messages in thread
From: Helge Deller @ 2026-08-07 16:12 UTC (permalink / raw)
To: Matt Turner, qemu-devel; +Cc: Laurent Vivier, Pierrick Bouvier
On 8/5/26 19:15, Matt Turner wrote:
> A guest core carried only the general-purpose registers, so a debugger
> opening one reported every floating-point register as unavailable --
> including the arguments of the function that crashed.
>
> Implement HAVE_ELF_CORE_FPREGS for Alpha: define target_elf_fpregset_t
> to match the kernel's layout ($f0-$f30 plus the control register in the
> slot $f31 would occupy) and fill it from elf_core_copy_fpregs().
>
> Checked with lldb on a core from a program that faults with live values
> in $f16 and $f17: both read back correctly, as does the control register.
>
> Signed-off-by: Matt Turner <mattst88@gmail.com>
> ---
> linux-user/alpha/elfload.c | 10 ++++++++++
> linux-user/alpha/target_elf.h | 11 +++++++++++
> 2 files changed, 21 insertions(+)
For the whole series:
Reviewed-by: Helge Deller <deller@gmx.de>
series queued up for past qemu-v11.1
Thanks!
Helge
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2026-08-07 16:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2026-08-05 17:15 [PATCH 1/5] linux-user/alpha: write the floating-point registers to a core dump Matt Turner
2026-08-05 17:15 ` [PATCH 2/5] linux-user/mips: " Matt Turner
2026-08-05 17:15 ` [PATCH 3/5] linux-user/hppa: " Matt Turner
2026-08-05 17:15 ` [PATCH 4/5] linux-user/riscv: " Matt Turner
2026-08-05 17:15 ` [PATCH 5/5] linux-user/sh4: " Matt Turner
2026-08-07 16:12 ` [PATCH 1/5] linux-user/alpha: " Helge Deller
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