Re: [PATCH v3 3/4] arm64: dts: ti: k3-am62: Set MMC clock pins as OUTPUT

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [Medium] The patch incompletely applies a required hardware fix for AM62x SoCs. While it updates MMC clock pins to PIN_OUTPUT to comply with the AM62x TRM (RXACTIVE = 0) on TI evaluation boards and Beagle boards, it misses several third-party AM62x device trees (e.g., Toradex Verdin, PHYTEC phyCORE/phyBOARD, and TQ-Systems). This leaves these boards in violation of the SoC hardware specification, which requires the receiver to be disabled.
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--- Patch [3]: [PATCH v3 3/4] arm64: dts: ti: k3-am62: Set MMC clock pins as OUTPUT ---
commit 139fe185686919a76207d40e04e2f122da9dca42
Author: Judith Mendez <jm@ti.com>

arm64: dts: ti: k3-am62: Set MMC clock pins as OUTPUT

This commit updates the device trees for TI evaluation and Beagle boards
to configure MMC clock pins as OUTPUT-only. This complies with the AM62x
TRM requirement to keep the receiver disabled (RXACTIVE = 0).

> diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
> index dfd65c00f5b95..7fd508f4eddf1 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
> @@ -86,7 +86,7 @@ main_mmc0_pins_default: main-mmc0-default-pins {
>  		bootph-all;
>  		pinctrl-single,pins = <
>  			AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (V3) MMC0_CMD */
> -			AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (Y1) MMC0_CLK */
> +			AM62X_IOPAD(0x218, PIN_OUTPUT, 0) /* (Y1) MMC0_CLK */

[Severity: Medium]
This is a pre-existing issue, but this patch seems to miss several third-party
AM62x boards that also leave the MMC clock pins incorrectly configured as
PIN_INPUT.

Should these device trees also be updated to comply with the hardware
specification and prevent potential signal integrity issues?

For example, the Toradex Verdin leaves MMC0_CLK configured with PIN_INPUT:

arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi:pinctrl_sdhci0() {
    ...
    AM62X_IOPAD(0x218, PIN_INPUT,        0) /* (AB1) MMC0_CLK  */
    ...
}

The PHYTEC phyCORE and phyBOARD-Lyra boards use PIN_INPUT_PULLDOWN:

arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi:main_mmc0_pins_default() {
    ...
    AM62X_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB1) MMC0_CLK */
    ...
}

arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi:main_mmc1_pins_default() {
    ...
    AM62X_IOPAD(0x234, PIN_INPUT_PULLDOWN, 0) /* (B22) MMC1_CLK */
    ...
}

The TQ-Systems boards also leave them configured with PIN_INPUT:

arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi:main_mmc0_pins() {
    ...
    AM62X_IOPAD(0x218, PIN_INPUT, 0)
    ...
}

arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts:main_mmc1_pins() {
    ...
    AM62X_IOPAD(0x234, PIN_INPUT, 0)
    ...
}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260805225438.464184-1-jm@ti.com?part=3