Re: [PATCH v3 5/5] riscv: dts: starfive: jhb100: Add JHB100 base DT

From: Conor Dooley <conor@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Emil Renner Berthing <kernel@esmil.dk>,
	Joel Stanley <jms@oss.tenstorrent.com>,
	Drew Fustini <dfustini@oss.tenstorrent.com>,
	Darshan Prajapati <darshan.prajapati@einfochips.com>,
	linux-riscv@lists.infradead.org, Rob Herring <robh@kernel.org>,
	Alexandre Ghiti <alex@ghiti.fr>, Anup Patel <anup@brainfault.org>,
	Guodong Xu <guodong@riscstar.com>, Yixun Lan <dlan@kernel.org>,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Albert Ou <aou@eecs.berkeley.edu>, E Shattow <e@freeshell.de>,
	Junhui Liu <junhui.liu@pigmoral.tech>,
	Daniel Lezcano <daniel.lezcano@kernel.org>,
	Michal Simek <michal.simek@amd.com>,
	Paul Walmsley <pjw@kernel.org>,
	linux-kernel@vger.kernel.org,
	Samuel Holland <samuel.holland@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Thomas Gleixner <tglx@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>
Subject: Re: [PATCH v3 5/5] riscv: dts: starfive: jhb100: Add JHB100 base DT
Date: Thu, 6 Aug 2026 17:49:44 +0100	[thread overview]
Message-ID: <20260806-staining-delay-2e2de73acf04@spud> (raw)
In-Reply-To: <20260806122553.182449-6-changhuang.liang@starfivetech.com>

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On Thu, Aug 06, 2026 at 05:25:53AM -0700, Changhuang Liang wrote:
> +
> +	clk_uart: clock-uart {
> +		compatible = "fixed-clock"; /* Initial clock handler for UART */
> +		#clock-cells = <0>;
> +		clock-frequency = <25000000>;
> +	};

I can pick this series up on a provisional basis for you to work on top
of, but I won't be sending a PR for anything that contains temporary
fixed clocks.

Cheers,
Conor.

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