[PATCH 13/24] drm/amd/display: Add opt-out for DCN6 OutstandingRequests mode-support check

[James Lin <PingLei.Lin@amd.com>]

From: Jun Lei <Jun.Lei@amd.com>

The OutstandingRequestsSupport check fails a mode when the
outstanding-request
buffer window (max_outstanding_reqs * request_size / (DCFCLK *
return_bus_width))
is shorter than the average urgent request latency. Because DCFCLK is
derived
from the SOP's bandwidth, a higher-bandwidth SOP raises DCFCLK, shrinks
that
window, and perversely makes the mode unsupported - so "too much bandwidth"
becomes a failure reason, which defies common sense.

When the ROB size / request limit is not yet fixed, the
SOP bandwidth/latency values are tuned to a family maximum and the check
mis-fires. Add a per-display-config override
outstanding_requests_check_disable
(overrides.hw, matching the existing *_check_disable idiom) that early-outs
the
dcn6 check with both flags left supported. Default off, so existing
behavior is
unchanged. Also wire the flag through the DML JSON translation.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Signed-off-by: James Lin <pinglei.lin@amd.com>
---
 .../dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h        | 1 +
 .../src/dml2_core/dml2_core_dcn6_funcs_mode_support.c      | 7 +++++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h
index f402bb933f7d..27ffe7ed11c7 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h
@@ -487,6 +487,7 @@ struct dml2_display_cfg {
 			bool mode_support_check_disable;
 			bool mcache_admissibility_check_disable;
 			bool surface_viewport_size_check_disable;
+			bool outstanding_requests_check_disable;
 			double dlg_ref_clk_mhz;
 			double dispclk_mhz;
 			double dcfclk_mhz;
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c
index d83c7eea462b..cb3cff316b0e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c
@@ -2380,6 +2380,13 @@ static void dcn6_ms_check_average_latency_supports(
 	DML_LOG_FUNC_ENTER();
 	outputs->support.OutstandingRequestsSupport = true;
 	outputs->support.OutstandingRequestsUrgencyAvoidance = true;
+	/* An SOP being capable of high bandwidth drives DCFCLK up, which shrinks the outstanding-request
+	 * buffer window below the request latency and (perversely) fails this check. For analysis of future
+	 * SoCs the ROB size / request limit is not yet fixed, so allow the check to be opted out. */
+	if (display_cfg->overrides.hw.outstanding_requests_check_disable) {
+		DML_LOG_FUNC_EXIT();
+		return;
+	}
 	for (k = 0; k < display_cfg->num_planes; k++) {
 		outstanding_latency_us = soc_bb->max_outstanding_reqs
 				* inputs->support.request_size_bytes_luma[k]
-- 
2.43.0