* [PATCH 0/4] hw/nmi: Safer vCPU delivery
@ 2026-08-10 21:37 Philippe Mathieu-Daudé
2026-08-10 21:37 ` [PATCH 1/4] hw/nmi: Allow delivering to first available vCPU (not by index) Philippe Mathieu-Daudé
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-10 21:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard, Marc-André Lureau, qemu-s390x
Hi Marc-André,
I don't remember what I suggested particularly for
20260626-qemu-no-hmp-v2-7-8af31bc54c61@redhat.com,
but this series is what I had in mind back then.
If you find it worthy, please consider including it
in your "Make HMP optional" work.
Regard,
Phil.
Philippe Mathieu-Daudé (4):
hw/nmi: Allow delivering to first available vCPU (not by index)
hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery
hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler
hw/nmi: Remove unused @cpu_index and @errp arguments
include/hw/core/nmi.h | 10 +++++++++-
hw/core/nmi.c | 25 ++++++++++++++++++++++---
hw/hppa/machine.c | 4 ++--
hw/i386/x86.c | 5 ++---
hw/intc/m68k_irqc.c | 4 ++--
hw/ipmi/ipmi.c | 2 +-
hw/m68k/q800-glue.c | 4 ++--
hw/misc/macio/gpio.c | 4 ++--
hw/ppc/pnv.c | 7 +++----
hw/ppc/spapr.c | 4 ++--
hw/s390x/s390-virtio-ccw.c | 6 ++----
hw/watchdog/watchdog.c | 2 +-
12 files changed, 50 insertions(+), 27 deletions(-)
--
2.53.0
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/4] hw/nmi: Allow delivering to first available vCPU (not by index) 2026-08-10 21:37 [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé @ 2026-08-10 21:37 ` Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 2/4] hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery Philippe Mathieu-Daudé ` (3 subsequent siblings) 4 siblings, 0 replies; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-10 21:37 UTC (permalink / raw) To: qemu-devel; +Cc: Corey Minyard, Marc-André Lureau, qemu-s390x Allow callers to deliver on any vCPU (for example when the vCPU index is not known). Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- include/hw/core/nmi.h | 7 +++++++ hw/core/nmi.c | 5 +++++ hw/ipmi/ipmi.c | 2 +- hw/watchdog/watchdog.c | 2 +- 4 files changed, 14 insertions(+), 2 deletions(-) diff --git a/include/hw/core/nmi.h b/include/hw/core/nmi.h index fff41bebc69..6136290f4fe 100644 --- a/include/hw/core/nmi.h +++ b/include/hw/core/nmi.h @@ -40,6 +40,13 @@ struct NMIClass { void (*nmi_monitor_handler)(NMIState *n, int cpu_index, Error **errp); }; +/** + * nmi_monitor_handle: + * @cpu_index: Index of the CPU to deliver the NMI + * @errp: pointer to a NULL-initialized error object + * + * Note: cpu_index = -1 can be used to deliver to the first vCPU available. + */ void nmi_monitor_handle(int cpu_index, Error **errp); #endif /* NMI_H */ diff --git a/hw/core/nmi.c b/hw/core/nmi.c index 4b447e126ba..67213631c04 100644 --- a/hw/core/nmi.c +++ b/hw/core/nmi.c @@ -20,6 +20,7 @@ */ #include "qemu/osdep.h" +#include "hw/core/cpu.h" #include "hw/core/nmi.h" #include "qapi/error.h" #include "qemu/module.h" @@ -42,6 +43,10 @@ static int do_nmi(Object *o, void *opaque) NMIClass *nc = NMI_GET_CLASS(n); ns->handled = true; + if (ns->cpu_index == -1) { + /* Any vCPU is OK, take the first one */ + ns->cpu_index = first_cpu->cpu_index; + } nc->nmi_monitor_handler(n, ns->cpu_index, &ns->err); if (ns->err) { return -1; diff --git a/hw/ipmi/ipmi.c b/hw/ipmi/ipmi.c index 74818ff3cea..8c492271f90 100644 --- a/hw/ipmi/ipmi.c +++ b/hw/ipmi/ipmi.c @@ -60,7 +60,7 @@ static int ipmi_do_hw_op(IPMIInterface *s, enum ipmi_op op, int checkonly) return 0; } /* We don't care what CPU we use. */ - nmi_monitor_handle(0, NULL); + nmi_monitor_handle(-1, NULL); return 0; case IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP: diff --git a/hw/watchdog/watchdog.c b/hw/watchdog/watchdog.c index 0842fe373ae..0c1b94a62f3 100644 --- a/hw/watchdog/watchdog.c +++ b/hw/watchdog/watchdog.c @@ -81,7 +81,7 @@ void watchdog_perform_action(void) case WATCHDOG_ACTION_INJECT_NMI: qapi_event_send_watchdog(WATCHDOG_ACTION_INJECT_NMI); - nmi_monitor_handle(0, NULL); + nmi_monitor_handle(-1, NULL); break; default: -- 2.53.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/4] hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery 2026-08-10 21:37 [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 1/4] hw/nmi: Allow delivering to first available vCPU (not by index) Philippe Mathieu-Daudé @ 2026-08-10 21:37 ` Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 3/4] hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler Philippe Mathieu-Daudé ` (2 subsequent siblings) 4 siblings, 0 replies; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-10 21:37 UTC (permalink / raw) To: qemu-devel; +Cc: Corey Minyard, Marc-André Lureau, qemu-s390x No need to have handlers check for existing CPU index, lookup the CPUState once in the core do_nmi() code and pass along. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- include/hw/core/nmi.h | 1 + hw/core/nmi.c | 29 +++++++++++++++++++++++------ 2 files changed, 24 insertions(+), 6 deletions(-) diff --git a/include/hw/core/nmi.h b/include/hw/core/nmi.h index 6136290f4fe..2f554d58b7f 100644 --- a/include/hw/core/nmi.h +++ b/include/hw/core/nmi.h @@ -38,6 +38,7 @@ struct NMIClass { InterfaceClass parent_class; void (*nmi_monitor_handler)(NMIState *n, int cpu_index, Error **errp); + void (*nmi_cpu_handler)(NMIState *ns, CPUState *cs); }; /** diff --git a/hw/core/nmi.c b/hw/core/nmi.c index 67213631c04..fb623fd00be 100644 --- a/hw/core/nmi.c +++ b/hw/core/nmi.c @@ -43,13 +43,30 @@ static int do_nmi(Object *o, void *opaque) NMIClass *nc = NMI_GET_CLASS(n); ns->handled = true; - if (ns->cpu_index == -1) { - /* Any vCPU is OK, take the first one */ - ns->cpu_index = first_cpu->cpu_index; + + /* Generic handler */ + if (nc->nmi_monitor_handler) { + nc->nmi_monitor_handler(n, ns->cpu_index, &ns->err); + if (ns->err) { + return -1; + } } - nc->nmi_monitor_handler(n, ns->cpu_index, &ns->err); - if (ns->err) { - return -1; + /* Per vCPU handler */ + if (nc->nmi_cpu_handler) { + CPUState *cs; + + if (ns->cpu_index >= 0) { + /* Specific vCPU requested */ + cs = qemu_get_cpu(ns->cpu_index); + } else { + /* Any vCPU is OK, take the first one */ + cs = first_cpu; + } + if (!cs) { + error_setg(&ns->err, "CPU %d does not exist", ns->cpu_index); + return -1; + } + nc->nmi_cpu_handler(n, cs); } } nmi_children(o, ns); -- 2.53.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/4] hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler 2026-08-10 21:37 [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 1/4] hw/nmi: Allow delivering to first available vCPU (not by index) Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 2/4] hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery Philippe Mathieu-Daudé @ 2026-08-10 21:37 ` Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 4/4] hw/nmi: Remove unused @cpu_index and @errp arguments Philippe Mathieu-Daudé 2026-08-11 8:44 ` [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé 4 siblings, 0 replies; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-10 21:37 UTC (permalink / raw) To: qemu-devel; +Cc: Corey Minyard, Marc-André Lureau, qemu-s390x NMIClass::nmi_cpu_handler() handler is safer because the CPUState argument has been checked to be valid. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- hw/s390x/s390-virtio-ccw.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 25a9fa49554..b71086c254a 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -725,10 +725,8 @@ static HotplugHandler *s390_get_hotplug_handler(MachineState *machine, return NULL; } -static void s390_nmi(NMIState *n, int cpu_index, Error **errp) +static void s390_nmi(NMIState *ns, CPUState *cs) { - CPUState *cs = qemu_get_cpu(cpu_index); - s390_cpu_restart(S390_CPU(cs)); } @@ -832,7 +830,7 @@ static void ccw_machine_class_init(ObjectClass *oc, const void *data) hc->plug = s390_machine_device_plug; hc->unplug_request = s390_machine_device_unplug_request; hc->unplug = s390_machine_device_unplug; - nc->nmi_monitor_handler = s390_nmi; + nc->nmi_cpu_handler = s390_nmi; mc->default_ram_id = "s390.ram"; mc->default_nic = "virtio-net-ccw"; dsi->qmp_dump_skeys = s390_qmp_dump_skeys; -- 2.53.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/4] hw/nmi: Remove unused @cpu_index and @errp arguments 2026-08-10 21:37 [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé ` (2 preceding siblings ...) 2026-08-10 21:37 ` [PATCH 3/4] hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler Philippe Mathieu-Daudé @ 2026-08-10 21:37 ` Philippe Mathieu-Daudé 2026-08-11 8:44 ` [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé 4 siblings, 0 replies; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-10 21:37 UTC (permalink / raw) To: qemu-devel; +Cc: Corey Minyard, Marc-André Lureau, qemu-s390x NMI delivery never fails: remove the unused @errp argument. nmi_handler() neither use the @cpu_index argument, remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> --- include/hw/core/nmi.h | 2 +- hw/core/nmi.c | 7 ++----- hw/hppa/machine.c | 4 ++-- hw/i386/x86.c | 5 ++--- hw/intc/m68k_irqc.c | 4 ++-- hw/m68k/q800-glue.c | 4 ++-- hw/misc/macio/gpio.c | 4 ++-- hw/ppc/pnv.c | 7 +++---- hw/ppc/spapr.c | 4 ++-- 9 files changed, 18 insertions(+), 23 deletions(-) diff --git a/include/hw/core/nmi.h b/include/hw/core/nmi.h index 2f554d58b7f..476b5d02fa1 100644 --- a/include/hw/core/nmi.h +++ b/include/hw/core/nmi.h @@ -37,7 +37,7 @@ typedef struct NMIState NMIState; struct NMIClass { InterfaceClass parent_class; - void (*nmi_monitor_handler)(NMIState *n, int cpu_index, Error **errp); + void (*nmi_handler)(NMIState *ns); void (*nmi_cpu_handler)(NMIState *ns, CPUState *cs); }; diff --git a/hw/core/nmi.c b/hw/core/nmi.c index fb623fd00be..3f4ef5b2094 100644 --- a/hw/core/nmi.c +++ b/hw/core/nmi.c @@ -45,11 +45,8 @@ static int do_nmi(Object *o, void *opaque) ns->handled = true; /* Generic handler */ - if (nc->nmi_monitor_handler) { - nc->nmi_monitor_handler(n, ns->cpu_index, &ns->err); - if (ns->err) { - return -1; - } + if (nc->nmi_handler) { + nc->nmi_handler(n); } /* Per vCPU handler */ if (nc->nmi_cpu_handler) { diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index d762163ddf5..93874b5d5c9 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -829,7 +829,7 @@ static void hppa_machine_reset(MachineState *ms, ResetType type) cpu[0]->env.cmdline_or_bootorder = 'c'; } -static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) +static void hppa_nmi(NMIState *ns) { CPUState *cs; @@ -851,7 +851,7 @@ static void hppa_machine_common_class_init(ObjectClass *oc, const void *data) mc->default_ram_id = "hppa.ram"; mc->default_nic = "tulip"; - nc->nmi_monitor_handler = hppa_nmi; + nc->nmi_handler = hppa_nmi; } static void HP_B160L_machine_init_class_init(ObjectClass *oc, const void *data) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index dc7f0d56b01..201746945d5 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -147,9 +147,8 @@ static const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) return ms->possible_cpus; } -static void x86_nmi(NMIState *n, int cpu_index, Error **errp) +static void x86_nmi(NMIState *ns) { - /* cpu index isn't used */ CPUState *cs; CPU_FOREACH(cs) { @@ -389,7 +388,7 @@ static void x86_machine_class_init(ObjectClass *oc, const void *data) mc->get_default_cpu_node_id = x86_get_default_cpu_node_id; mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids; mc->kvm_type = x86_kvm_type; - nc->nmi_monitor_handler = x86_nmi; + nc->nmi_handler = x86_nmi; object_class_property_add(oc, X86_MACHINE_SMM, "OnOffAuto", x86_machine_get_smm, x86_machine_set_smm, diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index 68ddb5351be..5d4e5a10ab8 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -70,7 +70,7 @@ static void m68k_irqc_instance_init(Object *obj) qdev_init_gpio_in(DEVICE(obj), m68k_set_irq, M68K_IRQC_LEVEL_NUM); } -static void m68k_nmi(NMIState *n, int cpu_index, Error **errp) +static void m68k_nmi(NMIState *n) { m68k_set_irq(n, M68K_IRQC_LEVEL_7, 1); } @@ -97,7 +97,7 @@ static void m68k_irqc_class_init(ObjectClass *oc, const void *data) InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(oc); device_class_set_props(dc, m68k_irqc_properties); - nc->nmi_monitor_handler = m68k_nmi; + nc->nmi_handler = m68k_nmi; device_class_set_legacy_reset(dc, m68k_irqc_reset); dc->vmsd = &vmstate_m68k_irqc; ic->get_statistics = m68k_irqc_get_statistics; diff --git a/hw/m68k/q800-glue.c b/hw/m68k/q800-glue.c index ac9062c6488..6a9592182a4 100644 --- a/hw/m68k/q800-glue.c +++ b/hw/m68k/q800-glue.c @@ -159,7 +159,7 @@ static void glue_auxmode_set_irq(void *opaque, int irq, int level) s->auxmode = level; } -static void glue_nmi(NMIState *n, int cpu_index, Error **errp) +static void glue_nmi(NMIState *n) { GLUEState *s = GLUE(n); @@ -237,7 +237,7 @@ static void glue_class_init(ObjectClass *klass, const void *data) dc->vmsd = &vmstate_glue; device_class_set_props(dc, glue_properties); rc->phases.hold = glue_reset_hold; - nc->nmi_monitor_handler = glue_nmi; + nc->nmi_handler = glue_nmi; } static const TypeInfo glue_info_types[] = { diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c index 1a7c534d652..f6fce5b3532 100644 --- a/hw/misc/macio/gpio.c +++ b/hw/misc/macio/gpio.c @@ -188,7 +188,7 @@ static void macio_gpio_reset(DeviceState *dev) macio_set_gpio(s, 1, true); } -static void macio_gpio_nmi(NMIState *n, int cpu_index, Error **errp) +static void macio_gpio_nmi(NMIState *n) { macio_set_gpio(MACIO_GPIO(n), 9, true); macio_set_gpio(MACIO_GPIO(n), 9, false); @@ -201,7 +201,7 @@ static void macio_gpio_class_init(ObjectClass *oc, const void *data) device_class_set_legacy_reset(dc, macio_gpio_reset); dc->vmsd = &vmstate_macio_gpio; - nc->nmi_monitor_handler = macio_gpio_nmi; + nc->nmi_handler = macio_gpio_nmi; } static const TypeInfo macio_gpio_init_info = { diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index c0cb45dbfbc..817f2ed7ae4 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -3552,12 +3552,11 @@ static void pnv_cpu_do_nmi(PnvChip *chip, PowerPCCPU *cpu, void *opaque) async_run_on_cpu(CPU(cpu), pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_HOST_INT(0)); } -static void pnv_nmi(NMIState *n, int cpu_index, Error **errp) +static void pnv_nmi(NMIState *ns) { PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); - int i; - for (i = 0; i < pnv->num_chips; i++) { + for (int i = 0; i < pnv->num_chips; i++) { pnv_chip_foreach_cpu(pnv->chips[i], pnv_cpu_do_nmi, NULL); } } @@ -3583,7 +3582,7 @@ static void pnv_machine_class_init(ObjectClass *oc, const void *data) mc->default_ram_size = 1 * GiB; mc->default_ram_id = "pnv.ram"; ispc->print_info = pnv_pic_print_info; - nc->nmi_monitor_handler = pnv_nmi; + nc->nmi_handler = pnv_nmi; object_class_property_add_bool(oc, "hb-mode", pnv_machine_get_hb, pnv_machine_set_hb); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b79828b4e90..a2195796efe 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3550,7 +3550,7 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg) } } -static void spapr_nmi(NMIState *n, int cpu_index, Error **errp) +static void spapr_nmi(NMIState *ns) { CPUState *cs; @@ -4652,7 +4652,7 @@ static void spapr_machine_class_init(ObjectClass *oc, const void *data) mc->nvdimm_supported = true; smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED; fwc->get_dev_path = spapr_get_fw_dev_path; - nc->nmi_monitor_handler = spapr_nmi; + nc->nmi_handler = spapr_nmi; vhc->cpu_in_nested = spapr_cpu_in_nested; vhc->deliver_hv_excp = spapr_exit_nested; vhc->hypercall = emulate_spapr_hypercall; -- 2.53.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] hw/nmi: Safer vCPU delivery 2026-08-10 21:37 [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé ` (3 preceding siblings ...) 2026-08-10 21:37 ` [PATCH 4/4] hw/nmi: Remove unused @cpu_index and @errp arguments Philippe Mathieu-Daudé @ 2026-08-11 8:44 ` Philippe Mathieu-Daudé 2026-08-11 8:50 ` Philippe Mathieu-Daudé 4 siblings, 1 reply; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-11 8:44 UTC (permalink / raw) To: qemu-devel Cc: Corey Minyard, Marc-André Lureau, qemu-s390x, Markus Armbruster On 10/8/26 23:37, Philippe Mathieu-Daudé wrote: > Hi Marc-André, > > I don't remember what I suggested particularly for > 20260626-qemu-no-hmp-v2-7-8af31bc54c61@redhat.com, > but this series is what I had in mind back then. > > If you find it worthy, please consider including it > in your "Make HMP optional" work. Not well explained, this series disentangle HMP from the generic NMI class. > > Regard, > > Phil. > > Philippe Mathieu-Daudé (4): > hw/nmi: Allow delivering to first available vCPU (not by index) > hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery > hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler > hw/nmi: Remove unused @cpu_index and @errp arguments > > include/hw/core/nmi.h | 10 +++++++++- > hw/core/nmi.c | 25 ++++++++++++++++++++++--- > hw/hppa/machine.c | 4 ++-- > hw/i386/x86.c | 5 ++--- > hw/intc/m68k_irqc.c | 4 ++-- > hw/ipmi/ipmi.c | 2 +- > hw/m68k/q800-glue.c | 4 ++-- > hw/misc/macio/gpio.c | 4 ++-- > hw/ppc/pnv.c | 7 +++---- > hw/ppc/spapr.c | 4 ++-- > hw/s390x/s390-virtio-ccw.c | 6 ++---- > hw/watchdog/watchdog.c | 2 +- > 12 files changed, 50 insertions(+), 27 deletions(-) > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] hw/nmi: Safer vCPU delivery 2026-08-11 8:44 ` [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé @ 2026-08-11 8:50 ` Philippe Mathieu-Daudé 2026-08-11 9:36 ` Philippe Mathieu-Daudé 0 siblings, 1 reply; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-11 8:50 UTC (permalink / raw) To: qemu-devel Cc: Corey Minyard, Marc-André Lureau, qemu-s390x, Markus Armbruster On 11/8/26 10:44, Philippe Mathieu-Daudé wrote: > On 10/8/26 23:37, Philippe Mathieu-Daudé wrote: >> Hi Marc-André, >> >> I don't remember what I suggested particularly for >> 20260626-qemu-no-hmp-v2-7-8af31bc54c61@redhat.com, >> but this series is what I had in mind back then. >> >> If you find it worthy, please consider including it >> in your "Make HMP optional" work. > > Not well explained, this series disentangle HMP from > the generic NMI class. Oh no, one patch is missing! > >> >> Regard, >> >> Phil. >> >> Philippe Mathieu-Daudé (4): >> hw/nmi: Allow delivering to first available vCPU (not by index) >> hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery >> hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler >> hw/nmi: Remove unused @cpu_index and @errp arguments >> >> include/hw/core/nmi.h | 10 +++++++++- >> hw/core/nmi.c | 25 ++++++++++++++++++++++--- >> hw/hppa/machine.c | 4 ++-- >> hw/i386/x86.c | 5 ++--- >> hw/intc/m68k_irqc.c | 4 ++-- >> hw/ipmi/ipmi.c | 2 +- >> hw/m68k/q800-glue.c | 4 ++-- >> hw/misc/macio/gpio.c | 4 ++-- >> hw/ppc/pnv.c | 7 +++---- >> hw/ppc/spapr.c | 4 ++-- >> hw/s390x/s390-virtio-ccw.c | 6 ++---- >> hw/watchdog/watchdog.c | 2 +- >> 12 files changed, 50 insertions(+), 27 deletions(-) >> > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] hw/nmi: Safer vCPU delivery 2026-08-11 8:50 ` Philippe Mathieu-Daudé @ 2026-08-11 9:36 ` Philippe Mathieu-Daudé 2026-08-11 9:49 ` Daniel P. Berrangé 0 siblings, 1 reply; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-11 9:36 UTC (permalink / raw) To: qemu-devel Cc: Corey Minyard, Marc-André Lureau, qemu-s390x, Markus Armbruster On 11/8/26 10:50, Philippe Mathieu-Daudé wrote: > On 11/8/26 10:44, Philippe Mathieu-Daudé wrote: >> On 10/8/26 23:37, Philippe Mathieu-Daudé wrote: >>> Hi Marc-André, >>> >>> I don't remember what I suggested particularly for >>> 20260626-qemu-no-hmp-v2-7-8af31bc54c61@redhat.com, >>> but this series is what I had in mind back then. >>> >>> If you find it worthy, please consider including it >>> in your "Make HMP optional" work. >> >> Not well explained, this series disentangle HMP from >> the generic NMI class. Actually previous version is better: https://lore.kernel.org/qemu-devel/20240220150833.13674-1-philmd@linaro.org/ > > Oh no, one patch is missing! > >> >>> >>> Regard, >>> >>> Phil. >>> >>> Philippe Mathieu-Daudé (4): >>> hw/nmi: Allow delivering to first available vCPU (not by index) >>> hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery >>> hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler >>> hw/nmi: Remove unused @cpu_index and @errp arguments >>> >>> include/hw/core/nmi.h | 10 +++++++++- >>> hw/core/nmi.c | 25 ++++++++++++++++++++++--- >>> hw/hppa/machine.c | 4 ++-- >>> hw/i386/x86.c | 5 ++--- >>> hw/intc/m68k_irqc.c | 4 ++-- >>> hw/ipmi/ipmi.c | 2 +- >>> hw/m68k/q800-glue.c | 4 ++-- >>> hw/misc/macio/gpio.c | 4 ++-- >>> hw/ppc/pnv.c | 7 +++---- >>> hw/ppc/spapr.c | 4 ++-- >>> hw/s390x/s390-virtio-ccw.c | 6 ++---- >>> hw/watchdog/watchdog.c | 2 +- >>> 12 files changed, 50 insertions(+), 27 deletions(-) >>> >> >> > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] hw/nmi: Safer vCPU delivery 2026-08-11 9:36 ` Philippe Mathieu-Daudé @ 2026-08-11 9:49 ` Daniel P. Berrangé 2026-08-11 10:56 ` Philippe Mathieu-Daudé 0 siblings, 1 reply; 10+ messages in thread From: Daniel P. Berrangé @ 2026-08-11 9:49 UTC (permalink / raw) To: Philippe Mathieu-Daudé Cc: qemu-devel, Corey Minyard, Marc-André Lureau, qemu-s390x, Markus Armbruster On Tue, Aug 11, 2026 at 11:36:59AM +0200, Philippe Mathieu-Daudé wrote: > On 11/8/26 10:50, Philippe Mathieu-Daudé wrote: > > On 11/8/26 10:44, Philippe Mathieu-Daudé wrote: > > > On 10/8/26 23:37, Philippe Mathieu-Daudé wrote: > > > > Hi Marc-André, > > > > > > > > I don't remember what I suggested particularly for > > > > 20260626-qemu-no-hmp-v2-7-8af31bc54c61@redhat.com, > > > > but this series is what I had in mind back then. > > > > > > > > If you find it worthy, please consider including it > > > > in your "Make HMP optional" work. > > > > > > Not well explained, this series disentangle HMP from > > > the generic NMI class. > > Actually previous version is better: > https://lore.kernel.org/qemu-devel/20240220150833.13674-1-philmd@linaro.org/ Are you going to rebase & resend that ? The old thread has a lot of commentary that I don't think it is worth reviewing the old code again until updated. With regards, Daniel -- |: https://berrange.com ~~ https://hachyderm.io/@berrange :| |: https://libvirt.org ~~ https://entangle-photo.org :| |: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :| ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] hw/nmi: Safer vCPU delivery 2026-08-11 9:49 ` Daniel P. Berrangé @ 2026-08-11 10:56 ` Philippe Mathieu-Daudé 0 siblings, 0 replies; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2026-08-11 10:56 UTC (permalink / raw) To: Daniel P. Berrangé Cc: qemu-devel, Corey Minyard, Marc-André Lureau, qemu-s390x, Markus Armbruster On 11/8/26 11:49, Daniel P. Berrangé wrote: > On Tue, Aug 11, 2026 at 11:36:59AM +0200, Philippe Mathieu-Daudé wrote: >> On 11/8/26 10:50, Philippe Mathieu-Daudé wrote: >>> On 11/8/26 10:44, Philippe Mathieu-Daudé wrote: >>>> On 10/8/26 23:37, Philippe Mathieu-Daudé wrote: >>>>> Hi Marc-André, >>>>> >>>>> I don't remember what I suggested particularly for >>>>> 20260626-qemu-no-hmp-v2-7-8af31bc54c61@redhat.com, >>>>> but this series is what I had in mind back then. >>>>> >>>>> If you find it worthy, please consider including it >>>>> in your "Make HMP optional" work. >>>> >>>> Not well explained, this series disentangle HMP from >>>> the generic NMI class. >> >> Actually previous version is better: >> https://lore.kernel.org/qemu-devel/20240220150833.13674-1-philmd@linaro.org/ > > Are you going to rebase & resend that ? The old thread has a lot > of commentary that I don't think it is worth reviewing the old code > again until updated. Please discard this series. Old series rebased and reposted (addressing comments) as v3 here: https://lore.kernel.org/qemu-devel/20260811105425.7429-1-philmd@oss.qualcomm.com/ ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-08-11 10:56 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-08-10 21:37 [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 1/4] hw/nmi: Allow delivering to first available vCPU (not by index) Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 2/4] hw/nmi: Introduce nmi_cpu_handler() for vcpu-specific delivery Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 3/4] hw/s390x: Deliver per-vcpu NMI using nmi_cpu_handler Philippe Mathieu-Daudé 2026-08-10 21:37 ` [PATCH 4/4] hw/nmi: Remove unused @cpu_index and @errp arguments Philippe Mathieu-Daudé 2026-08-11 8:44 ` [PATCH 0/4] hw/nmi: Safer vCPU delivery Philippe Mathieu-Daudé 2026-08-11 8:50 ` Philippe Mathieu-Daudé 2026-08-11 9:36 ` Philippe Mathieu-Daudé 2026-08-11 9:49 ` Daniel P. Berrangé 2026-08-11 10:56 ` Philippe Mathieu-Daudé
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