[PATCH] arm64: dts: qcom: sm8150: describe download mode register

[PATCH] arm64: dts: qcom: sm8150: describe download mode register

[Robin Snyders via B4 Relay]

From: Robin Snyders <robin@snyders.xyz>

The SM8150 SCM node does not describe the TCSR download-mode register.
Without it, the SCM driver falls back to a firmware call and the
mode cookie may remain set across a warm reset, causing the next boot to
enter the Qualcomm crashdump transport.

Describe the TCSR window and point qcom,dload-mode at offset 0x13000,
matching the layout used by SM8250 and other related Qualcomm platforms.

On a OnePlus 7T Pro this changes software reboot from a reproducible
05c6:900e transition to six consecutive successful boots.

Signed-off-by: Robin Snyders <robin@snyders.xyz>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 94a3b02cb289..29cdef6b3ee2 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -610,6 +610,7 @@ cpu7_opp20: opp-2841600000 {
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8150", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			#reset-cells = <1>;
 		};
 	};
@@ -2176,6 +2177,11 @@ tcsr_mutex: hwlock@1f40000 {
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@1fc0000 {
+			compatible = "qcom,sm8150-tcsr", "syscon";
+			reg = <0x0 0x01fc0000 0x0 0x30000>;
+		};
+
 		tcsr_regs_1: syscon@1f60000 {
 			compatible = "qcom,sm8150-tcsr", "syscon";
 			reg = <0x0 0x01f60000 0x0 0x20000>;

---
base-commit: 3d08ff75a47a3e7e2ab45a3bcab6723b4d906422
change-id: 20260811-submit-sm8150-dload-38802bee77c9

Best regards,
-- 
Robin Snyders <robin@snyders.xyz>

[PATCH] arm64: dts: qcom: sm8150: describe download mode register

[Robin Snyders]

The SM8150 SCM node does not describe the TCSR download-mode register.
Without it, the SCM driver falls back to a firmware call and the
mode cookie may remain set across a warm reset, causing the next boot to
enter the Qualcomm crashdump transport.

Describe the TCSR window and point qcom,dload-mode at offset 0x13000,
matching the layout used by SM8250 and other related Qualcomm platforms.

On a OnePlus 7T Pro this changes software reboot from a reproducible
05c6:900e transition to six consecutive successful boots.

Signed-off-by: Robin Snyders <robin@snyders.xyz>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 94a3b02cb289..29cdef6b3ee2 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -610,6 +610,7 @@ cpu7_opp20: opp-2841600000 {
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8150", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			#reset-cells = <1>;
 		};
 	};
@@ -2176,6 +2177,11 @@ tcsr_mutex: hwlock@1f40000 {
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@1fc0000 {
+			compatible = "qcom,sm8150-tcsr", "syscon";
+			reg = <0x0 0x01fc0000 0x0 0x30000>;
+		};
+
 		tcsr_regs_1: syscon@1f60000 {
 			compatible = "qcom,sm8150-tcsr", "syscon";
 			reg = <0x0 0x01f60000 0x0 0x20000>;

---
base-commit: 3d08ff75a47a3e7e2ab45a3bcab6723b4d906422
change-id: 20260811-submit-sm8150-dload-38802bee77c9

Best regards,
-- 
Robin Snyders <robin@snyders.xyz>

Re: [PATCH] arm64: dts: qcom: sm8150: describe download mode register

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The newly added `tcsr: syscon@1fc0000` node is placed out of order relative to its unit-address.
--

--- Patch [1]: [PATCH] arm64: dts: qcom: sm8150: describe download mode register ---
commit 5aa322f38216f1125e002cbfb8d2789a24d59cef
Author: Robin Snyders <robin@snyders.xyz>

arm64: dts: qcom: sm8150: describe download mode register

This commit describes the TCSR download-mode register for the SM8150 SCM node.
It adds the TCSR window and configures the dload-mode property to prevent the
mode cookie from remaining set across warm resets and improperly entering
crashdump transport on the next boot.

> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 94a3b02cb2897..29cdef6b3ee27 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
[ ... ]
> @@ -2176,6 +2177,11 @@ tcsr_mutex: hwlock@1f40000 {
>  			#hwlock-cells = <1>;
>  		};
>  
> +		tcsr: syscon@1fc0000 {
> +			compatible = "qcom,sm8150-tcsr", "syscon";
> +			reg = <0x0 0x01fc0000 0x0 0x30000>;
> +		};
> +
>  		tcsr_regs_1: syscon@1f60000 {

[Severity: Low]
This isn't a bug, but should this node be sorted sequentially by its unit
address? 

The address 0x1fc0000 is greater than 0x1f60000, so it appears this new
node is placed out of order, which might trigger dtbs_check warnings for
Device Tree coding style violations.

>  			compatible = "qcom,sm8150-tcsr", "syscon";
>  			reg = <0x0 0x01f60000 0x0 0x20000>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260811-submit-sm8150-dload-v1-1-1a87eefe6c89@snyders.xyz?part=1