[PATCH 0/2] nvme: apple: add t8132 (M4) ANS2 NVMe support

[PATCH 0/2] nvme: apple: add t8132 (M4) ANS2 NVMe support

[Yureka Lilian]

This patch series adds dt-bindings and driver support for ANS2 NVMe on
the Apple t8132 (M4) SoC.

This variant uses a separate MMIO base for its NVMMU and requires the IO
queues to be registered using an additional MMIO write.  Otherwise it is
largerly the same as the ANS2 NVMe variants present on Apple M1-M3 SoCs.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
Yureka Lilian (2):
      dt-bindings: nvme: Add apple,t8132-nvme-ans2 compatible
      nvme: apple: add t8132 (M4) ANS2 NVMe support

 .../devicetree/bindings/nvme/apple,nvme-ans.yaml   | 77 ++++++++++++++--------
 drivers/nvme/host/apple.c                          | 41 ++++++++++--
 2 files changed, 84 insertions(+), 34 deletions(-)
---
base-commit: 2ee859ebf156157609f71060ae472711c8cbc326
change-id: 20260811-apple-nvme-t8132-31399d6f81aa
prerequisite-change-id: 20260806-b4-nvme-fwabi-000386148b21:v1
prerequisite-patch-id: 6a5b048dc5206a5a885a48101737a4ef714b3daa
prerequisite-patch-id: 51dcb523ea7e4d3695599db362e9d93c00a35c72
prerequisite-patch-id: 2f55dd6933c9a1b7078da3cbaae848ec920b542d
prerequisite-patch-id: cd3d7c56f3a943d199838e6b1214110aa8e47a72
prerequisite-patch-id: 7e3fc920a0336ef3946d970a2d5517eee49997e5
prerequisite-patch-id: 92f6d325b1f4118311fa3bb8a9a762cadab027f9

Best regards,
--  
Yureka Lilian <yureka@cyberchaos.dev>

[PATCH 1/2] dt-bindings: nvme: Add apple,t8132-nvme-ans2 compatible

[Yureka Lilian]

Add a new base compatible for the ANS2 NVMe on the Apple t8132 (M4) SoC,
which uses a separate MMIO base for its NVMMU.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 .../devicetree/bindings/nvme/apple,nvme-ans.yaml   | 77 ++++++++++++++--------
 1 file changed, 48 insertions(+), 29 deletions(-)

diff --git a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
index 4c0b1f90aff8..c8a41b268b9c 100644
--- a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
+++ b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
@@ -16,6 +16,7 @@ properties:
       - items:
           - const: apple,t6020-nvme-ans2
           - const: apple,t8103-nvme-ans2
+      - const: apple,t8132-nvme-ans2
       - items:
           - enum:
               # Do not add additional SoC to this list.
@@ -24,16 +25,6 @@ properties:
               - apple,t6000-nvme-ans2
           - const: apple,nvme-ans2
 
-  reg:
-    items:
-      - description: NVMe and NVMMU registers
-      - description: ANS2 co-processor control registers
-
-  reg-names:
-    items:
-      - const: nvme
-      - const: ans
-
   resets:
     maxItems: 1
 
@@ -68,25 +59,53 @@ properties:
 
       The SART address filter is documented in iommu/apple,sart.yaml.
 
-if:
-  properties:
-    compatible:
-      contains:
-        enum:
-          - apple,t6000-nvme-ans2
-          - apple,t6020-nvme-ans2
-then:
-  properties:
-    power-domains:
-      minItems: 3
-    power-domain-names:
-      minItems: 3
-else:
-  properties:
-    power-domains:
-      maxItems: 2
-    power-domain-names:
-      maxItems: 2
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: apple,t8132-nvme-ans2
+    then:
+      properties:
+        reg:
+          items:
+            - description: NVMMU registers
+            - description: NVMe registers
+            - description: ANS2 co-processor control registers
+        reg-names:
+          items:
+            - const: nvmmu
+            - const: nvme
+            - const: ans
+    else:
+      properties:
+        reg:
+          items:
+            - description: NVMe and NVMMU registers
+            - description: ANS2 co-processor control registers
+        reg-names:
+          items:
+            - const: nvme
+            - const: ans
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - apple,t6000-nvme-ans2
+              - apple,t6020-nvme-ans2
+    then:
+      properties:
+        power-domains:
+          minItems: 3
+        power-domain-names:
+          minItems: 3
+    else:
+      properties:
+        power-domains:
+          maxItems: 2
+        power-domain-names:
+          maxItems: 2
 
 required:
   - compatible

-- 
2.55.0

[PATCH 2/2] nvme: apple: add t8132 (M4) ANS2 NVMe support

[Yureka Lilian]

Add support for ANS2 NVMe on the Apple t8132 (M4) SoC.

This variant uses a separate MMIO base for its NVMMU and requires the IO
queues to be registered using an additional MMIO write.  Otherwise it is
largerly the same as the ANS2 NVMe variants present on Apple M1-M3 SoCs.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 drivers/nvme/host/apple.c | 41 ++++++++++++++++++++++++++++++++++++-----
 1 file changed, 36 insertions(+), 5 deletions(-)

diff --git a/drivers/nvme/host/apple.c b/drivers/nvme/host/apple.c
index bf1c32c66153..7529474d56f0 100644
--- a/drivers/nvme/host/apple.c
+++ b/drivers/nvme/host/apple.c
@@ -42,6 +42,8 @@
 #define APPLE_ANS_ACQ_DB  0x1004
 #define APPLE_ANS_IOCQ_DB 0x100c
 
+#define APPLE_ANS_IOQ_CMDS           0x1200
+#define APPLE_ANS_IOQ_CQES           0x1208
 #define APPLE_ANS_MAX_PEND_CMDS_CTRL 0x1210
 
 #define APPLE_ANS_BOOT_STATUS	 0x1300
@@ -167,6 +169,8 @@ struct apple_nvme_iod {
 
 struct apple_nvme_hw {
 	bool has_lsq_nvmmu;
+	bool need_ioq_register;
+	bool separate_nvmmu_region;
 	u32 max_queue_depth;
 };
 
@@ -175,6 +179,7 @@ struct apple_nvme {
 
 	void __iomem *mmio_coproc;
 	void __iomem *mmio_nvme;
+	void __iomem *mmio_nvmmu;
 	const struct apple_nvme_hw *hw;
 
 	struct device **pd_dev;
@@ -281,8 +286,8 @@ static void apple_nvmmu_inval(struct apple_nvme_queue *q, unsigned int tag)
 {
 	struct apple_nvme *anv = queue_to_apple_nvme(q);
 
-	writel(tag, anv->mmio_nvme + APPLE_NVMMU_TCB_INVAL);
-	if (readl(anv->mmio_nvme + APPLE_NVMMU_TCB_STAT))
+	writel(tag, anv->mmio_nvmmu + APPLE_NVMMU_TCB_INVAL);
+	if (readl(anv->mmio_nvmmu + APPLE_NVMMU_TCB_STAT))
 		dev_warn_ratelimited(anv->dev,
 				     "NVMMU TCB invalidation failed\n");
 }
@@ -1123,7 +1128,7 @@ static void apple_nvme_reset_work(struct work_struct *work)
 
 		/* Setup the NVMMU for the maximum admin and IO queue depth */
 		writel(anv->hw->max_queue_depth - 1,
-			anv->mmio_nvme + APPLE_NVMMU_NUM_TCBS);
+			anv->mmio_nvmmu + APPLE_NVMMU_NUM_TCBS);
 	}
 
 	/* Setup the admin queue */
@@ -1136,9 +1141,9 @@ static void apple_nvme_reset_work(struct work_struct *work)
 	if (anv->hw->has_lsq_nvmmu) {
 		/* Setup NVMMU for both queues */
 		writeq(anv->adminq.tcb_dma_addr,
-			anv->mmio_nvme + APPLE_NVMMU_ASQ_TCB_BASE);
+			anv->mmio_nvmmu + APPLE_NVMMU_ASQ_TCB_BASE);
 		writeq(anv->ioq.tcb_dma_addr,
-			anv->mmio_nvme + APPLE_NVMMU_IOSQ_TCB_BASE);
+			anv->mmio_nvmmu + APPLE_NVMMU_IOSQ_TCB_BASE);
 	}
 
 	anv->ctrl.sqsize =
@@ -1175,6 +1180,12 @@ static void apple_nvme_reset_work(struct work_struct *work)
 		goto out_remove_cq;
 
 	apple_nvme_init_queue(&anv->ioq);
+	if (anv->hw->need_ioq_register) {
+		writeq(anv->ioq.cq_dma_addr,
+			anv->mmio_nvme + APPLE_ANS_IOQ_CQES);
+		writeq(anv->ioq.sq_dma_addr,
+			anv->mmio_nvme + APPLE_ANS_IOQ_CMDS);
+	}
 	nr_io_queues = 1;
 	ret = nvme_set_queue_count(&anv->ctrl, &nr_io_queues);
 	if (ret)
@@ -1484,6 +1495,14 @@ static struct apple_nvme *apple_nvme_alloc(struct platform_device *pdev)
 		ret = PTR_ERR(anv->mmio_nvme);
 		goto put_dev;
 	}
+	if (anv->hw->separate_nvmmu_region) {
+		anv->mmio_nvmmu = devm_platform_ioremap_resource_byname(pdev, "nvmmu");
+		if (IS_ERR(anv->mmio_nvmmu)) {
+			ret = PTR_ERR(anv->mmio_nvmmu);
+			goto put_dev;
+		}
+	} else
+		anv->mmio_nvmmu = anv->mmio_nvme;
 
 	if (anv->hw->has_lsq_nvmmu) {
 		anv->adminq.sq_db = anv->mmio_nvme + APPLE_ANS_LINEAR_ASQ_DB;
@@ -1685,17 +1704,29 @@ static DEFINE_SIMPLE_DEV_PM_OPS(apple_nvme_pm_ops, apple_nvme_suspend,
 
 static const struct apple_nvme_hw apple_nvme_t8015_hw = {
 	.has_lsq_nvmmu = false,
+	.need_ioq_register = false,
+	.separate_nvmmu_region = false,
 	.max_queue_depth = 16,
 };
 
 static const struct apple_nvme_hw apple_nvme_t8103_hw = {
 	.has_lsq_nvmmu = true,
+	.need_ioq_register = false,
+	.separate_nvmmu_region = false,
+	.max_queue_depth = 64,
+};
+
+static const struct apple_nvme_hw apple_nvme_t8132_hw = {
+	.has_lsq_nvmmu = true,
+	.need_ioq_register = true,
+	.separate_nvmmu_region = true,
 	.max_queue_depth = 64,
 };
 
 static const struct of_device_id apple_nvme_of_match[] = {
 	{ .compatible = "apple,t8015-nvme-ans2", .data = &apple_nvme_t8015_hw },
 	{ .compatible = "apple,t8103-nvme-ans2", .data = &apple_nvme_t8103_hw },
+	{ .compatible = "apple,t8132-nvme-ans2", .data = &apple_nvme_t8132_hw },
 	{ .compatible = "apple,nvme-ans2", .data = &apple_nvme_t8103_hw },
 	{},
 };

-- 
2.55.0

Re: [PATCH 1/2] dt-bindings: nvme: Add apple,t8132-nvme-ans2 compatible

[Rob Herring (Arm)]

On Tue, 11 Aug 2026 22:49:47 +0200, Yureka Lilian wrote:
> Add a new base compatible for the ANS2 NVMe on the Apple t8132 (M4) SoC,
> which uses a separate MMIO base for its NVMMU.
> 
> Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
> ---
>  .../devicetree/bindings/nvme/apple,nvme-ans.yaml   | 77 ++++++++++++++--------
>  1 file changed, 48 insertions(+), 29 deletions(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/nvme/apple,nvme-ans.example.dtb: nvme@7bcc0000 (apple,t8103-nvme-ans2): 'reg', 'reg-names' do not match any of the regexes: '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml

doc reference errors (make refcheckdocs):

See https://patchwork.kernel.org/project/devicetree/patch/20260811-apple-nvme-t8132-v1-1-865be32e42c3@cyberchaos.dev

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH 1/2] dt-bindings: nvme: Add apple,t8132-nvme-ans2 compatible

[Rob Herring]

On Tue, Aug 11, 2026 at 10:49:47PM +0200, Yureka Lilian wrote:
> Add a new base compatible for the ANS2 NVMe on the Apple t8132 (M4) SoC,
> which uses a separate MMIO base for its NVMMU.
> 
> Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
> ---
>  .../devicetree/bindings/nvme/apple,nvme-ans.yaml   | 77 ++++++++++++++--------
>  1 file changed, 48 insertions(+), 29 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
> index 4c0b1f90aff8..c8a41b268b9c 100644
> --- a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
> +++ b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
> @@ -16,6 +16,7 @@ properties:
>        - items:
>            - const: apple,t6020-nvme-ans2
>            - const: apple,t8103-nvme-ans2
> +      - const: apple,t8132-nvme-ans2
>        - items:
>            - enum:
>                # Do not add additional SoC to this list.
> @@ -24,16 +25,6 @@ properties:
>                - apple,t6000-nvme-ans2
>            - const: apple,nvme-ans2
>  
> -  reg:
> -    items:
> -      - description: NVMe and NVMMU registers
> -      - description: ANS2 co-processor control registers
> -
> -  reg-names:
> -    items:
> -      - const: nvme
> -      - const: ans
> -

Keep properties defined at the top level. More below.

>    resets:
>      maxItems: 1
>  
> @@ -68,25 +59,53 @@ properties:
>  
>        The SART address filter is documented in iommu/apple,sart.yaml.
>  
> -if:
> -  properties:
> -    compatible:
> -      contains:
> -        enum:
> -          - apple,t6000-nvme-ans2
> -          - apple,t6020-nvme-ans2
> -then:
> -  properties:
> -    power-domains:
> -      minItems: 3
> -    power-domain-names:
> -      minItems: 3
> -else:
> -  properties:
> -    power-domains:
> -      maxItems: 2
> -    power-domain-names:
> -      maxItems: 2
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: apple,t8132-nvme-ans2
> +    then:
> +      properties:
> +        reg:
> +          items:
> +            - description: NVMMU registers
> +            - description: NVMe registers
> +            - description: ANS2 co-processor control registers
> +        reg-names:
> +          items:
> +            - const: nvmmu
> +            - const: nvme
> +            - const: ans

New entries go on the end. So nvmmu last and defined at the top level. 
Then this is just 'minItems: 3'

> +    else:
> +      properties:
> +        reg:
> +          items:
> +            - description: NVMe and NVMMU registers
> +            - description: ANS2 co-processor control registers
> +        reg-names:
> +          items:
> +            - const: nvme
> +            - const: ans

And 'maxItems: 2' on these 2.

Rob