From: Bin Meng <bin.meng@processmission.com>
To: QEMU <qemu-devel@nongnu.org>
Cc: Jean-Christophe Dubois <jcd@tribudubois.net>,
Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org
Subject: [PATCH 03/10] hw/arm: fsl-imx6ul: Map early firmware register placeholders
Date: Wed, 12 Aug 2026 09:36:06 +0800 [thread overview]
Message-ID: <20260812013619.2134092-4-bin.meng@processmission.com> (raw)
In-Reply-To: <20260812013619.2134092-1-bin.meng@processmission.com>
U-Boot configures the AIPS bus access controls and the i.MX6UL SNVS
low-power registers before its console is available. Its timer setup
also enables the system counter through the control window on AIPS2.
These blocks are not modeled yet. Map unimplemented regions at their
documented addresses so early firmware accesses complete without
falling through to unmapped memory.
Signed-off-by: Bin Meng <bin.meng@processmission.com>
---
hw/arm/fsl-imx6ul.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index d6f662efe4..74c1a30959 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -210,6 +210,21 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("a7mpcore-dap", FSL_IMX6UL_A7MPCORE_DAP_ADDR,
FSL_IMX6UL_A7MPCORE_DAP_SIZE);
+ /* AIPS bus configuration */
+ create_unimplemented_device("aips1-config", FSL_IMX6UL_AIPS1_CFG_ADDR,
+ FSL_IMX6UL_AIPS1_CFG_SIZE);
+ create_unimplemented_device("aips2-config", FSL_IMX6UL_AIPS2_CFG_ADDR,
+ FSL_IMX6UL_AIPS2_CFG_SIZE);
+
+ /* SNVS low-power general-purpose registers */
+ create_unimplemented_device("snvs-lp", FSL_IMX6UL_SNVS_LP_ADDR,
+ FSL_IMX6UL_SNVS_LP_SIZE);
+
+ /* System counter control */
+ create_unimplemented_device("sys-counter-control",
+ FSL_IMX6UL_SYS_CNT_CTRL_ADDR,
+ FSL_IMX6UL_SYS_CNT_CTRL_SIZE);
+
/*
* MMDC
*/
--
2.53.0
next prev parent reply other threads:[~2026-08-12 1:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-12 1:36 [PATCH 00/10] hw/arm: Enable U-Boot boot on MCIMX6UL-EVK Bin Meng
2026-08-12 1:36 ` [PATCH 01/10] hw/arm: fsl-imx6ul: Add SCU compatibility window Bin Meng
2026-08-12 1:36 ` [PATCH 02/10] hw/misc: imx6ul_ccm: Update PMU_MISC0 reset value Bin Meng
2026-08-12 1:36 ` Bin Meng [this message]
2026-08-12 1:36 ` [PATCH 04/10] hw/arm: fsl-imx6ul: Add a minimal MMDC geometry model Bin Meng
2026-08-12 1:36 ` [PATCH 05/10] hw/sd: sdhci: Use a QEMU-local no-busy IRQ quirk bit Bin Meng
2026-08-12 1:36 ` [PATCH 06/10] hw/sd: sdhci: Honor i.MX uSDHC vendor clock gates Bin Meng
2026-08-12 1:36 ` [PATCH 07/10] hw/sd: sdhci: Preserve uSDHC status enables for U-Boot Bin Meng
2026-08-12 1:36 ` [PATCH 08/10] hw/sd: sdhci: Skip SDMA boundary stops for i.MX uSDHC Bin Meng
2026-08-12 1:36 ` [PATCH 09/10] docs/system/arm: Document MCIMX6UL-EVK Buildroot boot Bin Meng
2026-08-12 1:36 ` [PATCH 10/10] tests/functional/arm: Add MCIMX6UL-EVK boot tests Bin Meng
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