From: Bin Meng <bin.meng@processmission.com>
To: QEMU <qemu-devel@nongnu.org>
Cc: "Bin Meng" <bmeng.cn@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@mailo.com>,
qemu-block@nongnu.org
Subject: [PATCH 05/10] hw/sd: sdhci: Use a QEMU-local no-busy IRQ quirk bit
Date: Wed, 12 Aug 2026 09:36:08 +0800 [thread overview]
Message-ID: <20260812013619.2134092-6-bin.meng@processmission.com> (raw)
In-Reply-To: <20260812013619.2134092-1-bin.meng@processmission.com>
SDHCI_QUIRK_NO_BUSY_IRQ was copied from Linux with its bit number
unchanged. The quirk mask is internal to QEMU: it is neither visible
to guests nor part of migration state. Mirroring Linux therefore
provides no compatibility benefit and constrains local allocations.
Move it to bit zero so QEMU can allocate SDHCI quirks sequentially in
its own namespace.
Signed-off-by: Bin Meng <bin.meng@processmission.com>
---
include/hw/sd/sdhci.h | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index a9da6203fc..8083379de3 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -109,11 +109,8 @@ typedef struct SDHCIState SDHCIState;
/*
* Controller does not provide transfer-complete interrupt when not
* busy.
- *
- * NOTE: This definition is taken out of Linux kernel and so the
- * original bit number is preserved
*/
-#define SDHCI_QUIRK_NO_BUSY_IRQ BIT(14)
+#define SDHCI_QUIRK_NO_BUSY_IRQ BIT(0)
#define TYPE_PCI_SDHCI "sdhci-pci"
DECLARE_INSTANCE_CHECKER(SDHCIState, PCI_SDHCI,
--
2.53.0
next prev parent reply other threads:[~2026-08-12 1:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-12 1:36 [PATCH 00/10] hw/arm: Enable U-Boot boot on MCIMX6UL-EVK Bin Meng
2026-08-12 1:36 ` [PATCH 01/10] hw/arm: fsl-imx6ul: Add SCU compatibility window Bin Meng
2026-08-12 1:36 ` [PATCH 02/10] hw/misc: imx6ul_ccm: Update PMU_MISC0 reset value Bin Meng
2026-08-12 1:36 ` [PATCH 03/10] hw/arm: fsl-imx6ul: Map early firmware register placeholders Bin Meng
2026-08-12 1:36 ` [PATCH 04/10] hw/arm: fsl-imx6ul: Add a minimal MMDC geometry model Bin Meng
2026-08-12 1:36 ` Bin Meng [this message]
2026-08-12 1:36 ` [PATCH 06/10] hw/sd: sdhci: Honor i.MX uSDHC vendor clock gates Bin Meng
2026-08-12 1:36 ` [PATCH 07/10] hw/sd: sdhci: Preserve uSDHC status enables for U-Boot Bin Meng
2026-08-12 1:36 ` [PATCH 08/10] hw/sd: sdhci: Skip SDMA boundary stops for i.MX uSDHC Bin Meng
2026-08-12 1:36 ` [PATCH 09/10] docs/system/arm: Document MCIMX6UL-EVK Buildroot boot Bin Meng
2026-08-12 1:36 ` [PATCH 10/10] tests/functional/arm: Add MCIMX6UL-EVK boot tests Bin Meng
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