From: sashiko-bot@kernel.org
To: "Pankaj Gupta (OSS)" <pankaj.gupta@oss.nxp.com>
Cc: conor+dt@kernel.org, Frank.Li@kernel.org, imx@lists.linux.dev,
devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH v36 3/7] firmware: imx: add driver for NXP EdgeLock Enclave
Date: Mon, 17 Aug 2026 08:48:17 +0000 [thread overview]
Message-ID: <20260817084817.DB1BE1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260817-imx-se-if-v36-3-45c42847bfd8@oss.nxp.com>
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] DMA Use-After-Free vulnerability in ele_get_info() when freeing a buffer after a command timeout.
- [High] Spurious failures and duplicate executions due to explicitly overwriting successful hardware transactions with -ERESTARTSYS.
- [High] Out-of-bounds read in se_if_rx_callback() due to trusting the firmware-provided header->size.
- [Medium] Permanent probe failure instead of returning -EPROBE_DEFER when the SRAM pool is not yet available.
--
--- Patch [3]: [PATCH v36 3/7] firmware: imx: add driver for NXP EdgeLock Enclave ---
commit ba0b4841b861b1ed1d3d0d02b5e6c1bb39bdf404
Author: Pankaj Gupta <pankaj.gupta@nxp.com>
Subject: firmware: imx: add driver for NXP EdgeLock Enclave
Add MU-based communication interface for secure enclave. NXP hardware IP(s)
for secure-enclaves like Edgelock Enclave(ELE), are embedded in the SoC to
support the features like HSM, SHE & V2X, using message based communication
interface.
diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele_base_msg.c
--- /dev/null
+++ b/drivers/firmware/imx/ele_base_msg.c
@@ -0,0 +1,282 @@
[ ... ]
> +static void ele_get_info_cleanup(struct se_if_priv *priv, u32 *buf, dma_addr_t d_addr,
> + size_t size)
> +{
> + if (priv->mem_pool)
> + gen_pool_free(priv->mem_pool, (unsigned long)buf, size);
[Severity: High]
If ele_msg_send_rcv() times out in ele_get_info(), does releasing this DMA
buffer back to the system allocator while the enclave is still programmed to
write to it cause kernel memory corruption when the delayed firmware
transaction eventually completes?
> + else
> + dma_free_coherent(priv->dev, size, buf, d_addr);
> +}
[ ... ]
diff --git a/drivers/firmware/imx/ele_common.c b/drivers/firmware/imx/ele_common.c
--- /dev/null
+++ b/drivers/firmware/imx/ele_common.c
@@ -0,0 +1,501 @@
[ ... ]
> +int ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, int tx_msg_sz,
> + void *rx_msg, int exp_rx_msg_sz)
> +{
[ ... ]
> + if (priv->waiting_rsp_clbk_hdl.signal_rcvd) {
> + /*
> + * Signal was deferred until the FW/kernel protocol resynchronized.
> + * On success report -ERESTARTSYS for the interrupted wait; the
> + * command is not re-sent. Keep real errors like -ETIMEDOUT.
> + */
> + if (err > 0)
> + err = -ERESTARTSYS;
[Severity: High]
Does explicitly overwriting a successful hardware response (err > 0) with
-ERESTARTSYS cause the VFS to restart the operation, leading to duplicate
executions of non-idempotent hardware commands and spurious failures in
kernel contexts like PM suspend?
> + priv->waiting_rsp_clbk_hdl.signal_rcvd = false;
> + dev_dbg(priv->dev, "Err[0x%x]:Interrupted by signal.", err);
> + }
[ ... ]
> +void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg)
> +{
[ ... ]
> + } else if (header->tag == priv->if_defs->rsp_tag) {
[ ... ]
> + se_clbk_hdl->rx_msg_sz = min(rx_msg_sz, exp_rx_msg_sz);
> + memcpy(se_clbk_hdl->rx_msg, msg, se_clbk_hdl->rx_msg_sz);
[Severity: High]
If the mailbox controller driver passes a pointer to a small local buffer
on the IRQ stack for msg, but the untrusted firmware-provided header->size
specifies a large size, does this memcpy() read out-of-bounds past the msg
pointer capacity?
> + complete(&se_clbk_hdl->done);
> + spin_unlock_irqrestore(&se_clbk_hdl->clbk_rx_lock, flags);
[ ... ]
diff --git a/drivers/firmware/imx/se_ctrl.c b/drivers/firmware/imx/se_ctrl.c
--- /dev/null
+++ b/drivers/firmware/imx/se_ctrl.c
@@ -0,0 +1,507 @@
[ ... ]
> +static int se_if_probe(struct platform_device *pdev)
> +{
[ ... ]
> + if (if_node->pool_name) {
> + priv->mem_pool = of_gen_pool_get(dev->of_node, if_node->pool_name, 0);
> + if (!priv->mem_pool)
> + return dev_err_probe(dev, -ENOMEM,
> + "Unable to get sram pool = %s.",
> + if_node->pool_name);
[Severity: Medium]
Should this return -EPROBE_DEFER instead of permanently failing with -ENOMEM
when the SRAM pool is not yet available during boot?
> + }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260817-imx-se-if-v36-0-45c42847bfd8@oss.nxp.com?part=3
next prev parent reply other threads:[~2026-08-17 8:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 14:05 [PATCH v36 0/7] firmware: imx: driver for NXP secure-enclave Pankaj Gupta via B4 Relay
2026-08-17 14:05 ` Pankaj Gupta (OSS)
2026-08-17 14:05 ` [PATCH v36 1/7] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta via B4 Relay
2026-08-17 14:05 ` Pankaj Gupta (OSS)
2026-08-17 8:39 ` sashiko-bot
2026-08-17 14:06 ` [PATCH v36 2/7] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta via B4 Relay
2026-08-17 14:06 ` Pankaj Gupta (OSS)
2026-08-17 14:06 ` [PATCH v36 3/7] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta via B4 Relay
2026-08-17 14:06 ` Pankaj Gupta (OSS)
2026-08-17 8:48 ` sashiko-bot [this message]
2026-08-17 14:06 ` [PATCH v36 4/7] firmware: imx: device context dedicated to priv Pankaj Gupta via B4 Relay
2026-08-17 14:06 ` Pankaj Gupta (OSS)
2026-08-17 14:06 ` [PATCH v36 5/7] firmware: imx: adds miscdev Pankaj Gupta via B4 Relay
2026-08-17 14:06 ` Pankaj Gupta (OSS)
2026-08-17 8:49 ` sashiko-bot
2026-08-17 14:06 ` [PATCH v36 6/7] arm64: dts: imx8ulp: add secure enclave node Pankaj Gupta via B4 Relay
2026-08-17 14:06 ` Pankaj Gupta (OSS)
2026-08-17 8:43 ` sashiko-bot
2026-08-17 14:06 ` [PATCH v36 7/7] arm64: dts: imx8ulp: add reserved memory for EdgeLock Enclave Pankaj Gupta via B4 Relay
2026-08-17 14:06 ` Pankaj Gupta (OSS)
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