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From: Rob Herring <robh@kernel.org>
To: Linus Walleij <linusw@kernel.org>
Cc: Changhuang Liang <changhuang.liang@starfivetech.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Paul Walmsley <pjw@kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Bartosz Golaszewski <brgl@kernel.org>
Subject: Re: [PATCH v5 03/21] dt-bindings: pinctrl: Add starfive,jhb100-sys0-pinctrl
Date: Mon, 17 Aug 2026 08:47:15 -0500	[thread overview]
Message-ID: <20260817134715.GA18207-robh@kernel.org> (raw)
In-Reply-To: <CAD++jL=Q38HwraN1NEOxLf_hE+k=3Q6JP+DUgQsThfYve0t0RA@mail.gmail.com>

On Mon, Aug 17, 2026 at 02:45:22PM +0200, Linus Walleij wrote:
> On Fri, Aug 14, 2026 at 1:22 PM Changhuang Liang
> <changhuang.liang@starfivetech.com> wrote:
> 
> > > You still did not explain the cells - neither in reply nor in commit - thus start
> > > with that. Why do you need it? Multiple controllers have groupped pins or
> > > GPIOs in registers, so explanation "every 32 GPIOs correspond to one register"
> > > tells me nothing. Why would that matter how many GPIOs is in one register?
> >
> > Since every 32 GPIOs correspond to one register, Linus suggested at the time that I could try using:
> > gpios = <&gpio [instance] offset flags>;
> > gpio-ranges = <&pinctrl [gpio_instance] gpio_offset pin_offset count>;
> >
> > The advantage of using this is that in a GPIO controller with more than 32 GPIOs, every 32 GPIOs
> > can be treated as one GPIO bank. This way, in the driver, converting pin_offset to gpio_offset does
> > not require a large number of /32 and %32 operations.
> >
> > the following is Linus's original suggestion at the time
> > https://lore.kernel.org/all/CAD++jL=tvDBWJHRGGJw4nnox_kcJKn5hwvwz9zxadMRedyvRhw@mail.gmail.com/
> 
> Just copy this explanation into the commit so it is clear why you
> need three cells for this.

"Can use gpiolib" is not really justification. Neither is avoiding a 
shift and/or mask. I suppose there's some h/w attribute here to justify 
it? 

Rob

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Linus Walleij <linusw@kernel.org>
Cc: Changhuang Liang <changhuang.liang@starfivetech.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Paul Walmsley <pjw@kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Bartosz Golaszewski <brgl@kernel.org>
Subject: Re: [PATCH v5 03/21] dt-bindings: pinctrl: Add starfive,jhb100-sys0-pinctrl
Date: Mon, 17 Aug 2026 08:47:15 -0500	[thread overview]
Message-ID: <20260817134715.GA18207-robh@kernel.org> (raw)
In-Reply-To: <CAD++jL=Q38HwraN1NEOxLf_hE+k=3Q6JP+DUgQsThfYve0t0RA@mail.gmail.com>

On Mon, Aug 17, 2026 at 02:45:22PM +0200, Linus Walleij wrote:
> On Fri, Aug 14, 2026 at 1:22 PM Changhuang Liang
> <changhuang.liang@starfivetech.com> wrote:
> 
> > > You still did not explain the cells - neither in reply nor in commit - thus start
> > > with that. Why do you need it? Multiple controllers have groupped pins or
> > > GPIOs in registers, so explanation "every 32 GPIOs correspond to one register"
> > > tells me nothing. Why would that matter how many GPIOs is in one register?
> >
> > Since every 32 GPIOs correspond to one register, Linus suggested at the time that I could try using:
> > gpios = <&gpio [instance] offset flags>;
> > gpio-ranges = <&pinctrl [gpio_instance] gpio_offset pin_offset count>;
> >
> > The advantage of using this is that in a GPIO controller with more than 32 GPIOs, every 32 GPIOs
> > can be treated as one GPIO bank. This way, in the driver, converting pin_offset to gpio_offset does
> > not require a large number of /32 and %32 operations.
> >
> > the following is Linus's original suggestion at the time
> > https://lore.kernel.org/all/CAD++jL=tvDBWJHRGGJw4nnox_kcJKn5hwvwz9zxadMRedyvRhw@mail.gmail.com/
> 
> Just copy this explanation into the commit so it is clear why you
> need three cells for this.

"Can use gpiolib" is not really justification. Neither is avoiding a 
shift and/or mask. I suppose there's some h/w attribute here to justify 
it? 

Rob

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  reply	other threads:[~2026-08-17 13:47 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-10  6:36 [PATCH v5 00/21] Add basic pinctrl drivers for JHB100 SoC Changhuang Liang
2026-08-10  6:36 ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 01/21] dt-bindings: pincfg-node: Add property 'input-debounce-ns' Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 02/21] pinctrl: pinconf-generic: " Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 03/21] dt-bindings: pinctrl: Add starfive,jhb100-sys0-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  9:51     ` Changhuang Liang
2026-08-10  9:51       ` Changhuang Liang
2026-08-10 14:40       ` Rob Herring
2026-08-10 14:40         ` Rob Herring
2026-08-11  3:09         ` Changhuang Liang
2026-08-11  3:09           ` Changhuang Liang
2026-08-14  1:46           ` Changhuang Liang
2026-08-14  1:46             ` Changhuang Liang
2026-08-14  6:47             ` Krzysztof Kozlowski
2026-08-14  6:47               ` Krzysztof Kozlowski
2026-08-14 11:22               ` Changhuang Liang
2026-08-14 11:22                 ` Changhuang Liang
2026-08-17 12:45                 ` Linus Walleij
2026-08-17 12:45                   ` Linus Walleij
2026-08-17 13:47                   ` Rob Herring [this message]
2026-08-17 13:47                     ` Rob Herring
2026-08-10  6:36 ` [PATCH v5 04/21] pinctrl: starfive: Add StarFive JHB100 sys0 controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 05/21] dt-bindings: pinctrl: Add starfive,jhb100-sys0h-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  6:36 ` [PATCH v5 06/21] pinctrl: starfive: Add StarFive JHB100 sys0h controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 07/21] dt-bindings: pinctrl: Add starfive,jhb100-sys1-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 08/21] pinctrl: starfive: Add StarFive JHB100 sys1 controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 09/21] dt-bindings: pinctrl: Add starfive,jhb100-sys2-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  6:36 ` [PATCH v5 10/21] pinctrl: starfive: Add StarFive JHB100 sys2 controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 11/21] dt-bindings: pinctrl: Add starfive,jhb100-per0-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  6:36 ` [PATCH v5 12/21] pinctrl: starfive: Add StarFive JHB100 per0 controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 13/21] dt-bindings: pinctrl: Add starfive,jhb100-per1-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  6:36 ` [PATCH v5 14/21] pinctrl: starfive: Add StarFive JHB100 per1 controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 15/21] dt-bindings: pinctrl: Add starfive,jhb100-per2-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  6:36 ` [PATCH v5 16/21] pinctrl: starfive: Add StarFive JHB100 per2 controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 17/21] dt-bindings: pinctrl: Add starfive,jhb100-per2pok-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  6:36 ` [PATCH v5 18/21] pinctrl: starfive: Add StarFive JHB100 per2pok controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 19/21] dt-bindings: pinctrl: Add starfive,jhb100-per3-pinctrl Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  8:18   ` Rob Herring (Arm)
2026-08-10  8:18     ` Rob Herring (Arm)
2026-08-10  6:36 ` [PATCH v5 20/21] pinctrl: starfive: Add StarFive JHB100 per3 controller driver Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-10  6:36 ` [PATCH v5 21/21] riscv: dts: starfive: jhb100: Add pinctrl nodes Changhuang Liang
2026-08-10  6:36   ` Changhuang Liang
2026-08-11  6:14 ` [PATCH v5 00/21] Add basic pinctrl drivers for JHB100 SoC Linus Walleij
2026-08-11  6:14   ` Linus Walleij

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