From: Junjie Cao <junjie.cao@intel.com>
To: Manish Honap <mhonap@nvidia.com>
Cc: alex@shazbot.org, ankita@nvidia.com, jic23@kernel.org,
dave.jiang@intel.com, alejandro.lucero-palau@amd.com,
smadhavan@nvidia.com, pierrick.bouvier@oss.qualcomm.com,
mst@redhat.com, imammedo@redhat.com, anisinha@redhat.com,
pbonzini@redhat.com, eric.auger@redhat.com,
peter.maydell@linaro.org, richard.henderson@linaro.org,
clg@redhat.com, cohuck@redhat.com, kjaju@nvidia.com,
vsethi@nvidia.com, zhiw@nvidia.com, qemu-devel@nongnu.org,
qemu-arm@nongnu.org
Subject: Re: [PATCH 10/10] hw/pci-host: Emit a _DSM on pxb-cxl to preserve firmware PCI config
Date: Tue, 18 Aug 2026 17:53:17 +0800 [thread overview]
Message-ID: <20260818095318.252248-1-junjie.cao@intel.com> (raw)
In-Reply-To: <20260813130623.2499506-11-mhonap@nvidia.com>
Hi Manish,
On Thu, 13 Aug 2026 18:36:23 +0530, Manish Honap wrote:
> -void build_cxl_osc_method(Aml *dev)
> +void acpi_dsdt_add_cxl_host_bridge_methods(Aml *dev, bool preserve_config)
> {
> aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> aml_append(dev, aml_name_decl("SUPC", aml_int(0)));
> aml_append(dev, aml_name_decl("CTRC", aml_int(0)));
> aml_append(dev, __build_cxl_osc_method());
> + aml_append(dev, build_pci_host_bridge_dsm_method(preserve_config));
This is the bios-tables refresh the cover lists as pending:
/x86_64/acpi/q35/cxl and /x86_64/acpi/q35/acpihmat-genericx both hit
the all_tables_match assertion with a DSDT mismatch, and the asl diff
is exactly this _DSM under the pxb-cxl device (12638 -> 12684 bytes on
the acpihmat-generic-x variant). The g_assert aborts the test binary,
so a full run only reports the first case.
With preserve_config=false the method advertises no functions and
returns a zero buffer for every function, so the x86 half of the
change is dead AML plus golden-table churn. Append the _DSM only when
preserve_config is set: the x86 tables stay untouched and the pending
refresh drops out. Otherwise the usual three-patch bios-tables update
needs to ride in this series.
aarch64/virt has no CXL golden files, so nothing catches the arm side
either way.
Many thanks,
Junjie
next prev parent reply other threads:[~2026-08-18 9:53 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-13 13:06 [PATCH 00/10] QEMU: CXL Type-2 device passthrough via vfio-pci mhonap
2026-08-13 13:06 ` [PATCH 01/10] linux-headers: Update vfio.h for CXL Type-2 passthrough mhonap
2026-08-13 13:06 ` [PATCH 02/10] hw/vfio/region: Add vfio_region_setup_with_ops() mhonap
2026-08-13 13:06 ` [PATCH 03/10] hw/vfio/pci: Detect a CXL Type-2 device and read its geometry mhonap
2026-08-13 13:06 ` [PATCH 04/10] hw/vfio/pci: Enforce the passthrough topology for a CXL device mhonap
2026-08-13 13:06 ` [PATCH 05/10] hw/vfio/pci: Back the CXL memory with a RAM-device region mhonap
2026-08-13 13:06 ` [PATCH 06/10] hw/vfio/pci: Bind a CXL device to its fixed memory window mhonap
2026-08-18 9:52 ` Junjie Cao
2026-08-20 15:55 ` Manish Honap
2026-08-13 13:06 ` [PATCH 07/10] hw/vfio/pci: Map the CXL memory on the guest decoder commit mhonap
2026-08-18 9:52 ` Junjie Cao
2026-08-20 15:56 ` Manish Honap
2026-08-13 13:06 ` [PATCH 08/10] docs/cxl: Document CXL Type-2 device passthrough mhonap
2026-08-13 13:06 ` [PATCH 09/10] hw/arm/smmu-common: Allow pxb-cxl as an SMMUv3 primary bus mhonap
2026-08-13 13:06 ` [PATCH 10/10] hw/pci-host: Emit a _DSM on pxb-cxl to preserve firmware PCI config mhonap
2026-08-18 9:53 ` Junjie Cao [this message]
2026-08-20 15:56 ` Manish Honap
2026-08-13 17:42 ` [PATCH 00/10] QEMU: CXL Type-2 device passthrough via vfio-pci Cédric Le Goater
2026-08-14 9:54 ` Manish Honap
2026-08-18 9:51 ` Junjie Cao
2026-08-20 15:55 ` Manish Honap
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