[PATCH 0/2] arm64: dts: imx8mp: fix USB Type-C CBTU02043 orientation switch handling

[PATCH 0/2] arm64: dts: imx8mp: fix USB Type-C CBTU02043 orientation switch handling

[Peng Fan (OSS)]

The NXP CBTU02043 crossbar switch on i.MX8MP boards is used solely for
USB Type-C orientation switching, not for SBU signal muxing. This series
fixes its handling on both the imx8mp-evk and imx8mp-ultra-mach-sbc
boards.

The CBTU02043 has two control pins:
- SEL (select): controls the crossbar orientation, directly driven by
  the ptn5110 TCPC via orientation-gpios.
- XSD (shutdown): active-low enable pin. Must be held LOW for normal
  operation. Directly connected to a GPIO without external pull
  resistors, so it must be explicitly driven low.

Patch 1 (imx8mp-evk): The existing DTS only had orientation-gpios on
the ptn5110 but did not drive the XSD pin, leaving the CBTU02043 in
high-Z shutdown state. Add a gpio-hog to hold XSD low, enabling the
crossbar switch.

Patch 2 (imx8mp-ultra-mach-sbc): The existing DTS incorrectly used
the gpio-sbu-mux driver for what is purely an orientation switch.
Additionally, the enable-gpios polarity was wrong (GPIO_ACTIVE_HIGH
instead of GPIO_ACTIVE_LOW for the active-low XSD pin). Replace the
gpio-sbu-mux node with orientation-gpios on ptn5110 plus a gpio-hog
for XSD.

I also give a look on i.MX8QXP/QM-MEK, but not easy to use
gpio-hog for the i2c gpio expander because there are potential
probe order issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Peng Fan (2):
      arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch
      arm64: dts: imx8mp-ultra-mach-sbc: fix CBTU02043 USB Type-C orientation switch

 arch/arm64/boot/dts/freescale/imx8mp-evk.dts       | 17 ++++++++
 .../boot/dts/freescale/imx8mp-ultra-mach-sbc.dts   | 47 ++++++++--------------
 2 files changed, 34 insertions(+), 30 deletions(-)
---
base-commit: 4477a78374a57c3809b172ad30cceabda48c47c6
change-id: 20260817-imx8m-typec-d4a45408e81d

Best regards,
--  
Peng Fan <peng.fan@nxp.com>

[PATCH 1/2] arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The imx8mp-evk board has a NXP CBTU02043 crossbar switch between the
USB Type-C connector and the ptn5110 TCPC. The CBTU02043 SEL pin
(GPIO4_IO20) is used by the ptn5110 orientation-gpios to detect the
CC orientation, but the switch must first be enabled by driving its
XSD (shutdown) pin low.

Add a gpio-hog on GPIO2_IO20 (MX8MP_IOMUXC_SD2_WP__GPIO2_IO20) to
hold the XSD pin low, keeping the CBTU02043 always enabled. Per the
datasheet, XSD is active-low: LOW for normal operation, HIGH for
shutdown (high impedance). Without this, the orientation switch does
not function as all paths through the crossbar are in high-Z state.

Also add a separate pinctrl_cbtu02043_xsd group for the XSD pin.

Fixes: 6e62bc736674 ("arm64: dts: imx8mp-evk: add typec node")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 7bdd641292fb..dc3baeac5e3d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -935,6 +935,17 @@ usb3_data_hs: endpoint {
 	};
 };
 
+&gpio2 {
+	cbtu02043-xsd-hog {
+		gpio-hog;
+		gpios = <20 GPIO_ACTIVE_LOW>;
+		output-low;
+		line-name = "CBTU02043_XSD";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_cbtu02043_xsd>;
+	};
+};
+
 &usb3_phy1 {
 	fsl,phy-tx-preemp-amp-tune-microamp = <1800>;
 	fsl,phy-tx-vref-tune-percent = <116>;
@@ -1021,6 +1032,12 @@ MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29		0xd6
 		>;
 	};
 
+	pinctrl_cbtu02043_xsd: cbtu02043xsdgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20	0x16
+		>;
+	};
+
 	pinctrl_csi_mclk: csi_mclk_grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2	0x50

-- 
2.51.0

Re: [PATCH 1/2] arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The GPIO hog for the CBTU02043 XSD pin incorrectly drives the physical pin HIGH instead of LOW, placing the switch in shutdown mode.
- [High] The `pinctrl-names` and `pinctrl-0` properties inside the `gpio-hog` child node will be silently ignored by the `pinctrl` core.
--

--- Patch [1]: [PATCH 1/2] arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch ---
commit b6ef05965c4d69ccad672c2aa85487746c77918d
Author: Peng Fan <peng.fan@nxp.com>

arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch

This commit adds a gpio-hog to keep the CBTU02043 crossbar switch always
enabled by driving its XSD pin low. It also adds a pinctrl group for the
XSD pin to ensure it is properly multiplexed.

> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index 7bdd641292fb6..dc3baeac5e3d3 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -935,6 +935,17 @@ usb3_data_hs: endpoint {
>  	};
>  };
>  
> +&gpio2 {
> +	cbtu02043-xsd-hog {
> +		gpio-hog;
> +		gpios = <20 GPIO_ACTIVE_LOW>;
> +		output-low;

[Severity: High]
Will this actually drive the physical pin HIGH instead of LOW?

In the gpiolib framework, "output-low" requests a logical 0. Because the
pin is specified as GPIO_ACTIVE_LOW, gpiod_direction_output_nonotify()
applies an inversion to the logical 0, resulting in the pad being driven
to a physical 1 (HIGH level).

Since the commit message notes that XSD must be driven LOW for normal
operation, should this use "output-high" with GPIO_ACTIVE_LOW, or
"output-low" with GPIO_ACTIVE_HIGH?

> +		line-name = "CBTU02043_XSD";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_cbtu02043_xsd>;

[Severity: High]
Will these pinctrl properties be silently ignored by the pinctrl core?

The pinctrl bindings are evaluated by the driver core via
pinctrl_bind_pins() only for nodes that instantiate an associated
struct device. A gpio-hog node is parsed manually by gpiolib as a firmware
subnode and does not instantiate a device.

Does this mean the MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 pin will not be
multiplexed to its GPIO function, preventing the hog from controlling
the actual physical line? Should the pinctrl properties be placed in a
probed device node, like the parent &gpio2 or &iomuxc?

> +	};
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260819-imx8m-typec-v1-0-befc92ecb70a@nxp.com?part=1

Re: [PATCH 1/2] arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch

[Frank Li]

On Wed, Aug 19, 2026 at 03:04:02PM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> - [High] The GPIO hog for the CBTU02043 XSD pin incorrectly drives the physical pin HIGH instead of LOW, placing the switch in shutdown mode.
> - [High] The `pinctrl-names` and `pinctrl-0` properties inside the `gpio-hog` child node will be silently ignored by the `pinctrl` core.
> --

both look likes make sense.

Frank

>
> --- Patch [1]: [PATCH 1/2] arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch ---
> commit b6ef05965c4d69ccad672c2aa85487746c77918d
> Author: Peng Fan <peng.fan@nxp.com>
>
> arm64: dts: imx8mp-evk: enable CBTU02043 for USB Type-C orientation switch
>
> This commit adds a gpio-hog to keep the CBTU02043 crossbar switch always
> enabled by driving its XSD pin low. It also adds a pinctrl group for the
> XSD pin to ensure it is properly multiplexed.
>
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > index 7bdd641292fb6..dc3baeac5e3d3 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > @@ -935,6 +935,17 @@ usb3_data_hs: endpoint {
> >  	};
> >  };
> >
> > +&gpio2 {
> > +	cbtu02043-xsd-hog {
> > +		gpio-hog;
> > +		gpios = <20 GPIO_ACTIVE_LOW>;
> > +		output-low;
>
> [Severity: High]
> Will this actually drive the physical pin HIGH instead of LOW?
>
> In the gpiolib framework, "output-low" requests a logical 0. Because the
> pin is specified as GPIO_ACTIVE_LOW, gpiod_direction_output_nonotify()
> applies an inversion to the logical 0, resulting in the pad being driven
> to a physical 1 (HIGH level).
>
> Since the commit message notes that XSD must be driven LOW for normal
> operation, should this use "output-high" with GPIO_ACTIVE_LOW, or
> "output-low" with GPIO_ACTIVE_HIGH?
>
> > +		line-name = "CBTU02043_XSD";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_cbtu02043_xsd>;
>
> [Severity: High]
> Will these pinctrl properties be silently ignored by the pinctrl core?
>
> The pinctrl bindings are evaluated by the driver core via
> pinctrl_bind_pins() only for nodes that instantiate an associated
> struct device. A gpio-hog node is parsed manually by gpiolib as a firmware
> subnode and does not instantiate a device.
>
> Does this mean the MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 pin will not be
> multiplexed to its GPIO function, preventing the hog from controlling
> the actual physical line? Should the pinctrl properties be placed in a
> probed device node, like the parent &gpio2 or &iomuxc?
>
> > +	};
> > +};
>
> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20260819-imx8m-typec-v1-0-befc92ecb70a@nxp.com?part=1

[PATCH 2/2] arm64: dts: imx8mp-ultra-mach-sbc: fix CBTU02043 USB Type-C orientation switch

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The CBTU02043 on this board is a crossbar switch used solely for USB
Type-C orientation switching, not for SBU signal muxing. Using the
gpio-sbu-mux driver is therefore incorrect.

Replace the gpio-sbu-mux node with:
- orientation-gpios on the ptn5110 TCPC node for CC orientation
  detection using GPIO4_IO20 (CBTU02043 SEL pin).
- A gpio-hog to hold the XSD (shutdown) pin (GPIO2_IO20) low, keeping
  the CBTU02043 always enabled.

This also fixes the enable-gpios polarity which was GPIO_ACTIVE_HIGH,
but the CBTU02043 XSD pin is active-low per the datasheet: LOW for
normal operation, HIGH for shutdown (high impedance).

Fixes: d1c1400bd3b8 ("arm64: dts: imx8mp: Add initial support for Ultratronik imx8mp-ultra-mach-sbc board")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../boot/dts/freescale/imx8mp-ultra-mach-sbc.dts   | 47 ++++++++--------------
 1 file changed, 17 insertions(+), 30 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
index 3e6f9c88cc20..7e0550647751 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
@@ -23,21 +23,6 @@ chosen {
 		stdout-path = &uart2;
 	};
 
-	gpio-sbu-mux {
-		compatible = "nxp,cbdtu02043", "gpio-sbu-mux";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_sbu_mux>;
-		select-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
-		enable-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
-		orientation-switch;
-
-		port {
-			usb3_data_ss: endpoint {
-				remote-endpoint = <&typec_con_ss>;
-			};
-		};
-	};
-
 	gpio-keys {
 		compatible = "gpio-keys";
 
@@ -217,6 +202,15 @@ &gpio2 {
 		"", "", "", "", "#SD2_CD", "", "", "",
 		"", "", "", "", "#USB-C_EN", "", "", "",
 		"", "", "", "", "", "", "", "";
+
+	cbtu02043-xsd-hog {
+		gpio-hog;
+		gpios = <20 GPIO_ACTIVE_LOW>;
+		output-low;
+		line-name = "CBTU02043_XSD";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_cbtu02043_xsd>;
+	};
 };
 
 &gpio3 {
@@ -387,6 +381,7 @@ tcpc@52 {
 		pinctrl-0 = <&pinctrl_ptn5110>;
 		interrupt-parent = <&gpio4>;
 		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+		orientation-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
 
 		usb_con: connector {
 			compatible = "usb-c-connector";
@@ -411,14 +406,6 @@ typec_dr_sw: endpoint {
 						remote-endpoint = <&usb3_drd_sw>;
 					};
 				};
-
-				port@1 {
-					reg = <1>;
-
-					typec_con_ss: endpoint {
-						remote-endpoint = <&usb3_data_ss>;
-					};
-				};
 			};
 		};
 	};
@@ -563,6 +550,12 @@ &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
+	pinctrl_cbtu02043_xsd: cbtu02043-xsd-grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20			0x16	/* #USB-C_EN */
+		>;
+	};
+
 	pinctrl_ecspi1_cs: ecspi1-cs-grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		0x40	/* #SPI1_CS */
@@ -746,6 +739,7 @@ MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03		0x1c0	/* #PMIC_INT */
 	pinctrl_ptn5110: ptn5110-grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x1c4	/* #USB-C_ALERT */
+			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x16	/* #USB-C_SEL */
 		>;
 	};
 
@@ -767,13 +761,6 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
 		>;
 	};
 
-	pinctrl_sbu_mux: sbu-mux-grp {
-		fsl,pins = <
-			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x16	/* #USB-C_SEL */
-			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20			0x16	/* #USB-C_EN */
-		>;
-	};
-
 	pinctrl_slb9670: slb9670-grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00		0x40	/* #TPM_IRQ */

-- 
2.51.0

Re: [PATCH 2/2] arm64: dts: imx8mp-ultra-mach-sbc: fix CBTU02043 USB Type-C orientation switch

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The GPIO hog for the CBTU02043 XSD pin incorrectly drives the physical pin HIGH, placing the switch into shutdown mode instead of keeping it enabled.
--

--- Patch [2]: [PATCH 2/2] arm64: dts: imx8mp-ultra-mach-sbc: fix CBTU02043 USB Type-C orientation switch ---
commit 9b2cdf94fea52f7b5503f6d6e284f01ff2cf262b
Author: Peng Fan <peng.fan@nxp.com>

arm64: dts: imx8mp-ultra-mach-sbc: fix CBTU02043 USB Type-C orientation switch

This commit drops the gpio-sbu-mux node, replacing it with an
orientation-gpios property in the ptn5110 TCPC node. It also adds a gpio-hog
to keep the CBTU02043 switch's XSD (shutdown) pin held low, ensuring the
device remains enabled.

> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
> index 3e6f9c88cc200..7e0550647751e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts

[ ... ]

> @@ -217,6 +202,15 @@ &gpio2 {
>  		"", "", "", "", "#SD2_CD", "", "", "",
>  		"", "", "", "", "#USB-C_EN", "", "", "",
>  		"", "", "", "", "", "", "", "";
> +
> +	cbtu02043-xsd-hog {
> +		gpio-hog;
> +		gpios = <20 GPIO_ACTIVE_LOW>;
> +		output-low;

[Severity: High]
Will this configuration inadvertently drive the XSD pin HIGH, placing the
switch into shutdown mode?

The commit message notes that the CBTU02043 XSD pin is active-low (LOW for
normal operation, HIGH for shutdown).

However, the gpio-hog node specifies both gpios = <20 GPIO_ACTIVE_LOW> and
output-low. The output-low property in the device tree binding requests a
logical 0 (inactive state). The GPIO subsystem evaluates this against the
GPIO_ACTIVE_LOW flag and inverts the logical 0 into a physical 1 (HIGH).

Could this be resolved by either using output-high (to request a logical 1 /
physical LOW) or by changing the polarity to GPIO_ACTIVE_HIGH while retaining
output-low, to ensure the physical pin is correctly driven LOW?

> +		line-name = "CBTU02043_XSD";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_cbtu02043_xsd>;
> +	};
>  };

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260819-imx8m-typec-v1-0-befc92ecb70a@nxp.com?part=2