[PATCH] x86/amd: Expand comment about NullSelectorClearsBase

[PATCH] x86/amd: Expand comment about NullSelectorClearsBase

[Andrew Cooper]

Rework detect_zen2_null_seg_behaviour() to use the new MSR infrastructure.

Zen2 doesn't have WRMSRNS so don't bother relaxing the write.  All it will do
is insert a useless alternative.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <jbeulich@suse.com>
CC: Roger Pau Monné <roger@xenproject.org>
CC: Teddy Astie <teddy.astie@vates.tech>

Naming Zen2/3 in init_hygon() isn't ideal, but the early hygons really were
not far removed from the AMD microarchitectures.
---
 xen/arch/x86/cpu/amd.c   | 17 ++++++++---------
 xen/arch/x86/cpu/hygon.c |  5 ++++-
 2 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 70783c9a0af0..ddd73f64c2d5 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -828,15 +828,11 @@ void amd_init_spectral_chicken(void)
 
 void __init detect_zen2_null_seg_behaviour(void)
 {
-	uint64_t base;
-
-	wrmsrl(MSR_FS_BASE, 1);
-	asm volatile ( "mov %0, %%fs" :: "r" (0) );
-	rdmsrl(MSR_FS_BASE, base);
-
-	if (base == 0)
-		setup_force_cpu_cap(X86_FEATURE_NSCB);
+    wrmsr(MSR_FS_BASE, 1);
+    asm volatile ( "mov %0, %%fs" :: "r" (0) );
 
+    if ( rdmsr(MSR_FS_BASE) == 0 )
+        setup_force_cpu_cap(X86_FEATURE_NSCB);
 }
 
 static void cf_check fam17_disable_c6(void *arg)
@@ -1110,7 +1106,10 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	if (c->family == 0x17)
 		amd_init_spectral_chicken();
 
-	/* Probe for NSCB on Zen2 CPUs when not virtualised */
+	/*
+	 * Zen3 and later enumerate NullSelectorClearsBase.  Zen2 has this
+	 * behaviour but doesn't enumerate it.  Probe when not virtualised.
+	 */
 	if (!cpu_has_hypervisor && !cpu_has_nscb && c == &boot_cpu_data &&
 	    c->family == 0x17)
 		detect_zen2_null_seg_behaviour();
diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c
index 7a9fc25d3157..ef19c2b36783 100644
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -39,7 +39,10 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
 
 	amd_init_ssbd(c);
 
-	/* Probe for NSCB on Zen2 CPUs when not virtualised */
+	/*
+	 * Zen3 and later enumerate NullSelectorClearsBase.  Zen2 has this
+	 * behaviour but doesn't enumerate it.  Probe when not virtualised.
+	 */
 	if (!cpu_has_hypervisor && !cpu_has_nscb && c == &boot_cpu_data &&
 	    c->family == 0x18)
 		detect_zen2_null_seg_behaviour();
-- 
2.39.5

Re: [PATCH] x86/amd: Expand comment about NullSelectorClearsBase

[Jan Beulich]

On 20.08.2026 19:26, Andrew Cooper wrote:
> Rework detect_zen2_null_seg_behaviour() to use the new MSR infrastructure.
> 
> Zen2 doesn't have WRMSRNS so don't bother relaxing the write.  All it will do
> is insert a useless alternative.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>

> Naming Zen2/3 in init_hygon() isn't ideal, but the early hygons really were
> not far removed from the AMD microarchitectures.

I wonder what we should do about Hygon. Just recently I saw patches going into
somewhere (gcc?) to support recent hardware. We haven't seen any contributions
in many years to keep our support up-to-date. We may want/need to consider
removing support if that code is effectively unmaintained.

Jan