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From: Jason Gunthorpe <jgg@ziepe.ca>
To: fangyu.yu@linux.alibaba.com
Cc: tomasz.jeznach@linux.dev, joro@8bytes.org, will@kernel.org,
	robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, baolu.lu@linux.intel.com,
	jroedel@suse.de, zong.li@sifive.com,
	andrew.jones@oss.qualcomm.com, anup@brainfault.org,
	kevin.tian@intel.com, atish.patra@linux.dev, skhawaja@google.com,
	vasant.hegde@amd.com, guoren@kernel.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [RFC PATCH v3 02/10] iommupt: Add RISC-V dirty tracking PTE ops
Date: Fri, 21 Aug 2026 11:03:41 -0300	[thread overview]
Message-ID: <20260821140341.GC1114497@ziepe.ca> (raw)
In-Reply-To: <20260821132749.82070-3-fangyu.yu@linux.alibaba.com>

On Fri, Aug 21, 2026 at 09:27:42PM +0800, fangyu.yu@linux.alibaba.com wrote:
> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
> 
> Implement the three dirty-tracking hooks required by the generic page
> table framework for the RISC-V format:
> 
>   pt_entry_is_write_dirty():
>     Check the D bit (bit 7) in the PTE.
> 
>   pt_entry_make_write_clean():
>     Clear the D bit across the full contiguous range.
> 
>   pt_entry_make_write_dirty():
>     Atomically set D via try_cmpxchg64() on a single PTE.
> 
> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
> ---
>  drivers/iommu/generic_pt/fmt/riscv.h | 43 ++++++++++++++++++++++++++++
>  1 file changed, 43 insertions(+)
> 
> diff --git a/drivers/iommu/generic_pt/fmt/riscv.h b/drivers/iommu/generic_pt/fmt/riscv.h
> index 5692c033dbde..09581798e753 100644
> --- a/drivers/iommu/generic_pt/fmt/riscv.h
> +++ b/drivers/iommu/generic_pt/fmt/riscv.h
> @@ -226,6 +226,49 @@ static inline void riscvpt_attr_from_entry(const struct pt_state *pts,
>  }
>  #define pt_attr_from_entry riscvpt_attr_from_entry

Does this work for all stages or does it need  pt_dirty_supported ?

Jason

WARNING: multiple messages have this Message-ID (diff)
From: Jason Gunthorpe <jgg@ziepe.ca>
To: fangyu.yu@linux.alibaba.com
Cc: tomasz.jeznach@linux.dev, joro@8bytes.org, will@kernel.org,
	robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, baolu.lu@linux.intel.com,
	jroedel@suse.de, zong.li@sifive.com,
	andrew.jones@oss.qualcomm.com, anup@brainfault.org,
	kevin.tian@intel.com, atish.patra@linux.dev, skhawaja@google.com,
	vasant.hegde@amd.com, guoren@kernel.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [RFC PATCH v3 02/10] iommupt: Add RISC-V dirty tracking PTE ops
Date: Fri, 21 Aug 2026 11:03:41 -0300	[thread overview]
Message-ID: <20260821140341.GC1114497@ziepe.ca> (raw)
In-Reply-To: <20260821132749.82070-3-fangyu.yu@linux.alibaba.com>

On Fri, Aug 21, 2026 at 09:27:42PM +0800, fangyu.yu@linux.alibaba.com wrote:
> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
> 
> Implement the three dirty-tracking hooks required by the generic page
> table framework for the RISC-V format:
> 
>   pt_entry_is_write_dirty():
>     Check the D bit (bit 7) in the PTE.
> 
>   pt_entry_make_write_clean():
>     Clear the D bit across the full contiguous range.
> 
>   pt_entry_make_write_dirty():
>     Atomically set D via try_cmpxchg64() on a single PTE.
> 
> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
> ---
>  drivers/iommu/generic_pt/fmt/riscv.h | 43 ++++++++++++++++++++++++++++
>  1 file changed, 43 insertions(+)
> 
> diff --git a/drivers/iommu/generic_pt/fmt/riscv.h b/drivers/iommu/generic_pt/fmt/riscv.h
> index 5692c033dbde..09581798e753 100644
> --- a/drivers/iommu/generic_pt/fmt/riscv.h
> +++ b/drivers/iommu/generic_pt/fmt/riscv.h
> @@ -226,6 +226,49 @@ static inline void riscvpt_attr_from_entry(const struct pt_state *pts,
>  }
>  #define pt_attr_from_entry riscvpt_attr_from_entry

Does this work for all stages or does it need  pt_dirty_supported ?

Jason

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2026-08-21 14:03 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-21 13:27 [RFC PATCH v3 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains fangyu.yu
2026-08-21 13:27 ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 01/10] iommupt: Add RISC-V Second-stage (iohgatp) page table support fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 13:55   ` Jason Gunthorpe
2026-08-21 13:55     ` Jason Gunthorpe
2026-08-22 14:55     ` fangyu.yu
2026-08-22 14:55       ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 02/10] iommupt: Add RISC-V dirty tracking PTE ops fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 14:03   ` Jason Gunthorpe [this message]
2026-08-21 14:03     ` Jason Gunthorpe
2026-08-22 15:01     ` fangyu.yu
2026-08-22 15:01       ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 03/10] iommu/riscv: report iommu capabilities fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 04/10] iommu/riscv: use data structure instead of individual values fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 05/10] iommu/riscv: support GSCID and GVMA invalidation command fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 06/10] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 07/10] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 08/10] iommu/riscv: Pre-enable GADE for second-stage domains fangyu.yu
2026-08-21 13:27   ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 09/10] iommu/riscv: Add dirty tracking support " fangyu.yu
2026-08-21 13:27   ` fangyu.yu

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