Re: [RESEND Patch v10 10/23] perf/x86: Enable XMM register sampling for non-PEBS events

[sashiko-bot@kernel.org]

> Previously, XMM register sampling was only available for PEBS events
> starting from Icelake. Extend the support to non-PEBS events using
> the xsaves instruction, thereby completing the feature set.
> 
> To implement this, a 64-byte aligned buffer is required. A per-CPU
> ext_regs_buf is introduced to store SIMD and other registers, with an
> approximate size of 2K. The buffer is allocated using kzalloc_node(),
> ensuring natural and 64-byte alignment for all kmalloc() allocations
> with powers of 2.
> 
> XMM sampling for non-PEBS events is supported in the REGS_INTR case.
> Support for REGS_USER will be added in a subsequent patch. For PEBS
> events, XMM register sampling data is directly retrieved from PEBS
> records.
> 
> Future support for additional vector registers (YMM/ZMM/OPMASK) is
> planned. An ext_regs_mask is added to track the supported vector
> register groups.
> 
> Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260824082731.1013973-1-dapeng1.mi@linux.intel.com?part=10