Re: [PATCH 6/9] arm64: dts: qcom: ipq5424: Flatten usb controller nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Incorrect interrupt-names array order triggers dtbs_check failures.
--

--- Patch [6]: [PATCH 6/9] arm64: dts: qcom: ipq5424: Flatten usb controller nodes ---
commit 7fc908a77a39f9104c77c013b5b7e44175c43038
Author: George Moussalem <george.moussalem@outlook.com>

arm64: dts: qcom: ipq5424: Flatten usb controller nodes

This patch flattens the USB controller nodes and updates them to use the
latest bindings and the flattened driver approach. It also adds a property
to select UTMI as the reference clock for the DWC3 core.

> diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> index 702061e16a58d..648f95d70448e 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> @@ -663,33 +660,32 @@ usb2: usb2@1ef8800 {
>  			assigned-clock-rates = <200000000>,
>  					       <24000000>;
>  
> -			interrupts-extended = <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> +			interrupts-extended = <&intc GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "pwr_event",
> +			interrupt-names = "dwc_usb3",
> +					  "pwr_event",
>  					  "qusb2_phy",
>  					  "dm_hs_phy_irq",
>  					  "dp_hs_phy_irq";

[Severity: Low]
Will this order of interrupt names cause dtbs_check failures with the new
schema?

The qcom,snps-dwc3.yaml schema requires the interrupts for
qcom,ipq5424-dwc3 to strictly follow the order: dwc_usb3, pwr_event,
qusb2_phy, dp_hs_phy_irq, and then dm_hs_phy_irq. Leaving
dm_hs_phy_irq before dp_hs_phy_irq seems like it might trigger a
validation error, even though the kernel matches them by name.

[ ... ]

> @@ -755,34 +747,33 @@ usb3: usb3@8af8800 {
>  			assigned-clock-rates = <200000000>,
>  					       <24000000>;
>  
> -			interrupts-extended = <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> +			interrupts-extended = <&intc GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "pwr_event",
> +			interrupt-names = "dwc_usb3",
> +					  "pwr_event",
>  					  "qusb2_phy",
>  					  "dm_hs_phy_irq",
>  					  "dp_hs_phy_irq";

[Severity: Low]
Does this also need to have dp_hs_phy_irq placed before dm_hs_phy_irq
to satisfy the qcom,snps-dwc3 dtbs_check requirements for this node?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com?part=6