* [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
@ 2026-08-12 21:53 Austin Hu
2026-08-12 21:53 ` [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
` (13 more replies)
0 siblings, 14 replies; 24+ messages in thread
From: Austin Hu @ 2026-08-12 21:53 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai
This series improves Frame Buffer Compression (FBC) dirty rectangle
handling in compliance with hardware requirements.
The first patch restricts dirty rectangle vertical coordinates to the
valid frame buffer range [y_offset, y_end], adding explicit coordinate
inversion handling for 180-degree plane rotation and debug logging when
clamping occurs[cite: 10].
The second patch tracks plane state attribute changes during atomic commits[cite: 9].
When FBC Dirty Rectangle mode is active, partial updates only apply to
surface address changes (PLANE_SURF)[cite: 9]. Modifications to any other
plane state parameters require fetching full-plane pixel data from memory to
re-compress and update the entire CFB in stolen memory[cite: 9]. Once fully
re-compressed, subsequent atomic commits can resume selective dirty
rectangle updates[cite: 9].
Austin Hu (1):
drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes[cite: 9]
Charlton Lin (1):
drm/i915/fbc: fbc_dirty_rect restrictions and logging[cite: 10]
drivers/gpu/drm/i915/display/intel_fbc.c | 158 +++++++++++++++++++++-[cite: 9, 10]
1 file changed, 151 insertions(+), 7 deletions(-)[cite: 9, 10]
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
@ 2026-08-12 21:53 ` Austin Hu
2026-08-12 22:08 ` sashiko-bot
2026-08-12 21:53 ` [PATCH 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
` (12 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Austin Hu @ 2026-08-12 21:53 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai
From: Charlton Lin <charlton.lin@intel.com>
Clamp the FBC dirty rectangle coordinates to the valid frame buffer
range [y_offset, y_end] to prevent out-of-bounds coordinates, and
log a debug message when clamping occurs.
Signed-off-by: Charlton Lin <charlton.lin@intel.com>
Signed-off-by: Austin Hu <austin.hu@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 39 ++++++++++++++++++++++--
1 file changed, 36 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index f61b4a218d6e..c0fed695af0d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1521,11 +1521,14 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
const struct intel_crtc_state *crtc_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_fbc *fbc = plane->fbc;
struct drm_rect *fbc_dirty_rect = &fbc->state.dirty_rect;
int width = drm_rect_width(&plane_state->uapi.src) >> 16;
+ int height = drm_rect_height(&plane_state->uapi.src) >> 16;
const struct drm_rect *damage = &plane_state->damage;
int y_offset = plane_state->view.color_plane[0].y;
+ int y_end = y_offset + height;
lockdep_assert_held(&fbc->lock);
@@ -1535,11 +1538,41 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
return;
}
- if (drm_rect_visible(damage))
- *fbc_dirty_rect = *damage;
- else
+ if (drm_rect_visible(damage)) {
+ int y1, y2;
+
+ if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
+ /* Under 180 degree rotation, coordinate system is inverted */
+ int inv_y1 = height - damage->y2;
+ int inv_y2 = height - damage->y1;
+
+ y1 = clamp(y_offset + inv_y1, y_offset, y_end);
+ y2 = clamp(y_offset + inv_y2, y_offset, y_end);
+ } else {
+ y1 = clamp(damage->y1, y_offset, y_end);
+ y2 = clamp(damage->y2, y_offset, y_end);
+ }
+
+ /*
+ * Clamp dirty rect to the valid FB range [y_offset, y_end].
+ * Per Bspec:
+ * start_line >= y_offset
+ * end_line <= y_offset + plane_height
+ */
+ if (y1 != damage->y1 || y2 != damage->y2)
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] FBC dirty rect out of range: y1=%d y2=%d clamped to y1=%d y2=%d (y_offset=%d y_end=%d)\n",
+ plane->base.base.id, plane->base.name,
+ damage->y1, damage->y2, y1, y2, y_offset, y_end);
+
+ fbc_dirty_rect->x1 = damage->x1;
+ fbc_dirty_rect->x2 = damage->x2;
+ fbc_dirty_rect->y1 = y1;
+ fbc_dirty_rect->y2 = y2;
+ } else {
/* dirty rect must cover at least one line */
*fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, 1);
+ }
}
void
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
2026-08-12 21:53 ` [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
@ 2026-08-12 21:53 ` Austin Hu
2026-08-12 22:10 ` sashiko-bot
2026-08-12 22:03 ` ✓ CI.KUnit: success for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Patchwork
` (11 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Austin Hu @ 2026-08-12 21:53 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai
When FBC Dirty Rectangle mode is enabled, any non-PLANE_SURF register
update requires fetching the full plane frame buffer from memory to
re-compress and update the CFB in stolen memory.
Check plane state attributes during atomic commits and force a full
CFB nuke if any setting other than the surface address changes.
Signed-off-by: Austin Hu <austin.hu@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 126 ++++++++++++++++++++++-
1 file changed, 122 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index c0fed695af0d..6bf5c0947671 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1516,8 +1516,124 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
intel_fbc_is_cfb_ok(plane_state);
}
+/*
+ * From BSpec about "FBC Dirty Rectangle", when Dirty Rectangle mode is active,
+ * partial updates only apply to surface address changes. Any other plane state
+ * modification requires Plane to fetch full-plane pixel data from memory to
+ * re-compress and update the entire CFB in stolen memory. Once fully
+ * re-compressed, subsequent atomic commits go ahead with FBC dirty rectangle
+ * updates for smooth visual updates.
+ *
+ * So check any Plane attribute changed except for its surface address by
+ * referring to intel_async_flip_check_hw() which also checks async flip.
+ */
+static bool intel_fbc_dirty_rect_needs_nuke(struct intel_atomic_state *state,
+ struct intel_plane *plane)
+{
+ struct intel_display *display = to_intel_display(state);
+ const struct intel_plane_state *old_plane_state =
+ intel_atomic_get_old_plane_state(state, plane);
+ const struct intel_plane_state *new_plane_state =
+ intel_atomic_get_new_plane_state(state, plane);
+
+ /*
+ * If the plane state isn't part of this atomic transaction or during
+ * initial plane setup, conservatively force a full CFB nuke.
+ */
+ if (!old_plane_state || !new_plane_state)
+ return true;
+
+ if (old_plane_state->view.color_plane[0].mapping_stride !=
+ new_plane_state->view.color_plane[0].mapping_stride) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Stride changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (old_plane_state->hw.fb->modifier !=
+ new_plane_state->hw.fb->modifier) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Modifier changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (old_plane_state->hw.fb->format != new_plane_state->hw.fb->format) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Pixel format changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (old_plane_state->hw.rotation != new_plane_state->hw.rotation) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Rotation changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (skl_plane_aux_dist(old_plane_state, 0) !=
+ skl_plane_aux_dist(new_plane_state, 0)) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] AUX_DIST changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (!drm_rect_equals(&old_plane_state->uapi.src,
+ &new_plane_state->uapi.src) ||
+ !drm_rect_equals(&old_plane_state->uapi.dst,
+ &new_plane_state->uapi.dst)) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Size/coords changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (old_plane_state->hw.alpha != new_plane_state->hw.alpha) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Alpha changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (old_plane_state->decrypt != new_plane_state->decrypt) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Decryption changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ /* Includes pixel_blend_mode, color_encoding & color_range checking. */
+ if (old_plane_state->color_ctl != new_plane_state->color_ctl) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Color ctl changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (old_plane_state->cus_ctl != new_plane_state->cus_ctl) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] CUS ctl changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ if (old_plane_state->view.color_plane[0].x !=
+ new_plane_state->view.color_plane[0].x) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Color plane 0 x changed in FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+ return true;
+ }
+
+ return false;
+}
+
static void
-__intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
+__intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
+ const struct intel_plane_state *plane_state,
const struct intel_crtc_state *crtc_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
@@ -1538,7 +1654,10 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
return;
}
- if (drm_rect_visible(damage)) {
+ if (intel_fbc_dirty_rect_needs_nuke(state, plane)) {
+ /* compress the entire region due to non PLANE_SURF updating. */
+ *fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, height);
+ } else if (drm_rect_visible(damage)) {
int y1, y2;
if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
@@ -1598,8 +1717,7 @@ intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
mutex_lock(&fbc->lock);
if (fbc->state.plane == plane)
- __intel_fbc_prepare_dirty_rect(plane_state,
- crtc_state);
+ __intel_fbc_prepare_dirty_rect(state, plane_state, crtc_state);
mutex_unlock(&fbc->lock);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* ✓ CI.KUnit: success for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
2026-08-12 21:53 ` [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
2026-08-12 21:53 ` [PATCH 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
@ 2026-08-12 22:03 ` Patchwork
2026-08-12 22:44 ` ✓ Xe.CI.BAT: " Patchwork
` (10 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2026-08-12 22:03 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-xe
== Series Details ==
Series: drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
URL : https://patchwork.freedesktop.org/series/172105/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[22:01:12] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:01:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:01:36] Starting KUnit Kernel (1/1)...
[22:01:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:01:36] ================= gpu_buddy (13 subtests) ==================
[22:01:36] [PASSED] gpu_test_buddy_alloc_limit
[22:01:36] [PASSED] gpu_test_buddy_alloc_optimistic
[22:01:36] [PASSED] gpu_test_buddy_alloc_pessimistic
[22:01:36] [PASSED] gpu_test_buddy_alloc_pathological
[22:01:36] [PASSED] gpu_test_buddy_alloc_contiguous
[22:01:36] [PASSED] gpu_test_buddy_alloc_clear
[22:01:36] [PASSED] gpu_test_buddy_alloc_range
[22:01:36] [PASSED] gpu_test_buddy_alloc_range_bias
[22:01:36] [PASSED] gpu_test_buddy_fragmentation_performance
[22:01:36] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[22:01:36] [PASSED] gpu_test_buddy_offset_aligned_allocation
[22:01:36] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[22:01:36] [PASSED] gpu_test_buddy_addr_to_block
[22:01:36] ==================== [PASSED] gpu_buddy ====================
[22:01:36] ============================================================
[22:01:36] Testing complete. Ran 13 tests: passed: 13
[22:01:36] Elapsed time: 24.880s total, 4.336s configuring, 20.079s building, 0.439s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:01:37] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:01:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:02:12] Starting KUnit Kernel (1/1)...
[22:02:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:02:12] ================== guc_buf (11 subtests) ===================
[22:02:12] [PASSED] test_smallest
[22:02:12] [PASSED] test_largest
[22:02:12] [PASSED] test_granular
[22:02:12] [PASSED] test_unique
[22:02:12] [PASSED] test_overlap
[22:02:12] [PASSED] test_reusable
[22:02:12] [PASSED] test_too_big
[22:02:12] [PASSED] test_flush
[22:02:12] [PASSED] test_lookup
[22:02:12] [PASSED] test_data
[22:02:12] [PASSED] test_class
[22:02:12] ===================== [PASSED] guc_buf =====================
[22:02:12] =================== guc_dbm (7 subtests) ===================
[22:02:12] [PASSED] test_empty
[22:02:12] [PASSED] test_default
[22:02:12] ======================== test_size ========================
[22:02:12] [PASSED] 4
[22:02:12] [PASSED] 8
[22:02:12] [PASSED] 32
[22:02:12] [PASSED] 256
[22:02:12] ==================== [PASSED] test_size ====================
[22:02:12] ======================= test_reuse ========================
[22:02:12] [PASSED] 4
[22:02:12] [PASSED] 8
[22:02:12] [PASSED] 32
[22:02:12] [PASSED] 256
[22:02:12] =================== [PASSED] test_reuse ====================
[22:02:12] =================== test_range_overlap ====================
[22:02:12] [PASSED] 4
[22:02:12] [PASSED] 8
[22:02:12] [PASSED] 32
[22:02:12] [PASSED] 256
[22:02:12] =============== [PASSED] test_range_overlap ================
[22:02:12] =================== test_range_compact ====================
[22:02:12] [PASSED] 4
[22:02:12] [PASSED] 8
[22:02:12] [PASSED] 32
[22:02:12] [PASSED] 256
[22:02:12] =============== [PASSED] test_range_compact ================
[22:02:12] ==================== test_range_spare =====================
[22:02:12] [PASSED] 4
[22:02:12] [PASSED] 8
[22:02:12] [PASSED] 32
[22:02:12] [PASSED] 256
[22:02:12] ================ [PASSED] test_range_spare =================
[22:02:12] ===================== [PASSED] guc_dbm =====================
[22:02:12] =================== guc_idm (6 subtests) ===================
[22:02:12] [PASSED] bad_init
[22:02:12] [PASSED] no_init
[22:02:12] [PASSED] init_fini
[22:02:12] [PASSED] check_used
[22:02:12] [PASSED] check_quota
[22:02:12] [PASSED] check_all
[22:02:12] ===================== [PASSED] guc_idm =====================
[22:02:12] =============== guc_klv_helpers (9 subtests) ===============
[22:02:12] [PASSED] test_count
[22:02:12] [PASSED] test_encode_u32
[22:02:12] [PASSED] test_encode_u64
[22:02:12] [PASSED] test_encode_string
[22:02:12] [PASSED] test_encode_object_raw
[22:02:12] [PASSED] test_encode_object_klv
[22:02:12] [PASSED] test_encode_object_nested
[22:02:12] [PASSED] test_encode_object_basic
[22:02:12] [PASSED] test_print
[22:02:12] ================= [PASSED] guc_klv_helpers =================
[22:02:12] ================== no_relay (3 subtests) ===================
[22:02:12] [PASSED] xe_drops_guc2pf_if_not_ready
[22:02:12] [PASSED] xe_drops_guc2vf_if_not_ready
[22:02:12] [PASSED] xe_rejects_send_if_not_ready
[22:02:12] ==================== [PASSED] no_relay =====================
[22:02:12] ================== pf_relay (14 subtests) ==================
[22:02:12] [PASSED] pf_rejects_guc2pf_too_short
[22:02:12] [PASSED] pf_rejects_guc2pf_too_long
[22:02:12] [PASSED] pf_rejects_guc2pf_no_payload
[22:02:12] [PASSED] pf_fails_no_payload
[22:02:12] [PASSED] pf_fails_bad_origin
[22:02:12] [PASSED] pf_fails_bad_type
[22:02:12] [PASSED] pf_txn_reports_error
[22:02:12] [PASSED] pf_txn_sends_pf2guc
[22:02:12] [PASSED] pf_sends_pf2guc
[22:02:12] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:02:12] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:02:12] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:02:12] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:02:12] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:02:12] ==================== [PASSED] pf_relay =====================
[22:02:12] ================== vf_relay (3 subtests) ===================
[22:02:12] [PASSED] vf_rejects_guc2vf_too_short
[22:02:12] [PASSED] vf_rejects_guc2vf_too_long
[22:02:12] [PASSED] vf_rejects_guc2vf_no_payload
[22:02:12] ==================== [PASSED] vf_relay =====================
[22:02:12] ================ pf_gt_config (9 subtests) =================
[22:02:12] [PASSED] fair_contexts_1vf
[22:02:12] [PASSED] fair_doorbells_1vf
[22:02:12] [PASSED] fair_ggtt_1vf
[22:02:12] ====================== fair_vram_1vf ======================
[22:02:12] [PASSED] 3.50 GiB
[22:02:12] [PASSED] 11.5 GiB
[22:02:12] [PASSED] 15.5 GiB
[22:02:12] [PASSED] 31.5 GiB
[22:02:12] [PASSED] 63.5 GiB
[22:02:12] [PASSED] 1.91 GiB
[22:02:12] ================== [PASSED] fair_vram_1vf ==================
[22:02:12] ================ fair_vram_1vf_admin_only =================
[22:02:12] [PASSED] 3.50 GiB
[22:02:12] [PASSED] 11.5 GiB
[22:02:12] [PASSED] 15.5 GiB
[22:02:12] [PASSED] 31.5 GiB
[22:02:12] [PASSED] 63.5 GiB
[22:02:12] [PASSED] 1.91 GiB
[22:02:12] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:02:12] ====================== fair_contexts ======================
[22:02:12] [PASSED] 1 VF
[22:02:12] [PASSED] 2 VFs
[22:02:12] [PASSED] 3 VFs
[22:02:12] [PASSED] 4 VFs
[22:02:12] [PASSED] 5 VFs
[22:02:12] [PASSED] 6 VFs
[22:02:12] [PASSED] 7 VFs
[22:02:12] [PASSED] 8 VFs
[22:02:12] [PASSED] 9 VFs
[22:02:12] [PASSED] 10 VFs
[22:02:12] [PASSED] 11 VFs
[22:02:12] [PASSED] 12 VFs
[22:02:12] [PASSED] 13 VFs
[22:02:12] [PASSED] 14 VFs
[22:02:12] [PASSED] 15 VFs
[22:02:12] [PASSED] 16 VFs
[22:02:12] [PASSED] 17 VFs
[22:02:12] [PASSED] 18 VFs
[22:02:12] [PASSED] 19 VFs
[22:02:12] [PASSED] 20 VFs
[22:02:12] [PASSED] 21 VFs
[22:02:12] [PASSED] 22 VFs
[22:02:12] [PASSED] 23 VFs
[22:02:12] [PASSED] 24 VFs
[22:02:12] [PASSED] 25 VFs
[22:02:12] [PASSED] 26 VFs
[22:02:12] [PASSED] 27 VFs
[22:02:12] [PASSED] 28 VFs
[22:02:12] [PASSED] 29 VFs
[22:02:12] [PASSED] 30 VFs
[22:02:12] [PASSED] 31 VFs
[22:02:12] [PASSED] 32 VFs
[22:02:12] [PASSED] 33 VFs
[22:02:12] [PASSED] 34 VFs
[22:02:12] [PASSED] 35 VFs
[22:02:12] [PASSED] 36 VFs
[22:02:12] [PASSED] 37 VFs
[22:02:12] [PASSED] 38 VFs
[22:02:12] [PASSED] 39 VFs
[22:02:12] [PASSED] 40 VFs
[22:02:12] [PASSED] 41 VFs
[22:02:12] [PASSED] 42 VFs
[22:02:12] [PASSED] 43 VFs
[22:02:12] [PASSED] 44 VFs
[22:02:12] [PASSED] 45 VFs
[22:02:12] [PASSED] 46 VFs
[22:02:12] [PASSED] 47 VFs
[22:02:12] [PASSED] 48 VFs
[22:02:12] [PASSED] 49 VFs
[22:02:12] [PASSED] 50 VFs
[22:02:12] [PASSED] 51 VFs
[22:02:12] [PASSED] 52 VFs
[22:02:12] [PASSED] 53 VFs
[22:02:12] [PASSED] 54 VFs
[22:02:12] [PASSED] 55 VFs
[22:02:12] [PASSED] 56 VFs
[22:02:12] [PASSED] 57 VFs
[22:02:12] [PASSED] 58 VFs
[22:02:12] [PASSED] 59 VFs
[22:02:12] [PASSED] 60 VFs
[22:02:12] [PASSED] 61 VFs
[22:02:12] [PASSED] 62 VFs
[22:02:12] [PASSED] 63 VFs
[22:02:12] ================== [PASSED] fair_contexts ==================
[22:02:12] ===================== fair_doorbells ======================
[22:02:12] [PASSED] 1 VF
[22:02:12] [PASSED] 2 VFs
[22:02:12] [PASSED] 3 VFs
[22:02:12] [PASSED] 4 VFs
[22:02:12] [PASSED] 5 VFs
[22:02:12] [PASSED] 6 VFs
[22:02:12] [PASSED] 7 VFs
[22:02:12] [PASSED] 8 VFs
[22:02:12] [PASSED] 9 VFs
[22:02:12] [PASSED] 10 VFs
[22:02:12] [PASSED] 11 VFs
[22:02:12] [PASSED] 12 VFs
[22:02:12] [PASSED] 13 VFs
[22:02:12] [PASSED] 14 VFs
[22:02:12] [PASSED] 15 VFs
[22:02:12] [PASSED] 16 VFs
[22:02:12] [PASSED] 17 VFs
[22:02:12] [PASSED] 18 VFs
[22:02:12] [PASSED] 19 VFs
[22:02:12] [PASSED] 20 VFs
[22:02:12] [PASSED] 21 VFs
[22:02:12] [PASSED] 22 VFs
[22:02:12] [PASSED] 23 VFs
[22:02:12] [PASSED] 24 VFs
[22:02:12] [PASSED] 25 VFs
[22:02:12] [PASSED] 26 VFs
[22:02:12] [PASSED] 27 VFs
[22:02:12] [PASSED] 28 VFs
[22:02:12] [PASSED] 29 VFs
[22:02:12] [PASSED] 30 VFs
[22:02:12] [PASSED] 31 VFs
[22:02:12] [PASSED] 32 VFs
[22:02:12] [PASSED] 33 VFs
[22:02:12] [PASSED] 34 VFs
[22:02:12] [PASSED] 35 VFs
[22:02:12] [PASSED] 36 VFs
[22:02:12] [PASSED] 37 VFs
[22:02:12] [PASSED] 38 VFs
[22:02:12] [PASSED] 39 VFs
[22:02:12] [PASSED] 40 VFs
[22:02:12] [PASSED] 41 VFs
[22:02:12] [PASSED] 42 VFs
[22:02:12] [PASSED] 43 VFs
[22:02:12] [PASSED] 44 VFs
[22:02:12] [PASSED] 45 VFs
[22:02:12] [PASSED] 46 VFs
[22:02:12] [PASSED] 47 VFs
[22:02:12] [PASSED] 48 VFs
[22:02:12] [PASSED] 49 VFs
[22:02:12] [PASSED] 50 VFs
[22:02:12] [PASSED] 51 VFs
[22:02:12] [PASSED] 52 VFs
[22:02:12] [PASSED] 53 VFs
[22:02:12] [PASSED] 54 VFs
[22:02:12] [PASSED] 55 VFs
[22:02:12] [PASSED] 56 VFs
[22:02:12] [PASSED] 57 VFs
[22:02:12] [PASSED] 58 VFs
[22:02:12] [PASSED] 59 VFs
[22:02:12] [PASSED] 60 VFs
[22:02:12] [PASSED] 61 VFs
[22:02:12] [PASSED] 62 VFs
[22:02:12] [PASSED] 63 VFs
[22:02:12] ================= [PASSED] fair_doorbells ==================
[22:02:12] ======================== fair_ggtt ========================
[22:02:12] [PASSED] 1 VF
[22:02:12] [PASSED] 2 VFs
[22:02:12] [PASSED] 3 VFs
[22:02:12] [PASSED] 4 VFs
[22:02:12] [PASSED] 5 VFs
[22:02:12] [PASSED] 6 VFs
[22:02:12] [PASSED] 7 VFs
[22:02:12] [PASSED] 8 VFs
[22:02:12] [PASSED] 9 VFs
[22:02:12] [PASSED] 10 VFs
[22:02:12] [PASSED] 11 VFs
[22:02:12] [PASSED] 12 VFs
[22:02:12] [PASSED] 13 VFs
[22:02:12] [PASSED] 14 VFs
[22:02:12] [PASSED] 15 VFs
[22:02:12] [PASSED] 16 VFs
[22:02:12] [PASSED] 17 VFs
[22:02:12] [PASSED] 18 VFs
[22:02:12] [PASSED] 19 VFs
[22:02:12] [PASSED] 20 VFs
[22:02:12] [PASSED] 21 VFs
[22:02:12] [PASSED] 22 VFs
[22:02:12] [PASSED] 23 VFs
[22:02:12] [PASSED] 24 VFs
[22:02:12] [PASSED] 25 VFs
[22:02:12] [PASSED] 26 VFs
[22:02:12] [PASSED] 27 VFs
[22:02:12] [PASSED] 28 VFs
[22:02:12] [PASSED] 29 VFs
[22:02:12] [PASSED] 30 VFs
[22:02:12] [PASSED] 31 VFs
[22:02:12] [PASSED] 32 VFs
[22:02:12] [PASSED] 33 VFs
[22:02:12] [PASSED] 34 VFs
[22:02:12] [PASSED] 35 VFs
[22:02:12] [PASSED] 36 VFs
[22:02:12] [PASSED] 37 VFs
[22:02:12] [PASSED] 38 VFs
[22:02:12] [PASSED] 39 VFs
[22:02:12] [PASSED] 40 VFs
[22:02:12] [PASSED] 41 VFs
[22:02:12] [PASSED] 42 VFs
[22:02:12] [PASSED] 43 VFs
[22:02:12] [PASSED] 44 VFs
[22:02:12] [PASSED] 45 VFs
[22:02:12] [PASSED] 46 VFs
[22:02:12] [PASSED] 47 VFs
[22:02:12] [PASSED] 48 VFs
[22:02:12] [PASSED] 49 VFs
[22:02:12] [PASSED] 50 VFs
[22:02:12] [PASSED] 51 VFs
[22:02:12] [PASSED] 52 VFs
[22:02:12] [PASSED] 53 VFs
[22:02:12] [PASSED] 54 VFs
[22:02:12] [PASSED] 55 VFs
[22:02:12] [PASSED] 56 VFs
[22:02:12] [PASSED] 57 VFs
[22:02:12] [PASSED] 58 VFs
[22:02:12] [PASSED] 59 VFs
[22:02:12] [PASSED] 60 VFs
[22:02:12] [PASSED] 61 VFs
[22:02:12] [PASSED] 62 VFs
[22:02:12] [PASSED] 63 VFs
[22:02:12] ==================== [PASSED] fair_ggtt ====================
[22:02:12] ======================== fair_vram ========================
[22:02:12] [PASSED] 1 VF
[22:02:12] [PASSED] 2 VFs
[22:02:12] [PASSED] 3 VFs
[22:02:12] [PASSED] 4 VFs
[22:02:12] [PASSED] 5 VFs
[22:02:12] [PASSED] 6 VFs
[22:02:12] [PASSED] 7 VFs
[22:02:12] [PASSED] 8 VFs
[22:02:12] [PASSED] 9 VFs
[22:02:12] [PASSED] 10 VFs
[22:02:12] [PASSED] 11 VFs
[22:02:12] [PASSED] 12 VFs
[22:02:12] [PASSED] 13 VFs
[22:02:12] [PASSED] 14 VFs
[22:02:12] [PASSED] 15 VFs
[22:02:12] [PASSED] 16 VFs
[22:02:12] [PASSED] 17 VFs
[22:02:12] [PASSED] 18 VFs
[22:02:12] [PASSED] 19 VFs
[22:02:12] [PASSED] 20 VFs
[22:02:12] [PASSED] 21 VFs
[22:02:12] [PASSED] 22 VFs
[22:02:12] [PASSED] 23 VFs
[22:02:12] [PASSED] 24 VFs
[22:02:12] [PASSED] 25 VFs
[22:02:12] [PASSED] 26 VFs
[22:02:12] [PASSED] 27 VFs
[22:02:12] [PASSED] 28 VFs
[22:02:12] [PASSED] 29 VFs
[22:02:12] [PASSED] 30 VFs
[22:02:12] [PASSED] 31 VFs
[22:02:12] [PASSED] 32 VFs
[22:02:12] [PASSED] 33 VFs
[22:02:12] [PASSED] 34 VFs
[22:02:12] [PASSED] 35 VFs
[22:02:12] [PASSED] 36 VFs
[22:02:12] [PASSED] 37 VFs
[22:02:12] [PASSED] 38 VFs
[22:02:12] [PASSED] 39 VFs
[22:02:12] [PASSED] 40 VFs
[22:02:12] [PASSED] 41 VFs
[22:02:12] [PASSED] 42 VFs
[22:02:12] [PASSED] 43 VFs
[22:02:12] [PASSED] 44 VFs
[22:02:12] [PASSED] 45 VFs
[22:02:12] [PASSED] 46 VFs
[22:02:12] [PASSED] 47 VFs
[22:02:12] [PASSED] 48 VFs
[22:02:12] [PASSED] 49 VFs
[22:02:12] [PASSED] 50 VFs
[22:02:12] [PASSED] 51 VFs
[22:02:12] [PASSED] 52 VFs
[22:02:12] [PASSED] 53 VFs
[22:02:12] [PASSED] 54 VFs
[22:02:12] [PASSED] 55 VFs
[22:02:12] [PASSED] 56 VFs
[22:02:12] [PASSED] 57 VFs
[22:02:12] [PASSED] 58 VFs
[22:02:12] [PASSED] 59 VFs
[22:02:12] [PASSED] 60 VFs
[22:02:12] [PASSED] 61 VFs
[22:02:12] [PASSED] 62 VFs
[22:02:12] [PASSED] 63 VFs
[22:02:12] ==================== [PASSED] fair_vram ====================
[22:02:12] ================== [PASSED] pf_gt_config ===================
[22:02:12] ===================== lmtt (1 subtest) =====================
[22:02:12] ======================== test_ops =========================
[22:02:12] [PASSED] 2-level
[22:02:12] [PASSED] multi-level
[22:02:12] ==================== [PASSED] test_ops =====================
[22:02:12] ====================== [PASSED] lmtt =======================
[22:02:12] ================= sriov_packet (1 subtest) =================
[22:02:12] [PASSED] test_descriptor_init
[22:02:12] ================== [PASSED] sriov_packet ===================
[22:02:12] ================= pf_service (11 subtests) =================
[22:02:12] [PASSED] pf_negotiate_any
[22:02:12] [PASSED] pf_negotiate_base_match
[22:02:12] [PASSED] pf_negotiate_base_newer
[22:02:12] [PASSED] pf_negotiate_base_next
[22:02:12] [SKIPPED] pf_negotiate_base_older (no older minor)
[22:02:12] [PASSED] pf_negotiate_base_prev
[22:02:12] [PASSED] pf_negotiate_latest_match
[22:02:12] [PASSED] pf_negotiate_latest_newer
[22:02:12] [PASSED] pf_negotiate_latest_next
[22:02:12] [SKIPPED] pf_negotiate_latest_older (no older minor)
[22:02:12] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[22:02:12] =================== [PASSED] pf_service ====================
[22:02:12] ================= xe_guc_g2g (2 subtests) ==================
[22:02:12] ============== xe_live_guc_g2g_kunit_default ==============
[22:02:12] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:02:12] ============== xe_live_guc_g2g_kunit_allmem ===============
[22:02:12] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:02:12] =================== [SKIPPED] xe_guc_g2g ===================
[22:02:12] =================== xe_mocs (2 subtests) ===================
[22:02:12] ================ xe_live_mocs_kernel_kunit ================
[22:02:12] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:02:12] ================ xe_live_mocs_reset_kunit =================
[22:02:12] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:02:12] ==================== [SKIPPED] xe_mocs =====================
[22:02:12] ================= xe_migrate (2 subtests) ==================
[22:02:12] ================= xe_migrate_sanity_kunit =================
[22:02:12] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:02:12] ================== xe_validate_ccs_kunit ==================
[22:02:12] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:02:12] =================== [SKIPPED] xe_migrate ===================
[22:02:12] ================== xe_dma_buf (1 subtest) ==================
[22:02:12] ==================== xe_dma_buf_kunit =====================
[22:02:12] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:02:12] =================== [SKIPPED] xe_dma_buf ===================
[22:02:12] ================= xe_bo_shrink (1 subtest) =================
[22:02:12] =================== xe_bo_shrink_kunit ====================
[22:02:12] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:02:12] ================== [SKIPPED] xe_bo_shrink ==================
[22:02:12] ==================== xe_bo (2 subtests) ====================
[22:02:12] ================== xe_ccs_migrate_kunit ===================
[22:02:12] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:02:12] ==================== xe_bo_evict_kunit ====================
[22:02:12] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:02:12] ===================== [SKIPPED] xe_bo ======================
[22:02:12] ==================== args (13 subtests) ====================
[22:02:12] [PASSED] count_args_test
[22:02:12] [PASSED] call_args_example
[22:02:12] [PASSED] call_args_test
[22:02:12] [PASSED] drop_first_arg_example
[22:02:12] [PASSED] drop_first_arg_test
[22:02:12] [PASSED] first_arg_example
[22:02:12] [PASSED] first_arg_test
[22:02:12] [PASSED] last_arg_example
[22:02:12] [PASSED] last_arg_test
[22:02:12] [PASSED] pick_arg_example
[22:02:12] [PASSED] if_args_example
[22:02:12] [PASSED] if_args_test
[22:02:12] [PASSED] sep_comma_example
[22:02:12] ====================== [PASSED] args =======================
[22:02:12] =================== xe_pci (3 subtests) ====================
[22:02:12] ==================== check_graphics_ip ====================
[22:02:12] [PASSED] 12.00 Xe_LP
[22:02:12] [PASSED] 12.10 Xe_LP+
[22:02:12] [PASSED] 12.55 Xe_HPG
[22:02:12] [PASSED] 12.60 Xe_HPC
[22:02:12] [PASSED] 12.70 Xe_LPG
[22:02:12] [PASSED] 12.71 Xe_LPG
[22:02:12] [PASSED] 12.74 Xe_LPG+
[22:02:12] [PASSED] 20.01 Xe2_HPG
[22:02:12] [PASSED] 20.02 Xe2_HPG
[22:02:12] [PASSED] 20.04 Xe2_LPG
[22:02:12] [PASSED] 30.00 Xe3_LPG
[22:02:12] [PASSED] 30.01 Xe3_LPG
[22:02:12] [PASSED] 30.03 Xe3_LPG
[22:02:12] [PASSED] 30.04 Xe3_LPG
[22:02:12] [PASSED] 30.05 Xe3_LPG
[22:02:12] [PASSED] 35.10 Xe3p_LPG
[22:02:12] [PASSED] 35.11 Xe3p_XPC
[22:02:12] ================ [PASSED] check_graphics_ip ================
[22:02:12] ===================== check_media_ip ======================
[22:02:12] [PASSED] 12.00 Xe_M
[22:02:12] [PASSED] 12.55 Xe_HPM
[22:02:12] [PASSED] 13.00 Xe_LPM+
[22:02:12] [PASSED] 13.01 Xe2_HPM
[22:02:12] [PASSED] 20.00 Xe2_LPM
[22:02:12] [PASSED] 30.00 Xe3_LPM
[22:02:12] [PASSED] 30.02 Xe3_LPM
[22:02:12] [PASSED] 35.00 Xe3p_LPM
[22:02:12] [PASSED] 35.03 Xe3p_HPM
[22:02:12] ================= [PASSED] check_media_ip ==================
[22:02:12] =================== check_platform_desc ===================
[22:02:12] [PASSED] 0x9A60 (TIGERLAKE)
[22:02:12] [PASSED] 0x9A68 (TIGERLAKE)
[22:02:12] [PASSED] 0x9A70 (TIGERLAKE)
[22:02:12] [PASSED] 0x9A40 (TIGERLAKE)
[22:02:12] [PASSED] 0x9A49 (TIGERLAKE)
[22:02:12] [PASSED] 0x9A59 (TIGERLAKE)
[22:02:12] [PASSED] 0x9A78 (TIGERLAKE)
[22:02:12] [PASSED] 0x9AC0 (TIGERLAKE)
[22:02:12] [PASSED] 0x9AC9 (TIGERLAKE)
[22:02:12] [PASSED] 0x9AD9 (TIGERLAKE)
[22:02:12] [PASSED] 0x9AF8 (TIGERLAKE)
[22:02:12] [PASSED] 0x4C80 (ROCKETLAKE)
[22:02:12] [PASSED] 0x4C8A (ROCKETLAKE)
[22:02:12] [PASSED] 0x4C8B (ROCKETLAKE)
[22:02:12] [PASSED] 0x4C8C (ROCKETLAKE)
[22:02:12] [PASSED] 0x4C90 (ROCKETLAKE)
[22:02:12] [PASSED] 0x4C9A (ROCKETLAKE)
[22:02:12] [PASSED] 0x4680 (ALDERLAKE_S)
[22:02:12] [PASSED] 0x4682 (ALDERLAKE_S)
[22:02:12] [PASSED] 0x4688 (ALDERLAKE_S)
[22:02:12] [PASSED] 0x468A (ALDERLAKE_S)
[22:02:12] [PASSED] 0x468B (ALDERLAKE_S)
[22:02:12] [PASSED] 0x4690 (ALDERLAKE_S)
[22:02:12] [PASSED] 0x4692 (ALDERLAKE_S)
[22:02:12] [PASSED] 0x4693 (ALDERLAKE_S)
[22:02:12] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46AA (ALDERLAKE_P)
[22:02:12] [PASSED] 0x462A (ALDERLAKE_P)
[22:02:12] [PASSED] 0x4626 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x4628 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:02:12] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:02:12] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:02:12] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:02:12] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:02:12] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:02:12] [PASSED] 0xA721 (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA720 (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:02:12] [PASSED] 0xA780 (ALDERLAKE_S)
[22:02:12] [PASSED] 0xA781 (ALDERLAKE_S)
[22:02:12] [PASSED] 0xA782 (ALDERLAKE_S)
[22:02:12] [PASSED] 0xA783 (ALDERLAKE_S)
[22:02:12] [PASSED] 0xA788 (ALDERLAKE_S)
[22:02:12] [PASSED] 0xA789 (ALDERLAKE_S)
[22:02:12] [PASSED] 0xA78A (ALDERLAKE_S)
[22:02:12] [PASSED] 0xA78B (ALDERLAKE_S)
[22:02:12] [PASSED] 0x4905 (DG1)
[22:02:12] [PASSED] 0x4906 (DG1)
[22:02:12] [PASSED] 0x4907 (DG1)
[22:02:12] [PASSED] 0x4908 (DG1)
[22:02:12] [PASSED] 0x4909 (DG1)
[22:02:12] [PASSED] 0x56C0 (DG2)
[22:02:12] [PASSED] 0x56C2 (DG2)
[22:02:12] [PASSED] 0x56C1 (DG2)
[22:02:12] [PASSED] 0x7D51 (METEORLAKE)
[22:02:12] [PASSED] 0x7DD1 (METEORLAKE)
[22:02:12] [PASSED] 0x7D41 (METEORLAKE)
[22:02:12] [PASSED] 0x7D67 (METEORLAKE)
[22:02:12] [PASSED] 0xB640 (METEORLAKE)
[22:02:12] [PASSED] 0x56A0 (DG2)
[22:02:12] [PASSED] 0x56A1 (DG2)
[22:02:12] [PASSED] 0x56A2 (DG2)
[22:02:12] [PASSED] 0x56BE (DG2)
[22:02:12] [PASSED] 0x56BF (DG2)
[22:02:12] [PASSED] 0x5690 (DG2)
[22:02:12] [PASSED] 0x5691 (DG2)
[22:02:12] [PASSED] 0x5692 (DG2)
[22:02:12] [PASSED] 0x56A5 (DG2)
[22:02:12] [PASSED] 0x56A6 (DG2)
[22:02:12] [PASSED] 0x56B0 (DG2)
[22:02:12] [PASSED] 0x56B1 (DG2)
[22:02:12] [PASSED] 0x56BA (DG2)
[22:02:12] [PASSED] 0x56BB (DG2)
[22:02:12] [PASSED] 0x56BC (DG2)
[22:02:12] [PASSED] 0x56BD (DG2)
[22:02:12] [PASSED] 0x5693 (DG2)
[22:02:12] [PASSED] 0x5694 (DG2)
[22:02:12] [PASSED] 0x5695 (DG2)
[22:02:12] [PASSED] 0x56A3 (DG2)
[22:02:12] [PASSED] 0x56A4 (DG2)
[22:02:12] [PASSED] 0x56B2 (DG2)
[22:02:12] [PASSED] 0x56B3 (DG2)
[22:02:12] [PASSED] 0x5696 (DG2)
[22:02:12] [PASSED] 0x5697 (DG2)
[22:02:12] [PASSED] 0xB69 (PVC)
[22:02:12] [PASSED] 0xB6E (PVC)
[22:02:12] [PASSED] 0xBD4 (PVC)
[22:02:12] [PASSED] 0xBD5 (PVC)
[22:02:12] [PASSED] 0xBD6 (PVC)
[22:02:12] [PASSED] 0xBD7 (PVC)
[22:02:12] [PASSED] 0xBD8 (PVC)
[22:02:12] [PASSED] 0xBD9 (PVC)
[22:02:12] [PASSED] 0xBDA (PVC)
[22:02:12] [PASSED] 0xBDB (PVC)
[22:02:12] [PASSED] 0xBE0 (PVC)
[22:02:12] [PASSED] 0xBE1 (PVC)
[22:02:12] [PASSED] 0xBE5 (PVC)
[22:02:12] [PASSED] 0x7D40 (METEORLAKE)
[22:02:12] [PASSED] 0x7D45 (METEORLAKE)
[22:02:12] [PASSED] 0x7D55 (METEORLAKE)
[22:02:12] [PASSED] 0x7D60 (METEORLAKE)
[22:02:12] [PASSED] 0x7DD5 (METEORLAKE)
[22:02:12] [PASSED] 0x6420 (LUNARLAKE)
[22:02:12] [PASSED] 0x64A0 (LUNARLAKE)
[22:02:12] [PASSED] 0x64B0 (LUNARLAKE)
[22:02:12] [PASSED] 0xE202 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE209 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE20B (BATTLEMAGE)
[22:02:12] [PASSED] 0xE20C (BATTLEMAGE)
[22:02:12] [PASSED] 0xE20D (BATTLEMAGE)
[22:02:12] [PASSED] 0xE210 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE211 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE212 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE216 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE220 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE221 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE222 (BATTLEMAGE)
[22:02:12] [PASSED] 0xE223 (BATTLEMAGE)
[22:02:12] [PASSED] 0xB080 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB081 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB082 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB083 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB084 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB085 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB086 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB087 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB08F (PANTHERLAKE)
[22:02:12] [PASSED] 0xB090 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:02:12] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:02:12] [PASSED] 0xFD80 (PANTHERLAKE)
[22:02:12] [PASSED] 0xFD81 (PANTHERLAKE)
[22:02:12] [PASSED] 0xD740 (NOVALAKE_S)
[22:02:12] [PASSED] 0xD741 (NOVALAKE_S)
[22:02:12] [PASSED] 0xD742 (NOVALAKE_S)
[22:02:12] [PASSED] 0xD743 (NOVALAKE_S)
[22:02:12] [PASSED] 0xD745 (NOVALAKE_S)
[22:02:12] [PASSED] 0xD74A (NOVALAKE_S)
[22:02:12] [PASSED] 0xD74B (NOVALAKE_S)
[22:02:12] [PASSED] 0x674C (CRESCENTISLAND)
[22:02:12] [PASSED] 0x674D (CRESCENTISLAND)
[22:02:12] [PASSED] 0x674E (CRESCENTISLAND)
[22:02:12] [PASSED] 0x674F (CRESCENTISLAND)
[22:02:12] [PASSED] 0x6750 (CRESCENTISLAND)
[22:02:12] [PASSED] 0xD750 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD751 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD752 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD753 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD754 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD755 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD756 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD757 (NOVALAKE_P)
[22:02:12] [PASSED] 0xD75F (NOVALAKE_P)
[22:02:12] =============== [PASSED] check_platform_desc ===============
[22:02:12] ===================== [PASSED] xe_pci ======================
[22:02:12] ============= xe_rtp_tables_test (5 subtests) ==============
[22:02:12] ================== xe_rtp_table_gt_test ===================
[22:02:12] [PASSED] gt_was/14011060649
[22:02:12] [PASSED] gt_was/14011059788
[22:02:12] [PASSED] gt_was/14015795083
[22:02:12] [PASSED] gt_was/16021867713
[22:02:12] [PASSED] gt_was/14019449301
[22:02:12] [PASSED] gt_was/16028005424
[22:02:12] [PASSED] gt_was/14026578760
[22:02:12] [PASSED] gt_was/1409420604
[22:02:12] [PASSED] gt_was/1408615072
[22:02:12] [PASSED] gt_was/22010523718
[22:02:12] [PASSED] gt_was/14011006942
[22:02:12] [PASSED] gt_was/14014830051
[22:02:12] [PASSED] gt_was/18018781329
[22:02:12] [PASSED] gt_was/1509235366
[22:02:12] [PASSED] gt_was/18018781329
[22:02:12] [PASSED] gt_was/16016694945
[22:02:12] [PASSED] gt_was/14018575942
[22:02:12] [PASSED] gt_was/22016670082
[22:02:12] [PASSED] gt_was/22016670082
[22:02:12] [PASSED] gt_was/14017421178
[22:02:12] [PASSED] gt_was/16025250150
[22:02:12] [PASSED] gt_was/14021871409
[22:02:12] [PASSED] gt_was/16021865536
[22:02:12] [PASSED] gt_was/14021486841
[22:02:12] [PASSED] gt_was/14025160223
[22:02:12] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[22:02:12] [PASSED] gt_was/14025635424
[22:02:12] [PASSED] gt_was/16028005424
[22:02:12] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:02:12] ================== xe_rtp_table_gt_test ===================
[22:02:12] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[22:02:12] [PASSED] gt_tunings/Tuning: 32B Access Enable
[22:02:12] [PASSED] gt_tunings/Tuning: L3 cache
[22:02:12] [PASSED] gt_tunings/Tuning: L3 cache - media
[22:02:12] [PASSED] gt_tunings/Tuning: Compression Overfetch
[22:02:12] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[22:02:12] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[22:02:12] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[22:02:12] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[22:02:12] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[22:02:12] [PASSED] gt_tunings/Tuning: Stateless compression control
[22:02:12] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[22:02:12] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[22:02:12] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[22:02:12] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[22:02:12] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:02:12] ================== xe_rtp_table_oob_test ==================
[22:02:12] [PASSED] oob_was/1607983814
[22:02:12] [PASSED] oob_was/16010904313
[22:02:12] [PASSED] oob_was/18022495364
[22:02:12] [PASSED] oob_was/22012773006
[22:02:12] [PASSED] oob_was/14014475959
[22:02:12] [PASSED] oob_was/22011391025
[22:02:12] [PASSED] oob_was/22012727170
[22:02:12] [PASSED] oob_was/22012727685
[22:02:12] [PASSED] oob_was/22016596838
[22:02:12] [PASSED] oob_was/18020744125
[22:02:12] [PASSED] oob_was/1409600907
[22:02:12] [PASSED] oob_was/22014953428
[22:02:12] [PASSED] oob_was/16017236439
[22:02:12] [PASSED] oob_was/14019821291
[22:02:12] [PASSED] oob_was/14015076503
[22:02:12] [PASSED] oob_was/14018913170
[22:02:12] [PASSED] oob_was/14018094691
[22:02:12] [PASSED] oob_was/18024947630
[22:02:12] [PASSED] oob_was/16022287689
[22:02:12] [PASSED] oob_was/13011645652
[22:02:12] [PASSED] oob_was/14022293748
[22:02:12] [PASSED] oob_was/22019794406
[22:02:12] [PASSED] oob_was/22019338487
[22:02:12] [PASSED] oob_was/16023588340
[22:02:12] [PASSED] oob_was/14019789679
[22:02:12] [PASSED] oob_was/14022866841
[22:02:12] [PASSED] oob_was/16021333562
[22:02:12] [PASSED] oob_was/14016712196
[22:02:12] [PASSED] oob_was/14015568240
[22:02:12] [PASSED] oob_was/18013179988
[22:02:12] [PASSED] oob_was/1508761755
[22:02:12] [PASSED] oob_was/16023105232
[22:02:12] [PASSED] oob_was/16026508708
[22:02:12] [PASSED] oob_was/14020001231
[22:02:12] [PASSED] oob_was/16023683509
[22:02:12] [PASSED] oob_was/14025515070
[22:02:12] [PASSED] oob_was/15015404425_disable
[22:02:12] [PASSED] oob_was/16026007364
[22:02:12] [PASSED] oob_was/14020316580
[22:02:12] [PASSED] oob_was/14025883347
[22:02:12] [PASSED] oob_was/16029380221
[22:02:12] [PASSED] oob_was/22022079272
[22:02:12] [PASSED] oob_was/16029897822
[22:02:12] [PASSED] oob_was/14027054324
[22:02:12] ============== [PASSED] xe_rtp_table_oob_test ==============
[22:02:12] ================ xe_rtp_table_dev_oob_test ================
[22:02:12] [PASSED] device_oob_was/22010954014
[22:02:12] [PASSED] device_oob_was/15015404425
[22:02:12] [PASSED] device_oob_was/22019338487_display
[22:02:12] [PASSED] device_oob_was/14022085890
[22:02:12] [PASSED] device_oob_was/14026539277
[22:02:12] [PASSED] device_oob_was/14026633728
[22:02:12] [PASSED] device_oob_was/14026746987
[22:02:12] [PASSED] device_oob_was/14026779378
[22:02:12] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[22:02:12] ========== xe_rtp_table_missing_upper_bound_test ==========
[22:02:12] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[22:02:12] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[22:02:12] [PASSED] register_whitelist/1806527549
[22:02:12] [PASSED] register_whitelist/allow_read_ctx_timestamp
[22:02:12] [PASSED] register_whitelist/allow_read_queue_timestamp
[22:02:12] [PASSED] register_whitelist/16014440446
[22:02:12] [PASSED] register_whitelist/16017236439
[22:02:12] [PASSED] register_whitelist/16020183090
[22:02:12] [PASSED] register_whitelist/14024997852
[22:02:12] [PASSED] register_whitelist/14024997852
[22:02:12] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[22:02:12] =============== [PASSED] xe_rtp_tables_test ================
[22:02:12] =================== xe_rtp (3 subtests) ====================
[22:02:12] =================== xe_rtp_rules_tests ====================
[22:02:12] [PASSED] no
[22:02:12] [PASSED] yes
[22:02:12] [PASSED] no-and-no
[22:02:12] [PASSED] no-and-yes
[22:02:12] [PASSED] yes-and-no
[22:02:12] [PASSED] yes-and-yes
[22:02:12] [PASSED] no-or-no
[22:02:12] [PASSED] no-or-yes
[22:02:12] [PASSED] yes-or-no
[22:02:12] [PASSED] yes-or-yes
[22:02:12] [PASSED] no-yes-or-yes-no
[22:02:12] [PASSED] no-yes-or-yes-yes
[22:02:12] [PASSED] yes-yes-or-no-yes
[22:02:12] [PASSED] yes-yes-or-yes-yes
[22:02:12] [PASSED] no-no-or-yes-or-no
[22:02:12] [PASSED] or
[22:02:12] [PASSED] or-yes
[22:02:12] [PASSED] or-no
[22:02:12] [PASSED] yes-or
[22:02:12] [PASSED] no-or
[22:02:12] [PASSED] no-or-or-yes
[22:02:12] [PASSED] yes-or-or-no
[22:02:12] [PASSED] no-or-or-no
[22:02:12] [PASSED] missing-context-engine-class
[22:02:12] [PASSED] missing-context-engine-class-or-yes
[22:02:12] [PASSED] missing-context-engine-class-or-or-yes
[22:02:12] =============== [PASSED] xe_rtp_rules_tests ================
[22:02:12] =============== xe_rtp_process_to_sr_tests ================
[22:02:12] [PASSED] coalesce-same-reg
[22:02:12] [PASSED] coalesce-same-reg-literal-and-func
[22:02:12] [PASSED] no-match-no-add
[22:02:12] [PASSED] two-regs-two-entries
[22:02:12] [PASSED] clr-one-set-other
[22:02:12] [PASSED] set-field
[22:02:12] [PASSED] conflict-duplicate
[22:02:12] [PASSED] conflict-not-disjoint
[22:02:12] [PASSED] conflict-not-disjoint-literal-and-func
[22:02:12] [PASSED] conflict-reg-type
[22:02:12] [PASSED] bad-mcr-reg-forced-to-regular
[22:02:12] [PASSED] bad-regular-reg-forced-to-mcr
[22:02:12] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:02:12] ================== xe_rtp_process_tests ===================
[22:02:12] [PASSED] active1
[22:02:12] [PASSED] active2
[22:02:12] [PASSED] active-inactive
[22:02:12] [PASSED] inactive-active
[22:02:12] [PASSED] inactive-active-inactive
[22:02:12] [PASSED] inactive-inactive-inactive
[22:02:12] ============== [PASSED] xe_rtp_process_tests ===============
[22:02:12] ===================== [PASSED] xe_rtp ======================
[22:02:12] ==================== xe_wa (1 subtest) =====================
[22:02:12] ======================== xe_wa_gt =========================
[22:02:12] [PASSED] TIGERLAKE B0
[22:02:12] [PASSED] DG1 A0
[22:02:12] [PASSED] DG1 B0
[22:02:12] [PASSED] ALDERLAKE_S A0
[22:02:12] [PASSED] ALDERLAKE_S B0
[22:02:12] [PASSED] ALDERLAKE_S C0
[22:02:12] [PASSED] ALDERLAKE_S D0
[22:02:12] [PASSED] ALDERLAKE_P A0
[22:02:12] [PASSED] ALDERLAKE_P B0
[22:02:12] [PASSED] ALDERLAKE_P C0
[22:02:12] [PASSED] ALDERLAKE_S RPLS D0
[22:02:12] [PASSED] ALDERLAKE_P RPLU E0
[22:02:12] [PASSED] DG2 G10 C0
[22:02:12] [PASSED] DG2 G11 B1
[22:02:12] [PASSED] DG2 G12 A1
[22:02:12] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:02:12] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:02:12] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:02:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:02:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:02:12] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:02:12] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:02:12] ==================== [PASSED] xe_wa_gt =====================
[22:02:12] ====================== [PASSED] xe_wa ======================
[22:02:12] ============================================================
[22:02:12] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[22:02:12] Elapsed time: 35.596s total, 1.760s configuring, 33.165s building, 0.647s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:02:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:02:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:02:39] Starting KUnit Kernel (1/1)...
[22:02:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:02:39] ============ drm_test_pick_cmdline (2 subtests) ============
[22:02:39] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:02:39] =============== drm_test_pick_cmdline_named ===============
[22:02:39] [PASSED] NTSC
[22:02:39] [PASSED] NTSC-J
[22:02:39] [PASSED] PAL
[22:02:39] [PASSED] PAL-M
[22:02:39] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:02:39] ============== [PASSED] drm_test_pick_cmdline ==============
[22:02:39] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:02:39] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:02:39] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:02:39] =========== drm_validate_clone_mode (2 subtests) ===========
[22:02:39] ============== drm_test_check_in_clone_mode ===============
[22:02:39] [PASSED] in_clone_mode
[22:02:39] [PASSED] not_in_clone_mode
[22:02:39] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:02:39] =============== drm_test_check_valid_clones ===============
[22:02:39] [PASSED] not_in_clone_mode
[22:02:39] [PASSED] valid_clone
[22:02:39] [PASSED] invalid_clone
[22:02:39] =========== [PASSED] drm_test_check_valid_clones ===========
[22:02:39] ============= [PASSED] drm_validate_clone_mode =============
[22:02:39] ============= drm_validate_modeset (1 subtest) =============
[22:02:39] [PASSED] drm_test_check_connector_changed_modeset
[22:02:39] ============== [PASSED] drm_validate_modeset ===============
[22:02:39] ====== drm_test_bridge_get_current_state (1 subtest) =======
[22:02:39] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:02:39] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:02:39] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:02:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:02:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:02:39] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[22:02:39] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:02:39] ============== drm_bridge_alloc (2 subtests) ===============
[22:02:39] [PASSED] drm_test_drm_bridge_alloc_basic
[22:02:39] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:02:39] ================ [PASSED] drm_bridge_alloc =================
[22:02:39] ============= drm_bridge_bus_fmt (5 subtests) ==============
[22:02:39] [PASSED] drm_test_bridge_rgb_yuv_rgb
[22:02:39] [PASSED] drm_test_bridge_must_convert_to_yuv444
[22:02:39] [PASSED] drm_test_bridge_hdmi_auto_rgb
[22:02:39] [PASSED] drm_test_bridge_auto_first
[22:02:39] [PASSED] drm_test_bridge_rgb_yuv_no_path
[22:02:39] =============== [PASSED] drm_bridge_bus_fmt ================
[22:02:39] ============= drm_cmdline_parser (40 subtests) =============
[22:02:39] [PASSED] drm_test_cmdline_force_d_only
[22:02:39] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:02:39] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:02:39] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:02:39] [PASSED] drm_test_cmdline_force_e_only
[22:02:39] [PASSED] drm_test_cmdline_res
[22:02:39] [PASSED] drm_test_cmdline_res_vesa
[22:02:39] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:02:39] [PASSED] drm_test_cmdline_res_rblank
[22:02:39] [PASSED] drm_test_cmdline_res_bpp
[22:02:39] [PASSED] drm_test_cmdline_res_refresh
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:02:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:02:39] [PASSED] drm_test_cmdline_res_margins_force_on
[22:02:39] [PASSED] drm_test_cmdline_res_vesa_margins
[22:02:39] [PASSED] drm_test_cmdline_name
[22:02:39] [PASSED] drm_test_cmdline_name_bpp
[22:02:39] [PASSED] drm_test_cmdline_name_option
[22:02:39] [PASSED] drm_test_cmdline_name_bpp_option
[22:02:39] [PASSED] drm_test_cmdline_rotate_0
[22:02:39] [PASSED] drm_test_cmdline_rotate_90
[22:02:39] [PASSED] drm_test_cmdline_rotate_180
[22:02:39] [PASSED] drm_test_cmdline_rotate_270
[22:02:39] [PASSED] drm_test_cmdline_hmirror
[22:02:39] [PASSED] drm_test_cmdline_vmirror
[22:02:39] [PASSED] drm_test_cmdline_margin_options
[22:02:39] [PASSED] drm_test_cmdline_multiple_options
[22:02:39] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:02:39] [PASSED] drm_test_cmdline_extra_and_option
[22:02:39] [PASSED] drm_test_cmdline_freestanding_options
[22:02:39] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:02:39] [PASSED] drm_test_cmdline_panel_orientation
[22:02:39] ================ drm_test_cmdline_invalid =================
[22:02:39] [PASSED] margin_only
[22:02:39] [PASSED] interlace_only
[22:02:39] [PASSED] res_missing_x
[22:02:39] [PASSED] res_missing_y
[22:02:39] [PASSED] res_bad_y
[22:02:39] [PASSED] res_missing_y_bpp
[22:02:39] [PASSED] res_bad_bpp
[22:02:39] [PASSED] res_bad_refresh
[22:02:39] [PASSED] res_bpp_refresh_force_on_off
[22:02:39] [PASSED] res_invalid_mode
[22:02:39] [PASSED] res_bpp_wrong_place_mode
[22:02:39] [PASSED] name_bpp_refresh
[22:02:39] [PASSED] name_refresh
[22:02:39] [PASSED] name_refresh_wrong_mode
[22:02:39] [PASSED] name_refresh_invalid_mode
[22:02:39] [PASSED] rotate_multiple
[22:02:39] [PASSED] rotate_invalid_val
[22:02:39] [PASSED] rotate_truncated
[22:02:39] [PASSED] invalid_option
[22:02:39] [PASSED] invalid_tv_option
[22:02:39] [PASSED] truncated_tv_option
[22:02:39] ============ [PASSED] drm_test_cmdline_invalid =============
[22:02:39] =============== drm_test_cmdline_tv_options ===============
[22:02:39] [PASSED] NTSC
[22:02:39] [PASSED] NTSC_443
[22:02:39] [PASSED] NTSC_J
[22:02:39] [PASSED] PAL
[22:02:39] [PASSED] PAL_M
[22:02:39] [PASSED] PAL_N
[22:02:39] [PASSED] SECAM
[22:02:39] [PASSED] MONO_525
[22:02:39] [PASSED] MONO_625
[22:02:39] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:02:39] =============== [PASSED] drm_cmdline_parser ================
[22:02:39] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:02:39] [PASSED] drm_test_connector_hdmi_init_valid
[22:02:39] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:02:39] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:02:39] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:02:39] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:02:39] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:02:39] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:02:39] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:02:39] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:02:39] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:02:39] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:02:39] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:02:39] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:02:39] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:02:39] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:02:39] [PASSED] drm_test_connector_hdmi_init_null_product
[22:02:39] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:02:39] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:02:39] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:02:39] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:02:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:02:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:02:39] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:02:39] ========= drm_test_connector_hdmi_init_type_valid =========
[22:02:39] [PASSED] HDMI-A
[22:02:39] [PASSED] HDMI-B
[22:02:39] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:02:39] ======== drm_test_connector_hdmi_init_type_invalid ========
[22:02:39] [PASSED] Unknown
[22:02:39] [PASSED] VGA
[22:02:39] [PASSED] DVI-I
[22:02:39] [PASSED] DVI-D
[22:02:39] [PASSED] DVI-A
[22:02:39] [PASSED] Composite
[22:02:39] [PASSED] SVIDEO
[22:02:39] [PASSED] LVDS
[22:02:39] [PASSED] Component
[22:02:39] [PASSED] DIN
[22:02:39] [PASSED] DP
[22:02:39] [PASSED] TV
[22:02:39] [PASSED] eDP
[22:02:39] [PASSED] Virtual
[22:02:39] [PASSED] DSI
[22:02:39] [PASSED] DPI
[22:02:39] [PASSED] Writeback
[22:02:39] [PASSED] SPI
[22:02:39] [PASSED] USB
[22:02:39] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:02:39] ============ [PASSED] drmm_connector_hdmi_init =============
[22:02:39] ============= drmm_connector_init (3 subtests) =============
[22:02:39] [PASSED] drm_test_drmm_connector_init
[22:02:39] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:02:39] ========= drm_test_drmm_connector_init_type_valid =========
[22:02:39] [PASSED] Unknown
[22:02:39] [PASSED] VGA
[22:02:39] [PASSED] DVI-I
[22:02:39] [PASSED] DVI-D
[22:02:39] [PASSED] DVI-A
[22:02:39] [PASSED] Composite
[22:02:39] [PASSED] SVIDEO
[22:02:39] [PASSED] LVDS
[22:02:39] [PASSED] Component
[22:02:39] [PASSED] DIN
[22:02:39] [PASSED] DP
[22:02:39] [PASSED] HDMI-A
[22:02:39] [PASSED] HDMI-B
[22:02:39] [PASSED] TV
[22:02:39] [PASSED] eDP
[22:02:39] [PASSED] Virtual
[22:02:39] [PASSED] DSI
[22:02:39] [PASSED] DPI
[22:02:39] [PASSED] Writeback
[22:02:39] [PASSED] SPI
[22:02:39] [PASSED] USB
[22:02:39] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:02:39] =============== [PASSED] drmm_connector_init ===============
[22:02:39] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_init
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:02:39] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[22:02:39] [PASSED] Unknown
[22:02:39] [PASSED] VGA
[22:02:39] [PASSED] DVI-I
[22:02:39] [PASSED] DVI-D
[22:02:39] [PASSED] DVI-A
[22:02:39] [PASSED] Composite
[22:02:39] [PASSED] SVIDEO
[22:02:39] [PASSED] LVDS
[22:02:39] [PASSED] Component
[22:02:39] [PASSED] DIN
[22:02:39] [PASSED] DP
[22:02:39] [PASSED] HDMI-A
[22:02:39] [PASSED] HDMI-B
[22:02:39] [PASSED] TV
[22:02:39] [PASSED] eDP
[22:02:39] [PASSED] Virtual
[22:02:39] [PASSED] DSI
[22:02:39] [PASSED] DPI
[22:02:39] [PASSED] Writeback
[22:02:39] [PASSED] SPI
[22:02:39] [PASSED] USB
[22:02:39] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:02:39] ======== drm_test_drm_connector_dynamic_init_name =========
[22:02:39] [PASSED] Unknown
[22:02:39] [PASSED] VGA
[22:02:39] [PASSED] DVI-I
[22:02:39] [PASSED] DVI-D
[22:02:39] [PASSED] DVI-A
[22:02:39] [PASSED] Composite
[22:02:39] [PASSED] SVIDEO
[22:02:39] [PASSED] LVDS
[22:02:39] [PASSED] Component
[22:02:39] [PASSED] DIN
[22:02:39] [PASSED] DP
[22:02:39] [PASSED] HDMI-A
[22:02:39] [PASSED] HDMI-B
[22:02:39] [PASSED] TV
[22:02:39] [PASSED] eDP
[22:02:39] [PASSED] Virtual
[22:02:39] [PASSED] DSI
[22:02:39] [PASSED] DPI
[22:02:39] [PASSED] Writeback
[22:02:39] [PASSED] SPI
[22:02:39] [PASSED] USB
[22:02:39] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:02:39] =========== [PASSED] drm_connector_dynamic_init ============
[22:02:39] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:02:39] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:02:39] ======= drm_connector_dynamic_register (7 subtests) ========
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:02:39] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:02:39] ========= [PASSED] drm_connector_dynamic_register ==========
[22:02:39] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:02:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:02:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:02:39] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:02:39] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:02:39] ========== drm_test_get_tv_mode_from_name_valid ===========
[22:02:39] [PASSED] NTSC
[22:02:39] [PASSED] NTSC-443
[22:02:39] [PASSED] NTSC-J
[22:02:39] [PASSED] PAL
[22:02:39] [PASSED] PAL-M
[22:02:39] [PASSED] PAL-N
[22:02:39] [PASSED] SECAM
[22:02:39] [PASSED] Mono
[22:02:39] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:02:39] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:02:39] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:02:39] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:02:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:02:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:02:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:02:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:02:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:02:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:02:39] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[22:02:39] [PASSED] VIC 96
[22:02:39] [PASSED] VIC 97
[22:02:39] [PASSED] VIC 101
[22:02:39] [PASSED] VIC 102
[22:02:39] [PASSED] VIC 106
[22:02:39] [PASSED] VIC 107
[22:02:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:02:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:02:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:02:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:02:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:02:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:02:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:02:39] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:02:39] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[22:02:39] [PASSED] Automatic
[22:02:39] [PASSED] Full
[22:02:39] [PASSED] Limited 16:235
[22:02:39] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:02:39] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:02:39] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:02:39] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:02:39] === drm_test_drm_hdmi_connector_get_output_format_name ====
[22:02:39] [PASSED] RGB
[22:02:39] [PASSED] YUV 4:2:0
[22:02:39] [PASSED] YUV 4:2:2
[22:02:39] [PASSED] YUV 4:4:4
[22:02:39] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:02:39] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:02:39] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:02:39] ============= drm_damage_helper (21 subtests) ==============
[22:02:39] [PASSED] drm_test_damage_iter_no_damage
[22:02:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:02:39] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:02:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:02:39] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:02:39] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:02:39] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:02:39] [PASSED] drm_test_damage_iter_simple_damage
[22:02:39] [PASSED] drm_test_damage_iter_single_damage
[22:02:39] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:02:39] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:02:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:02:39] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:02:39] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:02:39] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:02:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:02:39] [PASSED] drm_test_damage_iter_damage
[22:02:39] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:02:39] [PASSED] drm_test_damage_iter_damage_one_outside
[22:02:39] [PASSED] drm_test_damage_iter_damage_src_moved
[22:02:39] [PASSED] drm_test_damage_iter_damage_not_visible
[22:02:39] ================ [PASSED] drm_damage_helper ================
[22:02:39] ============== drm_dp_mst_helper (3 subtests) ==============
[22:02:39] ============== drm_test_dp_mst_calc_pbn_mode ==============
[22:02:39] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:02:39] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:02:39] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:02:39] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:02:39] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:02:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:02:39] ============== drm_test_dp_mst_calc_pbn_div ===============
[22:02:39] [PASSED] Link rate 2000000 lane count 4
[22:02:39] [PASSED] Link rate 2000000 lane count 2
[22:02:39] [PASSED] Link rate 2000000 lane count 1
[22:02:39] [PASSED] Link rate 1350000 lane count 4
[22:02:39] [PASSED] Link rate 1350000 lane count 2
[22:02:39] [PASSED] Link rate 1350000 lane count 1
[22:02:39] [PASSED] Link rate 1000000 lane count 4
[22:02:39] [PASSED] Link rate 1000000 lane count 2
[22:02:39] [PASSED] Link rate 1000000 lane count 1
[22:02:39] [PASSED] Link rate 810000 lane count 4
[22:02:39] [PASSED] Link rate 810000 lane count 2
[22:02:39] [PASSED] Link rate 810000 lane count 1
[22:02:39] [PASSED] Link rate 540000 lane count 4
[22:02:39] [PASSED] Link rate 540000 lane count 2
[22:02:39] [PASSED] Link rate 540000 lane count 1
[22:02:39] [PASSED] Link rate 270000 lane count 4
[22:02:39] [PASSED] Link rate 270000 lane count 2
[22:02:39] [PASSED] Link rate 270000 lane count 1
[22:02:39] [PASSED] Link rate 162000 lane count 4
[22:02:39] [PASSED] Link rate 162000 lane count 2
[22:02:39] [PASSED] Link rate 162000 lane count 1
[22:02:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:02:39] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[22:02:39] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:02:39] [PASSED] DP_POWER_UP_PHY with port number
[22:02:39] [PASSED] DP_POWER_DOWN_PHY with port number
[22:02:39] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:02:39] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:02:39] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:02:39] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:02:39] [PASSED] DP_QUERY_PAYLOAD with port number
[22:02:39] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:02:39] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:02:39] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:02:39] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:02:39] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:02:39] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:02:39] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:02:39] [PASSED] DP_REMOTE_I2C_READ with port number
[22:02:39] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:02:39] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:02:39] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:02:39] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:02:39] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:02:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:02:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:02:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:02:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:02:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:02:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:02:39] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:02:39] ================ [PASSED] drm_dp_mst_helper ================
[22:02:39] ================== drm_exec (7 subtests) ===================
[22:02:39] [PASSED] sanitycheck
[22:02:39] [PASSED] test_lock
[22:02:39] [PASSED] test_lock_unlock
[22:02:39] [PASSED] test_duplicates
[22:02:39] [PASSED] test_prepare
[22:02:39] [PASSED] test_prepare_array
[22:02:39] [PASSED] test_multiple_loops
[22:02:39] ==================== [PASSED] drm_exec =====================
[22:02:39] =========== drm_format_helper_test (17 subtests) ===========
[22:02:39] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:02:39] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:02:39] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:02:39] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:02:39] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:02:39] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:02:39] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:02:39] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:02:39] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:02:39] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:02:39] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:02:39] ============== drm_test_fb_xrgb8888_to_mono ===============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:02:39] ==================== drm_test_fb_swab =====================
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ================ [PASSED] drm_test_fb_swab =================
[22:02:39] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:02:39] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[22:02:39] [PASSED] single_pixel_source_buffer
[22:02:39] [PASSED] single_pixel_clip_rectangle
[22:02:39] [PASSED] well_known_colors
[22:02:39] [PASSED] destination_pitch
[22:02:39] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:02:39] ================= drm_test_fb_clip_offset =================
[22:02:39] [PASSED] pass through
[22:02:39] [PASSED] horizontal offset
[22:02:39] [PASSED] vertical offset
[22:02:39] [PASSED] horizontal and vertical offset
[22:02:39] [PASSED] horizontal offset (custom pitch)
[22:02:39] [PASSED] vertical offset (custom pitch)
[22:02:39] [PASSED] horizontal and vertical offset (custom pitch)
[22:02:39] ============= [PASSED] drm_test_fb_clip_offset =============
[22:02:39] =================== drm_test_fb_memcpy ====================
[22:02:39] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:02:39] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:02:39] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:02:39] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:02:39] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:02:39] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:02:39] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:02:39] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:02:39] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:02:39] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:02:39] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:02:39] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:02:39] =============== [PASSED] drm_test_fb_memcpy ================
[22:02:39] ============= [PASSED] drm_format_helper_test ==============
[22:02:39] ================= drm_format (18 subtests) =================
[22:02:39] [PASSED] drm_test_format_block_width_invalid
[22:02:39] [PASSED] drm_test_format_block_width_one_plane
[22:02:39] [PASSED] drm_test_format_block_width_two_plane
[22:02:39] [PASSED] drm_test_format_block_width_three_plane
[22:02:39] [PASSED] drm_test_format_block_width_tiled
[22:02:39] [PASSED] drm_test_format_block_height_invalid
[22:02:39] [PASSED] drm_test_format_block_height_one_plane
[22:02:39] [PASSED] drm_test_format_block_height_two_plane
[22:02:39] [PASSED] drm_test_format_block_height_three_plane
[22:02:39] [PASSED] drm_test_format_block_height_tiled
[22:02:39] [PASSED] drm_test_format_min_pitch_invalid
[22:02:39] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:02:39] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:02:39] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:02:39] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:02:39] [PASSED] drm_test_format_min_pitch_two_plane
[22:02:39] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:02:39] [PASSED] drm_test_format_min_pitch_tiled
[22:02:39] =================== [PASSED] drm_format ====================
[22:02:39] ============== drm_framebuffer (10 subtests) ===============
[22:02:39] ========== drm_test_framebuffer_check_src_coords ==========
[22:02:39] [PASSED] Success: source fits into fb
[22:02:39] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:02:39] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:02:39] [PASSED] Fail: overflowing fb with source width
[22:02:39] [PASSED] Fail: overflowing fb with source height
[22:02:39] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:02:39] [PASSED] drm_test_framebuffer_cleanup
[22:02:39] =============== drm_test_framebuffer_create ===============
[22:02:39] [PASSED] ABGR8888 normal sizes
[22:02:39] [PASSED] ABGR8888 max sizes
[22:02:39] [PASSED] ABGR8888 pitch greater than min required
[22:02:39] [PASSED] ABGR8888 pitch less than min required
[22:02:39] [PASSED] ABGR8888 Invalid width
[22:02:39] [PASSED] ABGR8888 Invalid buffer handle
[22:02:39] [PASSED] No pixel format
[22:02:39] [PASSED] ABGR8888 Width 0
[22:02:39] [PASSED] ABGR8888 Height 0
[22:02:39] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:02:39] [PASSED] ABGR8888 Large buffer offset
[22:02:39] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:02:39] [PASSED] ABGR8888 Invalid flag
[22:02:39] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:02:39] [PASSED] ABGR8888 Valid buffer modifier
[22:02:39] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:02:39] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:02:39] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:02:39] [PASSED] NV12 Normal sizes
[22:02:39] [PASSED] NV12 Max sizes
[22:02:39] [PASSED] NV12 Invalid pitch
[22:02:39] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:02:39] [PASSED] NV12 different modifier per-plane
[22:02:39] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:02:39] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:02:39] [PASSED] NV12 Modifier for inexistent plane
[22:02:39] [PASSED] NV12 Handle for inexistent plane
[22:02:39] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:02:39] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:02:39] [PASSED] YVU420 Normal sizes
[22:02:39] [PASSED] YVU420 Max sizes
[22:02:39] [PASSED] YVU420 Invalid pitch
[22:02:39] [PASSED] YVU420 Different pitches
[22:02:39] [PASSED] YVU420 Different buffer offsets/pitches
[22:02:39] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:02:39] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:02:39] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:02:39] [PASSED] YVU420 Valid modifier
[22:02:39] [PASSED] YVU420 Different modifiers per plane
[22:02:39] [PASSED] YVU420 Modifier for inexistent plane
[22:02:39] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:02:39] [PASSED] X0L2 Normal sizes
[22:02:39] [PASSED] X0L2 Max sizes
[22:02:39] [PASSED] X0L2 Invalid pitch
[22:02:39] [PASSED] X0L2 Pitch greater than minimum required
[22:02:39] [PASSED] X0L2 Handle for inexistent plane
[22:02:39] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:02:39] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:02:39] [PASSED] X0L2 Valid modifier
[22:02:39] [PASSED] X0L2 Modifier for inexistent plane
[22:02:39] =========== [PASSED] drm_test_framebuffer_create ===========
[22:02:39] [PASSED] drm_test_framebuffer_free
[22:02:39] [PASSED] drm_test_framebuffer_init
[22:02:39] [PASSED] drm_test_framebuffer_init_bad_format
[22:02:39] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:02:39] [PASSED] drm_test_framebuffer_lookup
[22:02:39] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:02:39] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:02:39] ================= [PASSED] drm_framebuffer =================
[22:02:39] ================ drm_gem_shmem (8 subtests) ================
[22:02:39] [PASSED] drm_gem_shmem_test_obj_create
[22:02:39] [PASSED] drm_gem_shmem_test_obj_create_private
[22:02:39] [PASSED] drm_gem_shmem_test_pin_pages
[22:02:39] [PASSED] drm_gem_shmem_test_vmap
[22:02:39] [PASSED] drm_gem_shmem_test_get_sg_table
[22:02:39] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:02:39] [PASSED] drm_gem_shmem_test_madvise
[22:02:39] [PASSED] drm_gem_shmem_test_purge
[22:02:39] ================== [PASSED] drm_gem_shmem ==================
[22:02:39] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:02:39] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[22:02:39] [PASSED] Automatic
[22:02:39] [PASSED] Full
[22:02:39] [PASSED] Limited 16:235
[22:02:39] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:02:39] [PASSED] drm_test_check_disable_connector
[22:02:39] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:02:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:02:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:02:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:02:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:02:39] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:02:39] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:02:39] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:02:39] [PASSED] drm_test_check_output_bpc_dvi
[22:02:39] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:02:39] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:02:39] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:02:39] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:02:39] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:02:39] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:02:39] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:02:39] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:02:39] ============ drm_test_check_hdmi_color_format =============
[22:02:39] [PASSED] AUTO -> RGB
[22:02:39] [PASSED] YCBCR422 -> YUV422
[22:02:39] [PASSED] YCBCR420 -> YUV420
[22:02:39] [PASSED] YCBCR444 -> YUV444
[22:02:39] [PASSED] RGB -> RGB
[22:02:39] ======== [PASSED] drm_test_check_hdmi_color_format =========
[22:02:39] ======== drm_test_check_hdmi_color_format_420_only ========
[22:02:39] [PASSED] RGB should fail
[22:02:39] [PASSED] YUV444 should fail
[22:02:39] [PASSED] YUV422 should fail
[22:02:39] [PASSED] YUV420 should work
[22:02:39] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[22:02:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:02:39] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:02:39] [PASSED] drm_test_check_broadcast_rgb_value
[22:02:39] [PASSED] drm_test_check_bpc_8_value
[22:02:39] [PASSED] drm_test_check_bpc_10_value
[22:02:39] [PASSED] drm_test_check_bpc_12_value
[22:02:39] [PASSED] drm_test_check_format_value
[22:02:39] [PASSED] drm_test_check_tmds_char_value
[22:02:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:02:39] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[22:02:39] [PASSED] drm_test_check_mode_valid
[22:02:39] [PASSED] drm_test_check_mode_valid_reject
[22:02:39] [PASSED] drm_test_check_mode_valid_reject_rate
[22:02:39] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:02:39] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[22:02:39] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[22:02:39] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[22:02:39] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:02:39] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:02:39] [PASSED] drm_test_check_infoframes
[22:02:39] [PASSED] drm_test_check_reject_avi_infoframe
[22:02:39] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:02:39] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:02:39] [PASSED] drm_test_check_reject_audio_infoframe
[22:02:39] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:02:39] ================= drm_managed (2 subtests) =================
[22:02:39] [PASSED] drm_test_managed_release_action
[22:02:39] [PASSED] drm_test_managed_run_action
[22:02:39] =================== [PASSED] drm_managed ===================
[22:02:39] =================== drm_mm (6 subtests) ====================
[22:02:39] [PASSED] drm_test_mm_init
[22:02:39] [PASSED] drm_test_mm_debug
[22:02:39] [PASSED] drm_test_mm_align32
[22:02:39] [PASSED] drm_test_mm_align64
[22:02:39] [PASSED] drm_test_mm_lowest
[22:02:39] [PASSED] drm_test_mm_highest
[22:02:39] ===================== [PASSED] drm_mm ======================
[22:02:39] ============= drm_modes_analog_tv (5 subtests) =============
[22:02:39] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:02:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:02:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:02:39] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:02:39] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:02:39] =============== [PASSED] drm_modes_analog_tv ===============
[22:02:39] ============== drm_plane_helper (2 subtests) ===============
[22:02:39] =============== drm_test_check_plane_state ================
[22:02:39] [PASSED] clipping_simple
[22:02:39] [PASSED] clipping_rotate_reflect
[22:02:39] [PASSED] positioning_simple
[22:02:39] [PASSED] upscaling
[22:02:39] [PASSED] downscaling
[22:02:39] [PASSED] rounding1
[22:02:39] [PASSED] rounding2
[22:02:39] [PASSED] rounding3
[22:02:39] [PASSED] rounding4
[22:02:39] =========== [PASSED] drm_test_check_plane_state ============
[22:02:39] =========== drm_test_check_invalid_plane_state ============
[22:02:39] [PASSED] positioning_invalid
[22:02:39] [PASSED] upscaling_invalid
[22:02:39] [PASSED] downscaling_invalid
[22:02:39] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:02:39] ================ [PASSED] drm_plane_helper =================
[22:02:39] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:02:39] ====== drm_test_connector_helper_tv_get_modes_check =======
[22:02:39] [PASSED] None
[22:02:39] [PASSED] PAL
[22:02:39] [PASSED] NTSC
[22:02:39] [PASSED] Both, NTSC Default
[22:02:39] [PASSED] Both, PAL Default
[22:02:39] [PASSED] Both, NTSC Default, with PAL on command-line
[22:02:39] [PASSED] Both, PAL Default, with NTSC on command-line
[22:02:39] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:02:39] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:02:39] ================== drm_rect (9 subtests) ===================
[22:02:39] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:02:39] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:02:39] [PASSED] drm_test_rect_clip_scaled_clipped
[22:02:39] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:02:39] ================= drm_test_rect_intersect =================
[22:02:39] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:02:39] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:02:39] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:02:39] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:02:39] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:02:39] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:02:39] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:02:39] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:02:39] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:02:39] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:02:39] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:02:39] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:02:39] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:02:39] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:02:39] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:02:39] ============= [PASSED] drm_test_rect_intersect =============
[22:02:39] ================ drm_test_rect_calc_hscale ================
[22:02:39] [PASSED] normal use
[22:02:39] [PASSED] out of max range
[22:02:39] [PASSED] out of min range
[22:02:39] [PASSED] zero dst
[22:02:39] [PASSED] negative src
[22:02:39] [PASSED] negative dst
[22:02:39] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:02:39] ================ drm_test_rect_calc_vscale ================
[22:02:39] [PASSED] normal use
[22:02:39] [PASSED] out of max range
[22:02:39] [PASSED] out of min range
[22:02:39] [PASSED] zero dst
[22:02:39] [PASSED] negative src
[22:02:39] [PASSED] negative dst
[22:02:39] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:02:39] ================== drm_test_rect_rotate ===================
[22:02:39] [PASSED] reflect-x
[22:02:39] [PASSED] reflect-y
[22:02:39] [PASSED] rotate-0
[22:02:39] [PASSED] rotate-90
[22:02:39] [PASSED] rotate-180
[22:02:39] [PASSED] rotate-270
[22:02:39] ============== [PASSED] drm_test_rect_rotate ===============
[22:02:39] ================ drm_test_rect_rotate_inv =================
[22:02:39] [PASSED] reflect-x
[22:02:39] [PASSED] reflect-y
[22:02:39] [PASSED] rotate-0
[22:02:39] [PASSED] rotate-90
[22:02:39] [PASSED] rotate-180
[22:02:39] [PASSED] rotate-270
[22:02:39] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:02:39] ==================== [PASSED] drm_rect =====================
[22:02:39] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:02:39] ============ drm_test_sysfb_build_fourcc_list =============
[22:02:39] [PASSED] no native formats
[22:02:39] [PASSED] XRGB8888 as native format
[22:02:39] [PASSED] remove duplicates
[22:02:39] [PASSED] convert alpha formats
[22:02:39] [PASSED] random formats
[22:02:39] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:02:39] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:02:39] ================== drm_fixp (2 subtests) ===================
[22:02:39] [PASSED] drm_test_int2fixp
[22:02:39] [PASSED] drm_test_sm2fixp
[22:02:39] ==================== [PASSED] drm_fixp =====================
[22:02:39] ============================================================
[22:02:39] Testing complete. Ran 637 tests: passed: 637
[22:02:39] Elapsed time: 26.492s total, 1.744s configuring, 24.580s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:02:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:02:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:02:51] Starting KUnit Kernel (1/1)...
[22:02:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:02:51] ================= ttm_device (5 subtests) ==================
[22:02:51] [PASSED] ttm_device_init_basic
[22:02:51] [PASSED] ttm_device_init_multiple
[22:02:51] [PASSED] ttm_device_fini_basic
[22:02:51] [PASSED] ttm_device_init_no_vma_man
[22:02:51] ================== ttm_device_init_pools ==================
[22:02:51] [PASSED] No DMA allocations, no DMA32 required
[22:02:51] [PASSED] DMA allocations, DMA32 required
[22:02:51] [PASSED] No DMA allocations, DMA32 required
[22:02:51] [PASSED] DMA allocations, no DMA32 required
[22:02:51] ============== [PASSED] ttm_device_init_pools ==============
[22:02:51] =================== [PASSED] ttm_device ====================
[22:02:51] ================== ttm_pool (8 subtests) ===================
[22:02:51] ================== ttm_pool_alloc_basic ===================
[22:02:51] [PASSED] One page
[22:02:51] [PASSED] More than one page
[22:02:51] [PASSED] Above the allocation limit
[22:02:51] [PASSED] One page, with coherent DMA mappings enabled
[22:02:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:02:51] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:02:51] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:02:51] [PASSED] One page
[22:02:51] [PASSED] More than one page
[22:02:51] [PASSED] Above the allocation limit
[22:02:51] [PASSED] One page, with coherent DMA mappings enabled
[22:02:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:02:51] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:02:51] [PASSED] ttm_pool_alloc_order_caching_match
[22:02:51] [PASSED] ttm_pool_alloc_caching_mismatch
[22:02:51] [PASSED] ttm_pool_alloc_order_mismatch
[22:02:51] [PASSED] ttm_pool_free_dma_alloc
[22:02:51] [PASSED] ttm_pool_free_no_dma_alloc
[22:02:51] [PASSED] ttm_pool_fini_basic
[22:02:51] ==================== [PASSED] ttm_pool =====================
[22:02:51] ================ ttm_resource (8 subtests) =================
[22:02:51] ================= ttm_resource_init_basic =================
[22:02:51] [PASSED] Init resource in TTM_PL_SYSTEM
[22:02:51] [PASSED] Init resource in TTM_PL_VRAM
[22:02:51] [PASSED] Init resource in a private placement
[22:02:51] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:02:51] ============= [PASSED] ttm_resource_init_basic =============
[22:02:51] [PASSED] ttm_resource_init_pinned
[22:02:51] [PASSED] ttm_resource_fini_basic
[22:02:51] [PASSED] ttm_resource_manager_init_basic
[22:02:51] [PASSED] ttm_resource_manager_usage_basic
[22:02:51] [PASSED] ttm_resource_manager_set_used_basic
[22:02:51] [PASSED] ttm_sys_man_alloc_basic
[22:02:51] [PASSED] ttm_sys_man_free_basic
[22:02:51] ================== [PASSED] ttm_resource ===================
[22:02:51] =================== ttm_tt (15 subtests) ===================
[22:02:51] ==================== ttm_tt_init_basic ====================
[22:02:51] [PASSED] Page-aligned size
[22:02:51] [PASSED] Extra pages requested
[22:02:51] ================ [PASSED] ttm_tt_init_basic ================
[22:02:51] [PASSED] ttm_tt_init_misaligned
[22:02:51] [PASSED] ttm_tt_fini_basic
[22:02:51] [PASSED] ttm_tt_fini_sg
[22:02:51] [PASSED] ttm_tt_fini_shmem
[22:02:51] [PASSED] ttm_tt_create_basic
[22:02:51] [PASSED] ttm_tt_create_invalid_bo_type
[22:02:51] [PASSED] ttm_tt_create_ttm_exists
[22:02:51] [PASSED] ttm_tt_create_failed
[22:02:51] [PASSED] ttm_tt_destroy_basic
[22:02:51] [PASSED] ttm_tt_populate_null_ttm
[22:02:51] [PASSED] ttm_tt_populate_populated_ttm
[22:02:51] [PASSED] ttm_tt_unpopulate_basic
[22:02:51] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:02:51] [PASSED] ttm_tt_swapin_basic
[22:02:51] ===================== [PASSED] ttm_tt ======================
[22:02:51] =================== ttm_bo (14 subtests) ===================
[22:02:51] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:02:51] [PASSED] Cannot be interrupted and sleeps
[22:02:51] [PASSED] Cannot be interrupted, locks straight away
[22:02:51] [PASSED] Can be interrupted, sleeps
[22:02:51] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:02:51] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:02:51] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:02:51] [PASSED] ttm_bo_reserve_double_resv
[22:02:51] [PASSED] ttm_bo_reserve_interrupted
[22:02:51] [PASSED] ttm_bo_reserve_deadlock
[22:02:51] [PASSED] ttm_bo_unreserve_basic
[22:02:51] [PASSED] ttm_bo_unreserve_pinned
[22:02:51] [PASSED] ttm_bo_unreserve_bulk
[22:02:51] [PASSED] ttm_bo_fini_basic
[22:02:51] [PASSED] ttm_bo_fini_shared_resv
[22:02:51] [PASSED] ttm_bo_pin_basic
[22:02:51] [PASSED] ttm_bo_pin_unpin_resource
[22:02:51] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:02:51] ===================== [PASSED] ttm_bo ======================
[22:02:51] ============== ttm_bo_validate (22 subtests) ===============
[22:02:51] ============== ttm_bo_init_reserved_sys_man ===============
[22:02:51] [PASSED] Buffer object for userspace
[22:02:51] [PASSED] Kernel buffer object
[22:02:51] [PASSED] Shared buffer object
[22:02:51] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:02:51] ============== ttm_bo_init_reserved_mock_man ==============
[22:02:51] [PASSED] Buffer object for userspace
[22:02:51] [PASSED] Kernel buffer object
[22:02:51] [PASSED] Shared buffer object
[22:02:51] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:02:51] [PASSED] ttm_bo_init_reserved_resv
[22:02:51] ================== ttm_bo_validate_basic ==================
[22:02:51] [PASSED] Buffer object for userspace
[22:02:51] [PASSED] Kernel buffer object
[22:02:51] [PASSED] Shared buffer object
[22:02:51] ============== [PASSED] ttm_bo_validate_basic ==============
[22:02:51] [PASSED] ttm_bo_validate_invalid_placement
[22:02:51] ============= ttm_bo_validate_same_placement ==============
[22:02:51] [PASSED] System manager
[22:02:51] [PASSED] VRAM manager
[22:02:51] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:02:51] [PASSED] ttm_bo_validate_failed_alloc
[22:02:51] [PASSED] ttm_bo_validate_pinned
[22:02:51] [PASSED] ttm_bo_validate_busy_placement
[22:02:51] ================ ttm_bo_validate_multihop =================
[22:02:51] [PASSED] Buffer object for userspace
[22:02:51] [PASSED] Kernel buffer object
[22:02:51] [PASSED] Shared buffer object
[22:02:51] ============ [PASSED] ttm_bo_validate_multihop =============
[22:02:51] ========== ttm_bo_validate_no_placement_signaled ==========
[22:02:51] [PASSED] Buffer object in system domain, no page vector
[22:02:51] [PASSED] Buffer object in system domain with an existing page vector
[22:02:51] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:02:51] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:02:51] [PASSED] Buffer object for userspace
[22:02:51] [PASSED] Kernel buffer object
[22:02:51] [PASSED] Shared buffer object
[22:02:51] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:02:51] [PASSED] ttm_bo_validate_move_fence_signaled
[22:02:51] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:02:51] [PASSED] Waits for GPU
[22:02:51] [PASSED] Tries to lock straight away
[22:02:51] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:02:51] [PASSED] ttm_bo_validate_swapout
[22:02:51] [PASSED] ttm_bo_validate_happy_evict
[22:02:51] [PASSED] ttm_bo_validate_all_pinned_evict
[22:02:51] [PASSED] ttm_bo_validate_allowed_only_evict
[22:02:51] [PASSED] ttm_bo_validate_deleted_evict
[22:02:51] [PASSED] ttm_bo_validate_busy_domain_evict
[22:02:51] [PASSED] ttm_bo_validate_evict_gutting
[22:02:51] [PASSED] ttm_bo_validate_recrusive_evict
[22:02:51] ================= [PASSED] ttm_bo_validate =================
[22:02:51] ============================================================
[22:02:51] Testing complete. Ran 102 tests: passed: 102
[22:02:51] Elapsed time: 11.943s total, 1.794s configuring, 9.935s building, 0.184s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[22:02:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:02:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:03:01] Starting KUnit Kernel (1/1)...
[22:03:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:03:01] =============== dma-buf-fence (12 subtests) ================
[22:03:01] [PASSED] test_sanitycheck
[22:03:01] [PASSED] test_signaling
[22:03:01] [PASSED] test_add_callback
[22:03:01] [PASSED] test_late_add_callback
[22:03:01] [PASSED] test_rm_callback
[22:03:01] [PASSED] test_late_rm_callback
[22:03:01] [PASSED] test_status
[22:03:01] [PASSED] test_error
[22:03:01] [PASSED] test_wait
[22:03:01] [PASSED] test_wait_timeout
[22:03:01] [PASSED] test_stub
[22:03:01] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[22:03:01] ================== [PASSED] dma-buf-fence ==================
[22:03:01] ============ dma-buf-fence-chain (11 subtests) =============
[22:03:01] [PASSED] test_sanitycheck
[22:03:01] [PASSED] test_find_seqno
[22:03:01] [PASSED] test_find_signaled
[22:03:01] [PASSED] test_find_out_of_order
[22:03:06] [PASSED] test_find_gap
[22:03:06] [PASSED] test_find_race
[22:03:06] [PASSED] test_signal_forward
[22:03:06] [PASSED] test_signal_backward
[22:03:06] [PASSED] test_wait_forward
[22:03:06] [PASSED] test_wait_backward
[22:03:06] [PASSED] test_wait_random
[22:03:06] =============== [PASSED] dma-buf-fence-chain ===============
[22:03:06] ============ dma-buf-fence-unwrap (10 subtests) ============
[22:03:06] [PASSED] test_sanitycheck
[22:03:06] [PASSED] test_unwrap_array
[22:03:06] [PASSED] test_unwrap_chain
[22:03:06] [PASSED] test_unwrap_chain_array
[22:03:06] [PASSED] test_unwrap_merge
[22:03:06] [PASSED] test_unwrap_merge_duplicate
[22:03:06] [PASSED] test_unwrap_merge_seqno
[22:03:06] [PASSED] test_unwrap_merge_order
[22:03:06] [PASSED] test_unwrap_merge_complex
[22:03:06] [PASSED] test_unwrap_merge_complex_seqno
[22:03:06] ============== [PASSED] dma-buf-fence-unwrap ===============
[22:03:06] ================ dma-buf-resv (5 subtests) =================
[22:03:06] [PASSED] test_sanitycheck
[22:03:06] ===================== test_signaling ======================
[22:03:06] [PASSED] kernel
[22:03:06] [PASSED] write
[22:03:06] [PASSED] read
[22:03:06] [PASSED] bookkeep
[22:03:06] ================= [PASSED] test_signaling ==================
[22:03:06] ====================== test_for_each ======================
[22:03:06] [PASSED] kernel
[22:03:06] [PASSED] write
[22:03:06] [PASSED] read
[22:03:06] [PASSED] bookkeep
[22:03:06] ================== [PASSED] test_for_each ==================
[22:03:06] ================= test_for_each_unlocked ==================
[22:03:06] [PASSED] kernel
[22:03:06] [PASSED] write
[22:03:06] [PASSED] read
[22:03:06] [PASSED] bookkeep
[22:03:06] ============= [PASSED] test_for_each_unlocked ==============
[22:03:06] ===================== test_get_fences =====================
[22:03:06] [PASSED] kernel
[22:03:06] [PASSED] write
[22:03:06] [PASSED] read
[22:03:06] [PASSED] bookkeep
[22:03:06] ================= [PASSED] test_get_fences =================
[22:03:06] ================== [PASSED] dma-buf-resv ===================
[22:03:06] ============================================================
[22:03:06] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[22:03:07] Elapsed time: 15.486s total, 1.746s configuring, 8.418s building, 5.278s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging
2026-08-12 21:53 ` [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
@ 2026-08-12 22:08 ` sashiko-bot
0 siblings, 0 replies; 24+ messages in thread
From: sashiko-bot @ 2026-08-12 22:08 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-xe, intel-gfx
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Incorrect coordinate space math in the 180-degree rotation branch causes the FBC dirty rectangle to collapse, breaking FBC tracking.
- [Medium] The 'FBC dirty rect out of range' debug warning will trigger spuriously on almost every frame when the plane is rotated 180 degrees.
--
--- Patch [1]: [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging ---
commit 234fb7237db4bb8e467458e88cc6ed3f6e850511
Author: Charlton Lin <charlton.lin@intel.com>
drm/i915/fbc: fbc_dirty_rect restrictions and logging
Clamp the FBC dirty rectangle coordinates to the valid frame buffer
range [y_offset, y_end] to prevent out-of-bounds coordinates, and
log a debug message when clamping occurs.
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index f61b4a218d6ef..c0fed695af0da 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
[ ... ]
> @@ -1535,11 +1538,41 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> return;
> }
>
> - if (drm_rect_visible(damage))
> - *fbc_dirty_rect = *damage;
> - else
> + if (drm_rect_visible(damage)) {
> + int y1, y2;
> +
> + if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
> + /* Under 180 degree rotation, coordinate system is inverted */
> + int inv_y1 = height - damage->y2;
> + int inv_y2 = height - damage->y1;
> +
> + y1 = clamp(y_offset + inv_y1, y_offset, y_end);
> + y2 = clamp(y_offset + inv_y2, y_offset, y_end);
[Severity: High]
Can this math result in collapsed dirty rectangles?
Because damage->y2 already includes the absolute y_offset, height - damage->y2
yields a large negative number. When y_offset is added back, the result falls
well below y_offset, causing both y1 and y2 to unconditionally clamp to
y_offset.
This collapses the FBC dirty rectangle to a 0-height region starting at
y_offset, entirely missing the actual damaged pixels.
> + } else {
> + y1 = clamp(damage->y1, y_offset, y_end);
> + y2 = clamp(damage->y2, y_offset, y_end);
> + }
> +
> + /*
> + * Clamp dirty rect to the valid FB range [y_offset, y_end].
> + * Per Bspec:
> + * start_line >= y_offset
> + * end_line <= y_offset + plane_height
> + */
> + if (y1 != damage->y1 || y2 != damage->y2)
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] FBC dirty rect out of range: y1=%d y2=%d clamped to y1=%d y2=%d (y_offset=%d y_end=%d)\n",
> + plane->base.base.id, plane->base.name,
> + damage->y1, damage->y2, y1, y2, y_offset, y_end);
[Severity: Medium]
Will this warning trigger spuriously on almost every frame when the plane is
rotated 180 degrees?
For 180-degree planes, the code intentionally alters y1 and y2 to represent
inverted coordinates. The warning condition compares these new inverted
coordinates directly against the original, non-inverted coordinates.
Because an inverted coordinate will inherently mismatch a non-inverted one,
this condition evaluates to true on nearly every atomic update involving damage
for rotated planes.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812215350.3753102-1-austin.hu@intel.com?part=1
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
2026-08-12 21:53 ` [PATCH 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
@ 2026-08-12 22:10 ` sashiko-bot
0 siblings, 0 replies; 24+ messages in thread
From: sashiko-bot @ 2026-08-12 22:10 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [Medium] Strict equality check on `uapi.src` forces a full FBC CFB nuke on vertical panning (Y-offset changes), defeating dirty rectangle optimizations for scrolling.
Pre-existing issues:
- [High] Incorrect damage coordinate inversion math for 180-degree rotated planes results in 0-height dirty rectangles, freezing screen updates.
--
--- Patch [2]: [PATCH 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes ---
commit 50b0481138fde60ac48db330dd972dfba35b3f10
Author: Austin Hu <austin.hu@intel.com>
drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
When FBC Dirty Rectangle mode is enabled, any non-PLANE_SURF register
update requires fetching the full plane frame buffer from memory to
re-compress and update the CFB in stolen memory. This commit checks
plane state attributes during atomic commits and forces a full CFB
nuke if any setting other than the surface address changes.
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index c0fed695af0da..6bf5c09476713 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1516,8 +1516,124 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
> intel_fbc_is_cfb_ok(plane_state);
> }
>
> +/*
> + * From BSpec about "FBC Dirty Rectangle", when Dirty Rectangle mode is active,
[ ... ]
> +static bool intel_fbc_dirty_rect_needs_nuke(struct intel_atomic_state *state,
> + struct intel_plane *plane)
> +{
> + struct intel_display *display = to_intel_display(state);
[ ... ]
> + if (skl_plane_aux_dist(old_plane_state, 0) !=
> + skl_plane_aux_dist(new_plane_state, 0)) {
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] AUX_DIST changed in FBC DIRTY RECT\n",
> + plane->base.base.id, plane->base.name);
> + return true;
> + }
> +
> + if (!drm_rect_equals(&old_plane_state->uapi.src,
> + &new_plane_state->uapi.src) ||
> + !drm_rect_equals(&old_plane_state->uapi.dst,
> + &new_plane_state->uapi.dst)) {
[Severity: Medium]
Does this strict equality check on uapi.src accidentally force a full CFB
nuke during vertical panning?
A vertical pan (scrolling) changes uapi.src.y1 to shift the viewport, which
translates to a surface address update (PLANE_OFFSET / PLANE_SURF registers).
Because drm_rect_equals() checks the coordinates (x1 and y1), it fails when
panning, erroneously triggering a full CFB nuke on every frame of the scroll.
Should this perhaps verify drm_rect_width() and drm_rect_height() instead
to allow pure viewport shifts?
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] Size/coords changed in FBC DIRTY RECT\n",
> + plane->base.base.id, plane->base.name);
> + return true;
> + }
> +
> + if (old_plane_state->hw.alpha != new_plane_state->hw.alpha) {
[ ... ]
> static void
> -__intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> +__intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
> + const struct intel_plane_state *plane_state,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> @@ -1538,7 +1654,10 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> return;
> }
>
> - if (drm_rect_visible(damage)) {
> + if (intel_fbc_dirty_rect_needs_nuke(state, plane)) {
> + /* compress the entire region due to non PLANE_SURF updating. */
> + *fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, height);
> + } else if (drm_rect_visible(damage)) {
> int y1, y2;
>
> if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
> /* Under 180 degree rotation, coordinate system is inverted */
> int inv_y1 = height - damage->y2;
> int inv_y2 = height - damage->y1;
>
> y1 = clamp(y_offset + inv_y1, y_offset, y_end);
> y2 = clamp(y_offset + inv_y2, y_offset, y_end);
[Severity: High]
This is a pre-existing issue, but does this math incorrectly treat absolute
framebuffer coordinates as relative coordinates, resulting in zero-height
dirty rectangles for 180-degree rotated displays?
The damage clip is already in absolute framebuffer coordinates, meaning
damage->y2 resides between y_offset and y_end. Subtracting this from the
plane's height produces a value that, when added to y_offset, is almost
always less than y_offset.
The clamp() function then pins both y1 and y2 strictly to y_offset,
programming a zero-height dirty rectangle and freezing screen updates on
rotated displays.
Could this be corrected to account for the absolute offset, perhaps using
something like y_end - (damage->y2 - y_offset)?
> } else {
> y1 = clamp(damage->y1, y_offset, y_end);
> y2 = clamp(damage->y2, y_offset, y_end);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812215350.3753102-1-austin.hu@intel.com?part=2
^ permalink raw reply [flat|nested] 24+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (2 preceding siblings ...)
2026-08-12 22:03 ` ✓ CI.KUnit: success for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Patchwork
@ 2026-08-12 22:44 ` Patchwork
2026-08-12 22:57 ` ✗ i915.CI.BAT: failure " Patchwork
` (9 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2026-08-12 22:44 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 984 bytes --]
== Series Details ==
Series: drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
URL : https://patchwork.freedesktop.org/series/172105/
State : success
== Summary ==
CI Bug Log - changes from xe-5583-707b81710802330f08e561e54d174f74abdb10e5_BAT -> xe-pw-172105v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5583-707b81710802330f08e561e54d174f74abdb10e5 -> xe-pw-172105v1
IGT_9054: 3d819a8f511b2bcd844647bcf7e433b9407d058e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5583-707b81710802330f08e561e54d174f74abdb10e5: 707b81710802330f08e561e54d174f74abdb10e5
xe-pw-172105v1: 172105v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/index.html
[-- Attachment #2: Type: text/html, Size: 1532 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* ✗ i915.CI.BAT: failure for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (3 preceding siblings ...)
2026-08-12 22:44 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-08-12 22:57 ` Patchwork
2026-08-13 5:40 ` ✗ Xe.CI.FULL: " Patchwork
` (8 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2026-08-12 22:57 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 1926 bytes --]
== Series Details ==
Series: drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
URL : https://patchwork.freedesktop.org/series/172104/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_18985 -> Patchwork_172104v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_172104v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_172104v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_172104v1/index.html
Participating hosts (37 -> 34)
------------------------------
Missing (3): bat-dg2-13 bat-rpls-4 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_172104v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_module_load@load:
- fi-bsw-n3050: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18985/fi-bsw-n3050/igt@i915_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_172104v1/fi-bsw-n3050/igt@i915_module_load@load.html
Build changes
-------------
* Linux: CI_DRM_18985 -> Patchwork_172104v1
CI-20190529: 20190529
CI_DRM_18985: 707b81710802330f08e561e54d174f74abdb10e5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9054: 3d819a8f511b2bcd844647bcf7e433b9407d058e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_172104v1: 707b81710802330f08e561e54d174f74abdb10e5 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_172104v1/index.html
[-- Attachment #2: Type: text/html, Size: 2528 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (4 preceding siblings ...)
2026-08-12 22:57 ` ✗ i915.CI.BAT: failure " Patchwork
@ 2026-08-13 5:40 ` Patchwork
2026-08-25 16:56 ` [PATCH v2 0/2] drm/i915/fbc: Dirty rectangle bounding " Austin Hu
` (7 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2026-08-13 5:40 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 29701 bytes --]
== Series Details ==
Series: drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
URL : https://patchwork.freedesktop.org/series/172105/
State : failure
== Summary ==
CI Bug Log - changes from xe-5583-707b81710802330f08e561e54d174f74abdb10e5_FULL -> xe-pw-172105v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-172105v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-172105v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-172105v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_compute_preempt@compute-preempt-many-vram:
- shard-bmg: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram.html
Known issues
------------
Here are the changes found in xe-pw-172105v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2327])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#7059] / [Intel XE#7085])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#610] / [Intel XE#7387])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +6 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2328] / [Intel XE#7367])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#7679])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p.html
* igt@kms_bw@linear-tiling-2-displays-target-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#367])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-1/igt@kms_bw@linear-tiling-2-displays-target-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2887]) +6 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#3432])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2724] / [Intel XE#7449])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2325] / [Intel XE#7358]) +2 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_hpd@dp-hpd-after-suspend:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2252]) +4 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
* igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][15] ([Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#6974])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_content_protection@uevent-hdcp14:
- shard-bmg: NOTRUN -> [FAIL][17] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_content_protection@uevent-hdcp14.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2320]) +2 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [PASS][19] -> [FAIL][20] ([Intel XE#7571])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-10/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#4354] / [Intel XE#7386])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#8265])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#4422] / [Intel XE#7442])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_feature_discovery@display-3x:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2373] / [Intel XE#7448])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2375])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][26] -> [FAIL][27] ([Intel XE#301]) +1 other test fail
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2311]) +33 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#4141]) +13 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbchdr-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#7399])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbchdr-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#7061]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@plane-fbc-rte:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2350] / [Intel XE#7503])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2313]) +36 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#6901])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#7591])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#7283]) +3 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#8303]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#5021] / [Intel XE#7377])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc3co-vpb-simulation@psr2-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#8396]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_pm_dc@dc3co-vpb-simulation@psr2-xrgb8888.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#1489]) +2 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2387] / [Intel XE#7429])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-psr-sprite-blt:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_psr@fbc-psr-sprite-blt.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#3904] / [Intel XE#7342])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#2330] / [Intel XE#5813])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#6503])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-1/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2426] / [Intel XE#5848])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@max-min:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#1499]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@kms_vrr@max-min.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#6599])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_evict@evict-small-multi-queue-cm:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#8370])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_evict@evict-small-multi-queue-cm.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html
* igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#8374]) +6 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm.html
* igt@xe_exec_multi_queue@two-queues-basic-smem:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#8364]) +16 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_exec_multi_queue@two-queues-basic-smem.html
* igt@xe_exec_reset@multi-queue-gt-reset:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#8369])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_exec_reset@multi-queue-gt-reset.html
* igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#8378]) +4 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init:
- shard-bmg: [PASS][59] -> [ABORT][60] ([Intel XE#8007]) +2 other tests abort
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-9/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html
* igt@xe_multigpu_svm@mgpu-atomic-op-basic:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#6964]) +3 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html
* igt@xe_page_reclaim@boundary-split:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#7793]) +1 other test skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_page_reclaim@boundary-split.html
* igt@xe_pat@pat-sw-hw-compare:
- shard-bmg: NOTRUN -> [FAIL][63] ([Intel XE#7695])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_pat@pat-sw-hw-compare.html
* igt@xe_pat@xa-app-transient-media-on:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#7590])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-8/igt@xe_pat@xa-app-transient-media-on.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2284] / [Intel XE#7370])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_render0:
- shard-bmg: [PASS][67] -> [FAIL][68] ([Intel XE#8555])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_render0.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_render0.html
* igt@xe_prefetch_fault@prefetch-fault:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#7599])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_prefetch_fault@prefetch-fault.html
* igt@xe_pxp@pxp-stale-queue-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_pxp@pxp-stale-queue-post-termination-irq.html
* igt@xe_survivability@runtime-survivability:
- shard-bmg: NOTRUN -> [DMESG-WARN][71] ([Intel XE#6627] / [Intel XE#7419])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-10/igt@xe_survivability@runtime-survivability.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][72] ([Intel XE#301]) -> [PASS][73] +1 other test pass
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-indfb-msflip-blt:
- shard-bmg: [ABORT][74] ([Intel XE#8906]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-4/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-indfb-msflip-blt.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-indfb-msflip-blt.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early:
- shard-bmg: [ABORT][76] ([Intel XE#8007]) -> [PASS][77] +2 other tests pass
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0:
- shard-bmg: [FAIL][78] ([Intel XE#8555]) -> [PASS][79]
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
#### Warnings ####
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][80] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][81] ([Intel XE#2426] / [Intel XE#5848])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5583-707b81710802330f08e561e54d174f74abdb10e5/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#6627]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6627
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7419
[Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
[Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
[Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
[Intel XE#7503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7503
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
[Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#8555]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8555
[Intel XE#8906]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8906
Build changes
-------------
* Linux: xe-5583-707b81710802330f08e561e54d174f74abdb10e5 -> xe-pw-172105v1
IGT_9054: 3d819a8f511b2bcd844647bcf7e433b9407d058e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5583-707b81710802330f08e561e54d174f74abdb10e5: 707b81710802330f08e561e54d174f74abdb10e5
xe-pw-172105v1: 172105v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172105v1/index.html
[-- Attachment #2: Type: text/html, Size: 32143 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 0/2] drm/i915/fbc: Dirty rectangle bounding and CFB nuke handling
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (5 preceding siblings ...)
2026-08-13 5:40 ` ✗ Xe.CI.FULL: " Patchwork
@ 2026-08-25 16:56 ` Austin Hu
2026-08-25 16:56 ` [PATCH v2 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
` (6 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Austin Hu @ 2026-08-25 16:56 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai
This series fixes two issue areas in Intel FBC (Framebuffer Compression)
dirty rectangle handling:
1. Clamps FBC dirty rectangle bounds to valid surface limits [y_offset, y_end]
and adds logging for out-of-bounds coordinates, including handling for
180-degree plane rotation.
2. Tracks plane state attribute changes during atomic commits. When FBC Dirty
Rectangle mode is active, partial updates only apply to surface address
changes (PLANE_SURF). Modifications to any other plane state parameters
require fetching full-plane pixel data from memory to re-compress and
update the entire CFB in stolen memory. Once fully re-compressed,
subsequent atomic commits can resume selective dirty rectangle updates.
v1 -> v2 changes:
- Reused intel_fbc_can_flip_nuke() for plane update state checks as suggested.
- Added plane Y-coordinate plane view checking (color_plane[0].y) alongside X.
Austin Hu (1):
drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
Charlton Lin (1):
drm/i915/fbc: fbc_dirty_rect restrictions and logging
drivers/gpu/drm/i915/display/intel_fbc.c | 192 +++++++++++++++++------
1 file changed, 141 insertions(+), 51 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (6 preceding siblings ...)
2026-08-25 16:56 ` [PATCH v2 0/2] drm/i915/fbc: Dirty rectangle bounding " Austin Hu
@ 2026-08-25 16:56 ` Austin Hu
2026-08-25 17:16 ` sashiko-bot
2026-08-25 16:56 ` [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
` (5 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Austin Hu @ 2026-08-25 16:56 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai
From: Charlton Lin <charlton.lin@intel.com>
Clamp the FBC dirty rectangle coordinates to the valid frame buffer
range [y_offset, y_end] to prevent out-of-bounds coordinates, and
log a debug message when clamping occurs.
Signed-off-by: Charlton Lin <charlton.lin@intel.com>
Signed-off-by: Austin Hu <austin.hu@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 39 ++++++++++++++++++++++--
1 file changed, 36 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index f61b4a218d6e..c0fed695af0d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1521,11 +1521,14 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
const struct intel_crtc_state *crtc_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_fbc *fbc = plane->fbc;
struct drm_rect *fbc_dirty_rect = &fbc->state.dirty_rect;
int width = drm_rect_width(&plane_state->uapi.src) >> 16;
+ int height = drm_rect_height(&plane_state->uapi.src) >> 16;
const struct drm_rect *damage = &plane_state->damage;
int y_offset = plane_state->view.color_plane[0].y;
+ int y_end = y_offset + height;
lockdep_assert_held(&fbc->lock);
@@ -1535,11 +1538,41 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
return;
}
- if (drm_rect_visible(damage))
- *fbc_dirty_rect = *damage;
- else
+ if (drm_rect_visible(damage)) {
+ int y1, y2;
+
+ if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
+ /* Under 180 degree rotation, coordinate system is inverted */
+ int inv_y1 = height - damage->y2;
+ int inv_y2 = height - damage->y1;
+
+ y1 = clamp(y_offset + inv_y1, y_offset, y_end);
+ y2 = clamp(y_offset + inv_y2, y_offset, y_end);
+ } else {
+ y1 = clamp(damage->y1, y_offset, y_end);
+ y2 = clamp(damage->y2, y_offset, y_end);
+ }
+
+ /*
+ * Clamp dirty rect to the valid FB range [y_offset, y_end].
+ * Per Bspec:
+ * start_line >= y_offset
+ * end_line <= y_offset + plane_height
+ */
+ if (y1 != damage->y1 || y2 != damage->y2)
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] FBC dirty rect out of range: y1=%d y2=%d clamped to y1=%d y2=%d (y_offset=%d y_end=%d)\n",
+ plane->base.base.id, plane->base.name,
+ damage->y1, damage->y2, y1, y2, y_offset, y_end);
+
+ fbc_dirty_rect->x1 = damage->x1;
+ fbc_dirty_rect->x2 = damage->x2;
+ fbc_dirty_rect->y1 = y1;
+ fbc_dirty_rect->y2 = y2;
+ } else {
/* dirty rect must cover at least one line */
*fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, 1);
+ }
}
void
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (7 preceding siblings ...)
2026-08-25 16:56 ` [PATCH v2 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
@ 2026-08-25 16:56 ` Austin Hu
2026-08-25 17:13 ` sashiko-bot
2026-09-07 11:28 ` Jani Nikula
2026-09-23 17:28 ` [PATCH v3 0/3] drm/i915/fbc: Dirty rectangle bounding and CFB Austin Hu
` (4 subsequent siblings)
13 siblings, 2 replies; 24+ messages in thread
From: Austin Hu @ 2026-08-25 16:56 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai
When FBC Dirty Rectangle mode is enabled, any non-PLANE_SURF register
update requires fetching the full plane frame buffer from memory to
re-compress and update the CFB in stolen memory.
Check plane state attributes during atomic commits and force a full
CFB nuke if any setting other than the surface address changes.
---
v2:
- Address reviewer feedback to reuse intel_fbc_can_flip_nuke().
---
Signed-off-by: Austin Hu <austin.hu@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 155 ++++++++++++++++-------
1 file changed, 106 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index c0fed695af0d..34c0e42dfdab 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1516,11 +1516,106 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
intel_fbc_is_cfb_ok(plane_state);
}
+static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_plane *plane)
+{
+ struct intel_display *display = to_intel_display(state);
+ const struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+ const struct intel_plane_state *old_plane_state =
+ intel_atomic_get_old_plane_state(state, plane);
+ const struct intel_plane_state *new_plane_state =
+ intel_atomic_get_new_plane_state(state, plane);
+ const struct drm_framebuffer *old_fb = old_plane_state->hw.fb;
+ const struct drm_framebuffer *new_fb = new_plane_state->hw.fb;
+
+ if (intel_crtc_needs_modeset(new_crtc_state))
+ return false;
+
+ if (!intel_fbc_is_ok(old_plane_state) ||
+ !intel_fbc_is_ok(new_plane_state))
+ return false;
+
+ if (old_fb->format->format != new_fb->format->format)
+ return false;
+
+ if (old_fb->modifier != new_fb->modifier)
+ return false;
+
+ if (intel_fbc_plane_stride(old_plane_state) !=
+ intel_fbc_plane_stride(new_plane_state))
+ return false;
+
+ if (intel_fbc_cfb_stride(old_plane_state) !=
+ intel_fbc_cfb_stride(new_plane_state))
+ return false;
+
+ if (intel_fbc_cfb_size(old_plane_state) !=
+ intel_fbc_cfb_size(new_plane_state))
+ return false;
+
+ if (intel_fbc_override_cfb_stride(old_plane_state) !=
+ intel_fbc_override_cfb_stride(new_plane_state))
+ return false;
+
+ if (!HAS_FBC_DIRTY_RECT(display))
+ return true;
+
+ /*
+ * From BSpec about "FBC Dirty Rectangle", when Dirty Rectangle mode is
+ * active, partial updates only apply to surface address changes. Any other
+ * plane state modification requires Plane to fetch full-plane pixel data
+ * from memory to re-compress and update the entire CFB in stolen memory.
+ * Once fully re-compressed, subsequent atomic commits go ahead with FBC
+ * dirty rectangle updates for smooth visual updates.
+ *
+ * So check other Plane attribute changed except for its surface address by
+ * referring to intel_async_flip_check_hw() which also checks async flip.
+ */
+
+ /* Includes pixel_blend_mode, color_encoding & color_range checking. */
+ if (old_plane_state->color_ctl != new_plane_state->color_ctl)
+ return false;
+
+ if (!drm_rect_equals(&old_plane_state->uapi.src,
+ &new_plane_state->uapi.src) ||
+ !drm_rect_equals(&old_plane_state->uapi.dst,
+ &new_plane_state->uapi.dst))
+ return false;
+
+ if ((old_plane_state->view.color_plane[0].x !=
+ new_plane_state->view.color_plane[0].x) ||
+ (old_plane_state->view.color_plane[0].y !=
+ new_plane_state->view.color_plane[0].y))
+ return false;
+
+ if (old_plane_state->hw.rotation != new_plane_state->hw.rotation)
+ return false;
+
+ if (old_plane_state->hw.alpha != new_plane_state->hw.alpha)
+ return false;
+
+ if (skl_plane_aux_dist(old_plane_state, 0) !=
+ skl_plane_aux_dist(new_plane_state, 0))
+ return false;
+
+ if (old_plane_state->decrypt != new_plane_state->decrypt)
+ return false;
+
+ if (old_plane_state->cus_ctl != new_plane_state->cus_ctl)
+ return false;
+
+ return true;
+}
+
static void
-__intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
+__intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
+ const struct intel_plane_state *plane_state,
const struct intel_crtc_state *crtc_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct intel_display *display = to_intel_display(plane_state);
struct intel_fbc *fbc = plane->fbc;
struct drm_rect *fbc_dirty_rect = &fbc->state.dirty_rect;
@@ -1538,7 +1633,15 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
return;
}
- if (drm_rect_visible(damage)) {
+ if (!intel_fbc_can_flip_nuke(state, crtc, plane)) {
+ if (HAS_FBC_DIRTY_RECT(display))
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Non surf addr changed for FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+
+ /* compress the entire region due to non PLANE_SURF updating. */
+ *fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, height);
+ } else if (drm_rect_visible(damage)) {
int y1, y2;
if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
@@ -1598,8 +1701,7 @@ intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
mutex_lock(&fbc->lock);
if (fbc->state.plane == plane)
- __intel_fbc_prepare_dirty_rect(plane_state,
- crtc_state);
+ __intel_fbc_prepare_dirty_rect(state, plane_state, crtc_state);
mutex_unlock(&fbc->lock);
}
@@ -1798,51 +1900,6 @@ int intel_fbc_min_cdclk(const struct intel_crtc_state *crtc_state)
return min_cdclk;
}
-static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_plane *plane)
-{
- const struct intel_crtc_state *new_crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
- const struct intel_plane_state *old_plane_state =
- intel_atomic_get_old_plane_state(state, plane);
- const struct intel_plane_state *new_plane_state =
- intel_atomic_get_new_plane_state(state, plane);
- const struct drm_framebuffer *old_fb = old_plane_state->hw.fb;
- const struct drm_framebuffer *new_fb = new_plane_state->hw.fb;
-
- if (intel_crtc_needs_modeset(new_crtc_state))
- return false;
-
- if (!intel_fbc_is_ok(old_plane_state) ||
- !intel_fbc_is_ok(new_plane_state))
- return false;
-
- if (old_fb->format->format != new_fb->format->format)
- return false;
-
- if (old_fb->modifier != new_fb->modifier)
- return false;
-
- if (intel_fbc_plane_stride(old_plane_state) !=
- intel_fbc_plane_stride(new_plane_state))
- return false;
-
- if (intel_fbc_cfb_stride(old_plane_state) !=
- intel_fbc_cfb_stride(new_plane_state))
- return false;
-
- if (intel_fbc_cfb_size(old_plane_state) !=
- intel_fbc_cfb_size(new_plane_state))
- return false;
-
- if (intel_fbc_override_cfb_stride(old_plane_state) !=
- intel_fbc_override_cfb_stride(new_plane_state))
- return false;
-
- return true;
-}
-
static bool __intel_fbc_pre_update(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_plane *plane)
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
2026-08-25 16:56 ` [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
@ 2026-08-25 17:13 ` sashiko-bot
2026-09-07 11:28 ` Jani Nikula
1 sibling, 0 replies; 24+ messages in thread
From: sashiko-bot @ 2026-08-25 17:13 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-xe, intel-gfx
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] Incorrect coordinate inversion for 180-degree rotation causes empty or truncated FBC dirty rectangles.
- [Medium] intel_fbc_can_flip_nuke fails to detect color_encoding changes on ICL+ HDR planes.
- [Medium] intel_fbc_can_flip_nuke fails to check for Color Key (ckey) changes.
- [Medium] intel_fbc_can_flip_nuke fails to check for Fast Clear Color Value (ccval) changes.
--
commit 10fd2eb7ca0c8e663bc8d78356bb0bf9afd6b14b
Author: Austin Hu <austin.hu@intel.com>
drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
This commit forces a full compressed framebuffer (CFB) nuke when any plane
state attribute other than the surface address changes while FBC Dirty
Rectangle mode is enabled. It checks various plane state attributes during
atomic commits to determine if the full plane pixel data needs to be
re-compressed.
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index c0fed695af0da..34c0e42dfdab6 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
[ ... ]
> @@ -1516,11 +1516,106 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
[ ... ]
> + /* Includes pixel_blend_mode, color_encoding & color_range checking. */
> + if (old_plane_state->color_ctl != new_plane_state->color_ctl)
> + return false;
[Severity: Medium]
Is checking color_ctl sufficient for detecting color encoding changes on ICL+
HDR planes? For these planes, the color encoding (like BT.2020 vs BT.709) is
not stored in color_ctl, but is directly programmed via
plane_state->hw.color_encoding. Will this cause the display to show stale FBC
data if the color encoding changes but color_ctl remains the same?
[ ... ]
> + if (old_plane_state->decrypt != new_plane_state->decrypt)
> + return false;
> +
> + if (old_plane_state->cus_ctl != new_plane_state->cus_ctl)
> + return false;
> +
> + return true;
> +}
[Severity: Medium]
Are we missing checks for Color Key changes here? If userspace updates
the color key properties, plane_state->ckey and plane_state->ctl are modified.
Since they are omitted from this check, could this update the PLANE_KEYVAL
registers without triggering the necessary FBC nuke?
[Severity: Medium]
Similarly, does this function need to compare the fast clear color values
(old_plane_state->ccval and new_plane_state->ccval)? If the clear color value
changes for a compressed framebuffer, FBC dirty rect updates might proceed
without full CFB re-compression, potentially corrupting display content.
[ ... ]
> @@ -1538,7 +1633,15 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
[ ... ]
> - if (drm_rect_visible(damage)) {
> + if (!intel_fbc_can_flip_nuke(state, crtc, plane)) {
[ ... ]
> + } else if (drm_rect_visible(damage)) {
> int y1, y2;
>
> if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
> /* Under 180 degree rotation, coordinate system is inverted */
> int inv_y1 = height - damage->y2;
> int inv_y2 = height - damage->y1;
>
> y1 = clamp(y_offset + inv_y1, y_offset, y_end);
> y2 = clamp(y_offset + inv_y2, y_offset, y_end);
[Severity: High]
Does this coordinate inversion for 180-degree rotation correctly account for
the y_offset? Since the damage->y1 and damage->y2 coordinates are already in
absolute memory coordinates (and include the y_offset), calculating
inv_y1 = height - damage->y2 and then adding y_offset back appears to
mathematically subtract y_offset entirely. Could this result in empty or
mis-clamped dirty rectangles when the screen is rotated 180 degrees?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812215350.3753102-1-austin.hu@intel.com?part=2
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging
2026-08-25 16:56 ` [PATCH v2 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
@ 2026-08-25 17:16 ` sashiko-bot
0 siblings, 0 replies; 24+ messages in thread
From: sashiko-bot @ 2026-08-25 17:16 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Incorrect 180-degree rotation math negates `y_offset` instead of maintaining it, resulting in a 0-height dirty rectangle that breaks FBC updates.
- [Medium] Spurious 'FBC dirty rect out of range' debug logging on every frame update during 180-degree rotation.
--
commit 4adeca8228048877f976377febbd0e77586bd42c
Author: Charlton Lin <charlton.lin@intel.com>
drm/i915/fbc: fbc_dirty_rect restrictions and logging
This commit clamps the fbc dirty rectangle coordinates to the valid frame
buffer range to prevent out-of-bounds access. It also adds a debug message
to log when clamping occurs.
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
[ ... ]
> @@ -1535,11 +1538,41 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> return;
> }
>
> - if (drm_rect_visible(damage))
> - *fbc_dirty_rect = *damage;
> - else
> + if (drm_rect_visible(damage)) {
> + int y1, y2;
> +
> + if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
> + /* Under 180 degree rotation, coordinate system is inverted */
> + int inv_y1 = height - damage->y2;
> + int inv_y2 = height - damage->y1;
> +
> + y1 = clamp(y_offset + inv_y1, y_offset, y_end);
> + y2 = clamp(y_offset + inv_y2, y_offset, y_end);
[Severity: High]
Does this calculation erroneously mix relative sizes with absolute
coordinates?
The math `height - damage->y2` seems to assume `damage` is viewport-relative,
but it is actually in absolute framebuffer coordinates (which contains
`y_offset`). When `y_offset` is added back here, it effectively cancels out.
If `y_offset >= height`, this strictly clamps to `y_offset`, resulting in
a 0-height dirty rectangle (`y1 = y2 = y_offset`), which can cause a
regression for fbc screen updates when 180-degree rotation is active.
This issue does not appear to be fixed in the subsequent patch in the series.
> + } else {
> + y1 = clamp(damage->y1, y_offset, y_end);
> + y2 = clamp(damage->y2, y_offset, y_end);
> + }
> +
> + /*
> + * Clamp dirty rect to the valid FB range [y_offset, y_end].
> + * Per Bspec:
> + * start_line >= y_offset
> + * end_line <= y_offset + plane_height
> + */
> + if (y1 != damage->y1 || y2 != damage->y2)
[Severity: Medium]
Will this condition trigger a false positive on every frame update during
180-degree rotation?
The check `y1 != damage->y1` directly compares the newly inverted coordinate
(`y1`) against the original non-inverted coordinate (`damage->y1`). This
will almost always evaluate to true regardless of whether any actual
clamping occurred.
This can potentially spam the kernel log with false positive 'fbc dirty
rect out of range' messages whenever kms debugging is enabled.
This issue also does not appear to be fixed in the subsequent patch in the
series.
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] FBC dirty rect out of range: y1=%d y2=%d clamped to y1=%d y2=%d (y_offset=%d y_end=%d)\n",
> + plane->base.base.id, plane->base.name,
> + damage->y1, damage->y2, y1, y2, y_offset, y_end);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812215350.3753102-1-austin.hu@intel.com?part=1
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
2026-08-25 16:56 ` [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
2026-08-25 17:13 ` sashiko-bot
@ 2026-09-07 11:28 ` Jani Nikula
1 sibling, 0 replies; 24+ messages in thread
From: Jani Nikula @ 2026-09-07 11:28 UTC (permalink / raw)
To: Austin Hu, intel-gfx, intel-xe
Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai
On Tue, 25 Aug 2026, Austin Hu <austin.hu@intel.com> wrote:
> When FBC Dirty Rectangle mode is enabled, any non-PLANE_SURF register
> update requires fetching the full plane frame buffer from memory to
> re-compress and update the CFB in stolen memory.
>
> Check plane state attributes during atomic commits and force a full
> CFB nuke if any setting other than the surface address changes.
Please don't combine movement and functional changes in the same patch.
>
> ---
> v2:
> - Address reviewer feedback to reuse intel_fbc_can_flip_nuke().
> ---
> Signed-off-by: Austin Hu <austin.hu@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 155 ++++++++++++++++-------
> 1 file changed, 106 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index c0fed695af0d..34c0e42dfdab 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1516,11 +1516,106 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
> intel_fbc_is_cfb_ok(plane_state);
> }
>
> +static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
> + struct intel_crtc *crtc,
> + struct intel_plane *plane)
> +{
> + struct intel_display *display = to_intel_display(state);
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> + const struct intel_plane_state *old_plane_state =
> + intel_atomic_get_old_plane_state(state, plane);
> + const struct intel_plane_state *new_plane_state =
> + intel_atomic_get_new_plane_state(state, plane);
> + const struct drm_framebuffer *old_fb = old_plane_state->hw.fb;
> + const struct drm_framebuffer *new_fb = new_plane_state->hw.fb;
> +
> + if (intel_crtc_needs_modeset(new_crtc_state))
> + return false;
> +
> + if (!intel_fbc_is_ok(old_plane_state) ||
> + !intel_fbc_is_ok(new_plane_state))
> + return false;
> +
> + if (old_fb->format->format != new_fb->format->format)
> + return false;
> +
> + if (old_fb->modifier != new_fb->modifier)
> + return false;
> +
> + if (intel_fbc_plane_stride(old_plane_state) !=
> + intel_fbc_plane_stride(new_plane_state))
> + return false;
> +
> + if (intel_fbc_cfb_stride(old_plane_state) !=
> + intel_fbc_cfb_stride(new_plane_state))
> + return false;
> +
> + if (intel_fbc_cfb_size(old_plane_state) !=
> + intel_fbc_cfb_size(new_plane_state))
> + return false;
> +
> + if (intel_fbc_override_cfb_stride(old_plane_state) !=
> + intel_fbc_override_cfb_stride(new_plane_state))
> + return false;
> +
> + if (!HAS_FBC_DIRTY_RECT(display))
> + return true;
> +
> + /*
> + * From BSpec about "FBC Dirty Rectangle", when Dirty Rectangle mode is
> + * active, partial updates only apply to surface address changes. Any other
> + * plane state modification requires Plane to fetch full-plane pixel data
> + * from memory to re-compress and update the entire CFB in stolen memory.
> + * Once fully re-compressed, subsequent atomic commits go ahead with FBC
> + * dirty rectangle updates for smooth visual updates.
> + *
> + * So check other Plane attribute changed except for its surface address by
> + * referring to intel_async_flip_check_hw() which also checks async flip.
> + */
> +
> + /* Includes pixel_blend_mode, color_encoding & color_range checking. */
> + if (old_plane_state->color_ctl != new_plane_state->color_ctl)
> + return false;
> +
> + if (!drm_rect_equals(&old_plane_state->uapi.src,
> + &new_plane_state->uapi.src) ||
> + !drm_rect_equals(&old_plane_state->uapi.dst,
> + &new_plane_state->uapi.dst))
> + return false;
> +
> + if ((old_plane_state->view.color_plane[0].x !=
> + new_plane_state->view.color_plane[0].x) ||
> + (old_plane_state->view.color_plane[0].y !=
> + new_plane_state->view.color_plane[0].y))
> + return false;
> +
> + if (old_plane_state->hw.rotation != new_plane_state->hw.rotation)
> + return false;
> +
> + if (old_plane_state->hw.alpha != new_plane_state->hw.alpha)
> + return false;
> +
> + if (skl_plane_aux_dist(old_plane_state, 0) !=
> + skl_plane_aux_dist(new_plane_state, 0))
> + return false;
> +
> + if (old_plane_state->decrypt != new_plane_state->decrypt)
> + return false;
> +
> + if (old_plane_state->cus_ctl != new_plane_state->cus_ctl)
> + return false;
> +
> + return true;
> +}
> +
> static void
> -__intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> +__intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
> + const struct intel_plane_state *plane_state,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct intel_display *display = to_intel_display(plane_state);
> struct intel_fbc *fbc = plane->fbc;
> struct drm_rect *fbc_dirty_rect = &fbc->state.dirty_rect;
> @@ -1538,7 +1633,15 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> return;
> }
>
> - if (drm_rect_visible(damage)) {
> + if (!intel_fbc_can_flip_nuke(state, crtc, plane)) {
> + if (HAS_FBC_DIRTY_RECT(display))
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] Non surf addr changed for FBC DIRTY RECT\n",
> + plane->base.base.id, plane->base.name);
> +
> + /* compress the entire region due to non PLANE_SURF updating. */
> + *fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, height);
> + } else if (drm_rect_visible(damage)) {
> int y1, y2;
>
> if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
> @@ -1598,8 +1701,7 @@ intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
> mutex_lock(&fbc->lock);
>
> if (fbc->state.plane == plane)
> - __intel_fbc_prepare_dirty_rect(plane_state,
> - crtc_state);
> + __intel_fbc_prepare_dirty_rect(state, plane_state, crtc_state);
>
> mutex_unlock(&fbc->lock);
> }
> @@ -1798,51 +1900,6 @@ int intel_fbc_min_cdclk(const struct intel_crtc_state *crtc_state)
> return min_cdclk;
> }
>
> -static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
> - struct intel_crtc *crtc,
> - struct intel_plane *plane)
> -{
> - const struct intel_crtc_state *new_crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> - const struct intel_plane_state *old_plane_state =
> - intel_atomic_get_old_plane_state(state, plane);
> - const struct intel_plane_state *new_plane_state =
> - intel_atomic_get_new_plane_state(state, plane);
> - const struct drm_framebuffer *old_fb = old_plane_state->hw.fb;
> - const struct drm_framebuffer *new_fb = new_plane_state->hw.fb;
> -
> - if (intel_crtc_needs_modeset(new_crtc_state))
> - return false;
> -
> - if (!intel_fbc_is_ok(old_plane_state) ||
> - !intel_fbc_is_ok(new_plane_state))
> - return false;
> -
> - if (old_fb->format->format != new_fb->format->format)
> - return false;
> -
> - if (old_fb->modifier != new_fb->modifier)
> - return false;
> -
> - if (intel_fbc_plane_stride(old_plane_state) !=
> - intel_fbc_plane_stride(new_plane_state))
> - return false;
> -
> - if (intel_fbc_cfb_stride(old_plane_state) !=
> - intel_fbc_cfb_stride(new_plane_state))
> - return false;
> -
> - if (intel_fbc_cfb_size(old_plane_state) !=
> - intel_fbc_cfb_size(new_plane_state))
> - return false;
> -
> - if (intel_fbc_override_cfb_stride(old_plane_state) !=
> - intel_fbc_override_cfb_stride(new_plane_state))
> - return false;
> -
> - return true;
> -}
> -
> static bool __intel_fbc_pre_update(struct intel_atomic_state *state,
> struct intel_crtc *crtc,
> struct intel_plane *plane)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 0/3] drm/i915/fbc: Dirty rectangle bounding and CFB
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (8 preceding siblings ...)
2026-08-25 16:56 ` [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
@ 2026-09-23 17:28 ` Austin Hu
2026-09-24 11:25 ` Jani Nikula
2026-09-23 17:28 ` [PATCH v3 1/3] drm/i915/display/fbc: Move intel_fbc_can_flip_nuke() higher up Austin Hu
` (3 subsequent siblings)
13 siblings, 1 reply; 24+ messages in thread
From: Austin Hu @ 2026-09-23 17:28 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai, huchao426
This series updates Intel FBC dirty rectangle handling and refactors plane
update checks:
1. Moves intel_fbc_can_flip_nuke() higher up in intel_fbc.c to avoid a
forward declaration in subsequent FBC checks. (No functional change)
2. Clamps FBC dirty rectangle bounds to valid surface limits [y_offset,
y_end] and adds logging for out-of-bounds coordinates, including
handling for 180-degree plane rotation.
3. Tracks plane state attribute changes during atomic commits. When FBC
Dirty Rectangle mode is active, partial updates only apply to surface
address changes (PLANE_SURF). Modifications to any other plane state
parameters require fetching full-plane pixel data from memory to
re-compress and update the entire CFB in stolen memory. Once fully
re-compressed, subsequent atomic commits can resume selective dirty
rectangle updates.
v2 -> v3 changes:
- Split function reordering into a separate standalone commit (v3 1/3) to
avoid mixing movement and functional changes, per maintainer feedback.
- Rebased onto latest drm-tip.
v1 -> v2 changes:
- Reused intel_fbc_can_flip_nuke() for plane update state checks as
suggested.
- Added plane Y-coordinate plane view checking (color_plane[0].y)
alongside X.
Austin Hu (2):
drm/i915/display/fbc: Move intel_fbc_can_flip_nuke() higher up
drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
Charlton Lin (1):
drm/i915/fbc: fbc_dirty_rect restrictions and logging
drivers/gpu/drm/i915/display/intel_fbc.c | 192 +++++++++++++++++------
1 file changed, 141 insertions(+), 51 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/3] drm/i915/display/fbc: Move intel_fbc_can_flip_nuke() higher up
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (9 preceding siblings ...)
2026-09-23 17:28 ` [PATCH v3 0/3] drm/i915/fbc: Dirty rectangle bounding and CFB Austin Hu
@ 2026-09-23 17:28 ` Austin Hu
2026-09-23 17:28 ` [PATCH v3 2/3] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
` (2 subsequent siblings)
13 siblings, 0 replies; 24+ messages in thread
From: Austin Hu @ 2026-09-23 17:28 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai, huchao426
Move intel_fbc_can_flip_nuke() above __intel_fbc_prepare_dirty_rect()
to allow its usage in FBC dirty rectangle checks without introducing a
forward declaration.
No functional change.
Signed-off-by: Austin Hu <austin.hu@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 90 ++++++++++++------------
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 5694d20773f8..c6f9e6506f63 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1506,6 +1506,51 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
intel_fbc_is_cfb_ok(plane_state);
}
+static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_plane *plane)
+{
+ const struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+ const struct intel_plane_state *old_plane_state =
+ intel_atomic_get_old_plane_state(state, plane);
+ const struct intel_plane_state *new_plane_state =
+ intel_atomic_get_new_plane_state(state, plane);
+ const struct drm_framebuffer *old_fb = old_plane_state->hw.fb;
+ const struct drm_framebuffer *new_fb = new_plane_state->hw.fb;
+
+ if (intel_crtc_needs_modeset(new_crtc_state))
+ return false;
+
+ if (!intel_fbc_is_ok(old_plane_state) ||
+ !intel_fbc_is_ok(new_plane_state))
+ return false;
+
+ if (old_fb->format->format != new_fb->format->format)
+ return false;
+
+ if (old_fb->modifier != new_fb->modifier)
+ return false;
+
+ if (intel_fbc_plane_stride(old_plane_state) !=
+ intel_fbc_plane_stride(new_plane_state))
+ return false;
+
+ if (intel_fbc_cfb_stride(old_plane_state) !=
+ intel_fbc_cfb_stride(new_plane_state))
+ return false;
+
+ if (intel_fbc_cfb_size(old_plane_state) !=
+ intel_fbc_cfb_size(new_plane_state))
+ return false;
+
+ if (intel_fbc_override_cfb_stride(old_plane_state) !=
+ intel_fbc_override_cfb_stride(new_plane_state))
+ return false;
+
+ return true;
+}
+
static void
__intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
const struct intel_crtc_state *crtc_state)
@@ -1755,51 +1800,6 @@ int intel_fbc_min_cdclk(const struct intel_crtc_state *crtc_state)
return min_cdclk;
}
-static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_plane *plane)
-{
- const struct intel_crtc_state *new_crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
- const struct intel_plane_state *old_plane_state =
- intel_atomic_get_old_plane_state(state, plane);
- const struct intel_plane_state *new_plane_state =
- intel_atomic_get_new_plane_state(state, plane);
- const struct drm_framebuffer *old_fb = old_plane_state->hw.fb;
- const struct drm_framebuffer *new_fb = new_plane_state->hw.fb;
-
- if (intel_crtc_needs_modeset(new_crtc_state))
- return false;
-
- if (!intel_fbc_is_ok(old_plane_state) ||
- !intel_fbc_is_ok(new_plane_state))
- return false;
-
- if (old_fb->format->format != new_fb->format->format)
- return false;
-
- if (old_fb->modifier != new_fb->modifier)
- return false;
-
- if (intel_fbc_plane_stride(old_plane_state) !=
- intel_fbc_plane_stride(new_plane_state))
- return false;
-
- if (intel_fbc_cfb_stride(old_plane_state) !=
- intel_fbc_cfb_stride(new_plane_state))
- return false;
-
- if (intel_fbc_cfb_size(old_plane_state) !=
- intel_fbc_cfb_size(new_plane_state))
- return false;
-
- if (intel_fbc_override_cfb_stride(old_plane_state) !=
- intel_fbc_override_cfb_stride(new_plane_state))
- return false;
-
- return true;
-}
-
static bool __intel_fbc_pre_update(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_plane *plane)
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/3] drm/i915/fbc: fbc_dirty_rect restrictions and logging
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (10 preceding siblings ...)
2026-09-23 17:28 ` [PATCH v3 1/3] drm/i915/display/fbc: Move intel_fbc_can_flip_nuke() higher up Austin Hu
@ 2026-09-23 17:28 ` Austin Hu
2026-09-23 17:44 ` sashiko-bot
2026-09-23 17:28 ` [PATCH v3 3/3] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
2026-09-24 0:56 ` ✗ Fi.CI.BUILD: failure for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Patchwork
13 siblings, 1 reply; 24+ messages in thread
From: Austin Hu @ 2026-09-23 17:28 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai, huchao426
From: Charlton Lin <charlton.lin@intel.com>
Clamp the FBC dirty rectangle coordinates to the valid frame buffer
range [y_offset, y_end] to prevent out-of-bounds coordinates, and
log a debug message when clamping occurs.
Signed-off-by: Charlton Lin <charlton.lin@intel.com>
Signed-off-by: Austin Hu <austin.hu@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 39 ++++++++++++++++++++++--
1 file changed, 36 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index c6f9e6506f63..3915dea9edb1 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1556,11 +1556,14 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
const struct intel_crtc_state *crtc_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_fbc *fbc = plane->fbc;
struct drm_rect *fbc_dirty_rect = &fbc->state.dirty_rect;
int width = drm_rect_width(&plane_state->uapi.src) >> 16;
+ int height = drm_rect_height(&plane_state->uapi.src) >> 16;
const struct drm_rect *damage = &plane_state->damage;
int y_offset = plane_state->view.color_plane[0].y;
+ int y_end = y_offset + height;
lockdep_assert_held(&fbc->lock);
@@ -1570,11 +1573,41 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
return;
}
- if (drm_rect_visible(damage))
- *fbc_dirty_rect = *damage;
- else
+ if (drm_rect_visible(damage)) {
+ int y1, y2;
+
+ if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
+ /* Under 180 degree rotation, coordinate system is inverted */
+ int inv_y1 = height - damage->y2;
+ int inv_y2 = height - damage->y1;
+
+ y1 = clamp(y_offset + inv_y1, y_offset, y_end);
+ y2 = clamp(y_offset + inv_y2, y_offset, y_end);
+ } else {
+ y1 = clamp(damage->y1, y_offset, y_end);
+ y2 = clamp(damage->y2, y_offset, y_end);
+ }
+
+ /*
+ * Clamp dirty rect to the valid FB range [y_offset, y_end].
+ * Per Bspec:
+ * start_line >= y_offset
+ * end_line <= y_offset + plane_height
+ */
+ if (y1 != damage->y1 || y2 != damage->y2)
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] FBC dirty rect out of range: y1=%d y2=%d clamped to y1=%d y2=%d (y_offset=%d y_end=%d)\n",
+ plane->base.base.id, plane->base.name,
+ damage->y1, damage->y2, y1, y2, y_offset, y_end);
+
+ fbc_dirty_rect->x1 = damage->x1;
+ fbc_dirty_rect->x2 = damage->x2;
+ fbc_dirty_rect->y1 = y1;
+ fbc_dirty_rect->y2 = y2;
+ } else {
/* dirty rect must cover at least one line */
*fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, 1);
+ }
}
void
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/3] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (11 preceding siblings ...)
2026-09-23 17:28 ` [PATCH v3 2/3] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
@ 2026-09-23 17:28 ` Austin Hu
2026-09-23 17:45 ` sashiko-bot
2026-09-24 0:56 ` ✗ Fi.CI.BUILD: failure for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Patchwork
13 siblings, 1 reply; 24+ messages in thread
From: Austin Hu @ 2026-09-23 17:28 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai, huchao426
When FBC Dirty Rectangle mode is enabled, any non-PLANE_SURF register
update requires fetching the full plane frame buffer from memory to
re-compress and update the CFB in stolen memory.
Check plane state attributes during atomic commits and force a full
CFB nuke if any setting other than the surface address changes.
v2: Address reviewer feedback to reuse intel_fbc_can_flip_nuke().
v3: Address reviewer feedback not to combine intel_fbc_can_flip_nuke()
movement and changes.
Signed-off-by: Austin Hu <austin.hu@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 65 ++++++++++++++++++++++--
1 file changed, 61 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 3915dea9edb1..0d3b25e7a9fc 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1510,6 +1510,7 @@ static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_plane *plane)
{
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_plane_state *old_plane_state =
@@ -1548,14 +1549,63 @@ static bool intel_fbc_can_flip_nuke(struct intel_atomic_state *state,
intel_fbc_override_cfb_stride(new_plane_state))
return false;
+ if (!HAS_FBC_DIRTY_RECT(display))
+ return true;
+
+ /*
+ * From BSpec about "FBC Dirty Rectangle", when Dirty Rectangle mode is
+ * active, partial updates only apply to surface address changes. Any other
+ * plane state modification requires Plane to fetch full-plane pixel data
+ * from memory to re-compress and update the entire CFB in stolen memory.
+ * Once fully re-compressed, subsequent atomic commits go ahead with FBC
+ * dirty rectangle updates for smooth visual updates.
+ *
+ * So check other Plane attribute changed except for its surface address by
+ * referring to intel_async_flip_check_hw() which also checks async flip.
+ */
+
+ /* Includes pixel_blend_mode, color_encoding & color_range checking. */
+ if (old_plane_state->color_ctl != new_plane_state->color_ctl)
+ return false;
+
+ if (!drm_rect_equals(&old_plane_state->uapi.src,
+ &new_plane_state->uapi.src) ||
+ !drm_rect_equals(&old_plane_state->uapi.dst,
+ &new_plane_state->uapi.dst))
+ return false;
+
+ if (old_plane_state->view.color_plane[0].x !=
+ new_plane_state->view.color_plane[0].x ||
+ old_plane_state->view.color_plane[0].y !=
+ new_plane_state->view.color_plane[0].y)
+ return false;
+
+ if (old_plane_state->hw.rotation != new_plane_state->hw.rotation)
+ return false;
+
+ if (old_plane_state->hw.alpha != new_plane_state->hw.alpha)
+ return false;
+
+ if (skl_plane_aux_dist(old_plane_state, 0) !=
+ skl_plane_aux_dist(new_plane_state, 0))
+ return false;
+
+ if (old_plane_state->decrypt != new_plane_state->decrypt)
+ return false;
+
+ if (old_plane_state->cus_ctl != new_plane_state->cus_ctl)
+ return false;
+
return true;
}
static void
-__intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
+__intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
+ const struct intel_plane_state *plane_state,
const struct intel_crtc_state *crtc_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct intel_display *display = to_intel_display(plane_state);
struct intel_fbc *fbc = plane->fbc;
struct drm_rect *fbc_dirty_rect = &fbc->state.dirty_rect;
@@ -1573,7 +1623,15 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
return;
}
- if (drm_rect_visible(damage)) {
+ if (!intel_fbc_can_flip_nuke(state, crtc, plane)) {
+ if (HAS_FBC_DIRTY_RECT(display))
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] Non surf addr changed for FBC DIRTY RECT\n",
+ plane->base.base.id, plane->base.name);
+
+ /* compress the entire region due to non PLANE_SURF updating. */
+ *fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, height);
+ } else if (drm_rect_visible(damage)) {
int y1, y2;
if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
@@ -1633,8 +1691,7 @@ intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
mutex_lock(&fbc->lock);
if (fbc->state.plane == plane)
- __intel_fbc_prepare_dirty_rect(plane_state,
- crtc_state);
+ __intel_fbc_prepare_dirty_rect(state, plane_state, crtc_state);
mutex_unlock(&fbc->lock);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/3] drm/i915/fbc: fbc_dirty_rect restrictions and logging
2026-09-23 17:28 ` [PATCH v3 2/3] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
@ 2026-09-23 17:44 ` sashiko-bot
0 siblings, 0 replies; 24+ messages in thread
From: sashiko-bot @ 2026-09-23 17:44 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/i915/fbc: invalid FBC dirty rect for 180-degree rotation when y_offset > 0
- [Medium] drm/i915/fbc: spurious debug log spam on 180-degree rotated planes
--
commit e741ad7c090c4e479fc0c403a1f27d2b43fe1e44
Author: Charlton Lin <charlton.lin@intel.com>
drm/i915/fbc: fbc_dirty_rect restrictions and logging
Clamp the FBC dirty rectangle coordinates to the valid frame buffer
range [y_offset, y_end] to prevent out-of-bounds coordinates, and
log a debug message when clamping occurs.
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 0f841e5b42826..e8583092de663 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
[ ... ]
> @@ -1580,11 +1583,41 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> return;
> }
>
> - if (drm_rect_visible(damage))
> - *fbc_dirty_rect = *damage;
> - else
> + if (drm_rect_visible(damage)) {
> + int y1, y2;
> +
> + if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
> + /* Under 180 degree rotation, coordinate system is inverted */
> + int inv_y1 = height - damage->y2;
> + int inv_y2 = height - damage->y1;
> +
> + y1 = clamp(y_offset + inv_y1, y_offset, y_end);
> + y2 = clamp(y_offset + inv_y2, y_offset, y_end);
[Severity: High]
Does this math work correctly when y_offset is greater than 0?
Since damage coordinates are in absolute framebuffer space and bounded by
[y_offset, y_end], damage->y2 can be larger than height when y_offset > 0.
This would cause inv_y1 to become negative.
Adding this negative value to y_offset makes the result less than y_offset,
causing the clamp() to always collapse the dirty rect coordinate to y_offset.
Will this cause screen update failures for rotated planes with a source crop?
> + } else {
> + y1 = clamp(damage->y1, y_offset, y_end);
> + y2 = clamp(damage->y2, y_offset, y_end);
> + }
> +
> + /*
> + * Clamp dirty rect to the valid FB range [y_offset, y_end].
> + * Per Bspec:
> + * start_line >= y_offset
> + * end_line <= y_offset + plane_height
> + */
> + if (y1 != damage->y1 || y2 != damage->y2)
[Severity: Medium]
Will this condition generate false positive log spam when the plane has
180-degree rotation?
For a rotated plane, y1 and y2 are computed as inverted coordinates, but
this check compares them directly against the original non-inverted damage
coordinates. Since inversion naturally changes the coordinate values,
won't this almost always evaluate to true and falsely log that clamping
occurred?
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] FBC dirty rect out of range: y1=%d y2=%d clamped to y1=%d y2=%d (y_offset=%d y_end=%d)\n",
> + plane->base.base.id, plane->base.name,
> + damage->y1, damage->y2, y1, y2, y_offset, y_end);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260923172803.1011636-1-austin.hu@intel.com?part=2
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 3/3] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
2026-09-23 17:28 ` [PATCH v3 3/3] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
@ 2026-09-23 17:45 ` sashiko-bot
0 siblings, 0 replies; 24+ messages in thread
From: sashiko-bot @ 2026-09-23 17:45 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-xe, intel-gfx
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] drm/i915/fbc: redundant full dirty rect assignment is dead code
--
commit b3f8f671dc6c5ad11aa10ae1d17ed6ba529a91c9
Author: Austin Hu <austin.hu@intel.com>
drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
When FBC Dirty Rectangle mode is enabled, any non-PLANE_SURF register
update requires fetching the full plane frame buffer from memory to
re-compress and update the CFB in stolen memory. This commit checks
plane state attributes during atomic commits and forces a full CFB nuke
if any setting other than the surface address changes.
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index e8583092de663..1ab583eadfcb3 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
[ ... ]
> @@ -1583,7 +1633,15 @@ __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
> return;
> }
>
> - if (drm_rect_visible(damage)) {
> + if (!intel_fbc_can_flip_nuke(state, crtc, plane)) {
> + if (HAS_FBC_DIRTY_RECT(display))
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] Non surf addr changed for FBC DIRTY RECT\n",
> + plane->base.base.id, plane->base.name);
> +
> + /* compress the entire region due to non PLANE_SURF updating. */
> + *fbc_dirty_rect = DRM_RECT_INIT(0, y_offset, width, height);
[Severity: Low]
Is this fallback assignment to *fbc_dirty_rect dead code?
If intel_fbc_can_flip_nuke() returns false here, that same condition causes
__intel_fbc_pre_update() to unconditionally call intel_fbc_deactivate(),
disabling FBC in hardware.
When FBC is subsequently reactivated in __intel_fbc_post_update(), the
hardware naturally fetches the entire plane from scratch to build the initial
compressed framebuffer.
Doesn't this disable/enable cycle bypass the programmed XE3_FBC_DIRTY_RECT
register on the first frame, meaning this assignment never takes effect?
> + } else if (drm_rect_visible(damage)) {
> int y1, y2;
>
> if (plane_state->hw.rotation & DRM_MODE_ROTATE_180) {
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260923172803.1011636-1-austin.hu@intel.com?part=3
^ permalink raw reply [flat|nested] 24+ messages in thread
* ✗ Fi.CI.BUILD: failure for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
` (12 preceding siblings ...)
2026-09-23 17:28 ` [PATCH v3 3/3] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
@ 2026-09-24 0:56 ` Patchwork
13 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2026-09-24 0:56 UTC (permalink / raw)
To: Austin Hu; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling
URL : https://patchwork.freedesktop.org/series/172104/
State : failure
== Summary ==
Error: patch https://patchwork.freedesktop.org/api/1.0/series/172104/revisions/1/mbox/ not applied
Applying: drm/i915/fbc: fbc_dirty_rect restrictions and logging
Applying: drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
Applying: drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/display/intel_fbc.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0003 drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 0/3] drm/i915/fbc: Dirty rectangle bounding and CFB
2026-09-23 17:28 ` [PATCH v3 0/3] drm/i915/fbc: Dirty rectangle bounding and CFB Austin Hu
@ 2026-09-24 11:25 ` Jani Nikula
2026-09-25 21:59 ` Hu, Austin
0 siblings, 1 reply; 24+ messages in thread
From: Jani Nikula @ 2026-09-24 11:25 UTC (permalink / raw)
To: Austin Hu, intel-gfx, intel-xe
Cc: ville.syrjala, maarten.lankhorst, vinod.govindapillai, huchao426
On Wed, 23 Sep 2026, Austin Hu <austin.hu@intel.com> wrote:
> This series updates Intel FBC dirty rectangle handling and refactors plane
> update checks:
Please base your work on drm-tip and send new versions of the series as
standalone threads instead of in-reply-to previous versions.
BR,
Jani.
>
> 1. Moves intel_fbc_can_flip_nuke() higher up in intel_fbc.c to avoid a
> forward declaration in subsequent FBC checks. (No functional change)
> 2. Clamps FBC dirty rectangle bounds to valid surface limits [y_offset,
> y_end] and adds logging for out-of-bounds coordinates, including
> handling for 180-degree plane rotation.
> 3. Tracks plane state attribute changes during atomic commits. When FBC
> Dirty Rectangle mode is active, partial updates only apply to surface
> address changes (PLANE_SURF). Modifications to any other plane state
> parameters require fetching full-plane pixel data from memory to
> re-compress and update the entire CFB in stolen memory. Once fully
> re-compressed, subsequent atomic commits can resume selective dirty
> rectangle updates.
>
> v2 -> v3 changes:
> - Split function reordering into a separate standalone commit (v3 1/3) to
> avoid mixing movement and functional changes, per maintainer feedback.
> - Rebased onto latest drm-tip.
>
> v1 -> v2 changes:
> - Reused intel_fbc_can_flip_nuke() for plane update state checks as
> suggested.
> - Added plane Y-coordinate plane view checking (color_plane[0].y)
> alongside X.
>
> Austin Hu (2):
> drm/i915/display/fbc: Move intel_fbc_can_flip_nuke() higher up
> drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes
>
> Charlton Lin (1):
> drm/i915/fbc: fbc_dirty_rect restrictions and logging
>
> drivers/gpu/drm/i915/display/intel_fbc.c | 192 +++++++++++++++++------
> 1 file changed, 141 insertions(+), 51 deletions(-)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 0/3] drm/i915/fbc: Dirty rectangle bounding and CFB
2026-09-24 11:25 ` Jani Nikula
@ 2026-09-25 21:59 ` Hu, Austin
0 siblings, 0 replies; 24+ messages in thread
From: Hu, Austin @ 2026-09-25 21:59 UTC (permalink / raw)
To: Jani Nikula, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, maarten.lankhorst@linux.intel.com,
Govindapillai, Vinod, huchao426@gmail.com
On Thu, 24 Sep 2026, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> Please base your work on drm-tip and send new versions of the series as
> standalone threads instead of in-reply-to previous versions.
Thanks for the feedback, Jani! I have rebased on drm-tip and dispatched v4 as a
standalone top-level thread.
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2026-09-25 21:59 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-12 21:53 [PATCH 0/2] drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Austin Hu
2026-08-12 21:53 ` [PATCH 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
2026-08-12 22:08 ` sashiko-bot
2026-08-12 21:53 ` [PATCH 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
2026-08-12 22:10 ` sashiko-bot
2026-08-12 22:03 ` ✓ CI.KUnit: success for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Patchwork
2026-08-12 22:44 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-12 22:57 ` ✗ i915.CI.BAT: failure " Patchwork
2026-08-13 5:40 ` ✗ Xe.CI.FULL: " Patchwork
2026-08-25 16:56 ` [PATCH v2 0/2] drm/i915/fbc: Dirty rectangle bounding " Austin Hu
2026-08-25 16:56 ` [PATCH v2 1/2] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
2026-08-25 17:16 ` sashiko-bot
2026-08-25 16:56 ` [PATCH v2 2/2] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
2026-08-25 17:13 ` sashiko-bot
2026-09-07 11:28 ` Jani Nikula
2026-09-23 17:28 ` [PATCH v3 0/3] drm/i915/fbc: Dirty rectangle bounding and CFB Austin Hu
2026-09-24 11:25 ` Jani Nikula
2026-09-25 21:59 ` Hu, Austin
2026-09-23 17:28 ` [PATCH v3 1/3] drm/i915/display/fbc: Move intel_fbc_can_flip_nuke() higher up Austin Hu
2026-09-23 17:28 ` [PATCH v3 2/3] drm/i915/fbc: fbc_dirty_rect restrictions and logging Austin Hu
2026-09-23 17:44 ` sashiko-bot
2026-09-23 17:28 ` [PATCH v3 3/3] drm/i915/fbc: nuke CFB if Plane setting (except for surf addr) changes Austin Hu
2026-09-23 17:45 ` sashiko-bot
2026-09-24 0:56 ` ✗ Fi.CI.BUILD: failure for drm/i915/fbc: Dirty rectangle bounds enforcement and CFB nuke handling Patchwork
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