* [CI v2] drm/xe/vram: Add early VRAM health check
@ 2026-08-26 15:24 Matthew Auld
2026-08-26 16:34 ` ✓ CI.KUnit: success for drm/xe/vram: Add early VRAM health check (rev2) Patchwork
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Matthew Auld @ 2026-08-26 15:24 UTC (permalink / raw)
To: intel-xe
DO NOT REVIEW.
Use the last page as a canary for BAR sizing, CCS sizing, identity map
setup. If something is wrong the last page is where we will find it. Hit
it with everything we have. Test here should be non-destructive and fast.
Assisted-by: Gemini:gemini-3.1-pro-preview
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 15 ++-
drivers/gpu/drm/xe/xe_migrate.c | 68 ++++++++++
drivers/gpu/drm/xe/xe_migrate.h | 6 +
drivers/gpu/drm/xe/xe_tile_types.h | 4 +
drivers/gpu/drm/xe/xe_vram.c | 208 +++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_vram.h | 10 ++
6 files changed, 308 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 74d566693dfd..0a5021f85d90 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -1051,22 +1051,28 @@ int xe_device_probe(struct xe_device *xe)
if (err)
return err;
+ xe_vram_reserve_memtest_bo(xe);
+
for_each_tile(tile, xe, id) {
err = xe_tile_init(tile);
if (err)
- return err;
+ goto err_free_memtest;
}
err = xe_irq_install(xe);
if (err)
- return err;
+ goto err_free_memtest;
for_each_gt(gt, xe, id) {
err = xe_gt_init(gt);
if (err)
- return err;
+ goto err_free_memtest;
}
+ err = xe_vram_memtest(xe);
+ if (err)
+ return err;
+
err = xe_pagefault_init(xe);
if (err)
return err;
@@ -1169,6 +1175,9 @@ int xe_device_probe(struct xe_device *xe)
xe_display_unregister(xe);
drm_dev_unregister(&xe->drm);
+err_free_memtest:
+ xe_vram_free_memtest_bos(xe);
+
return err;
}
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 75b83687f1b5..d46bc1490291 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -2633,3 +2633,71 @@ void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
#include "tests/xe_migrate.c"
#endif
+
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
+void xe_migrate_debug_ccs_overlap(struct xe_migrate *m,
+ struct xe_bo *last_page_bo,
+ struct xe_bo *scratch_bo)
+{
+ struct xe_device *xe = tile_to_xe(m->tile);
+ struct xe_gt *gt = m->tile->primary_gt;
+ struct dma_fence *fence;
+ struct xe_bb *bb;
+ struct xe_sched_job *job;
+ u64 first_page_dpa, clear_L0_ofs, scratch_dpa, scratch_L0_ofs, ccs_size;
+ int num_loops;
+
+ if (!xe_device_has_flat_ccs(xe))
+ return;
+
+ ccs_size = m->tile->mem.vram->usable_size / 256;
+ if (ccs_size > SZ_1M)
+ ccs_size = SZ_1M;
+
+ num_loops = DIV_ROUND_UP_ULL(ccs_size, 256 * 1024);
+
+ first_page_dpa = xe_vram_region_dpa_base(m->tile->mem.vram);
+ clear_L0_ofs = xe_migrate_vram_ofs(xe, first_page_dpa, true);
+
+ scratch_dpa = xe_bo_addr(scratch_bo, 0, XE_PAGE_SIZE);
+ scratch_L0_ofs = xe_migrate_vram_ofs(xe, scratch_dpa, false);
+
+ for (int j = 0; j < num_loops; j++) {
+ bb = xe_bb_new(gt, 256, xe->info.has_usm);
+ if (IS_ERR(bb)) {
+ drm_warn(&xe->drm, "Failed to create bb for VRAM overlap check\n");
+ return;
+ }
+
+ for (int i = 0; i < 16; i++) {
+ int idx = (j * 16) + i;
+ /* 4MB payload = 16KB CCS metadata */
+ emit_copy_ccs(gt, bb, scratch_L0_ofs + (idx * 16384), false,
+ clear_L0_ofs + (idx * SZ_4M), true, SZ_4M);
+ }
+
+ bb->cs[bb->len++] = MI_BATCH_BUFFER_END;
+
+ job = xe_bb_create_migration_job(m->q, bb,
+ xe_migrate_batch_base(m, xe->info.has_usm),
+ 0);
+ if (!IS_ERR(job)) {
+ xe_sched_job_add_migrate_flush(job, MI_FLUSH_DW_CCS);
+
+ mutex_lock(&m->job_mutex);
+ xe_sched_job_arm(job);
+
+ fence = dma_fence_get(&job->drm.s_fence->finished);
+ xe_sched_job_push(job);
+ mutex_unlock(&m->job_mutex);
+
+ dma_fence_wait(fence, false);
+ dma_fence_put(fence);
+ } else {
+ drm_warn(&xe->drm, "Failed to create job for VRAM overlap check\n");
+ }
+
+ xe_bb_free(bb, NULL);
+ }
+}
+#endif
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index c3a268b01768..a5ca5d6d1698 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -182,4 +182,10 @@ static inline void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
void xe_migrate_job_lock(struct xe_migrate *m, struct xe_exec_queue *q);
void xe_migrate_job_unlock(struct xe_migrate *m, struct xe_exec_queue *q);
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
+void xe_migrate_debug_ccs_overlap(struct xe_migrate *m,
+ struct xe_bo *last_page_bo,
+ struct xe_bo *scratch_bo);
+#endif
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_tile_types.h b/drivers/gpu/drm/xe/xe_tile_types.h
index 0048100ccb72..e1368c04846a 100644
--- a/drivers/gpu/drm/xe/xe_tile_types.h
+++ b/drivers/gpu/drm/xe/xe_tile_types.h
@@ -97,6 +97,10 @@ struct xe_tile {
* Only main GT has page reclaim list allocations.
*/
struct xe_sa_manager *reclaim_pool;
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
+ /** @mem.memtest_bo: VRAM overlap check BO */
+ struct xe_bo *memtest_bo;
+#endif
} mem;
/** @sriov: tile level virtualization data */
diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index 23eb7edbdd57..afe3e77af1c2 100644
--- a/drivers/gpu/drm/xe/xe_vram.c
+++ b/drivers/gpu/drm/xe/xe_vram.c
@@ -3,6 +3,8 @@
* Copyright © 2021-2024 Intel Corporation
*/
+#include "linux/sizes.h"
+#include "vdso/align.h"
#include <kunit/visibility.h>
#include <linux/pci.h>
@@ -17,8 +19,11 @@
#include "xe_device.h"
#include "xe_force_wake.h"
#include "xe_gt_mcr.h"
+#include "xe_map.h"
+#include "xe_migrate.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
+#include "xe_tile.h"
#include "xe_tile_sriov_vf.h"
#include "xe_ttm_vram_mgr.h"
#include "xe_vram.h"
@@ -89,6 +94,11 @@ static int get_flat_ccs_offset(struct xe_gt *gt, u64 tile_size, u64 *poffset)
offset = offset_hi << 32; /* HW view bits 39:32 */
offset |= offset_lo << 6; /* HW view bits 31:6 */
offset *= num_enabled; /* convert to SW view */
+
+ if (!IS_ALIGNED(offset, SZ_128K))
+ drm_info(&xe->drm, "CCS base misaligned: %llx\n",
+ offset);
+
offset = round_up(offset, SZ_128K); /* SW must round up to nearest 128K */
/* We don't expect any holes */
@@ -387,3 +397,201 @@ resource_size_t xe_vram_region_actual_physical_size(const struct xe_vram_region
return vram ? vram->actual_physical_size : 0;
}
EXPORT_SYMBOL_IF_KUNIT(xe_vram_region_actual_physical_size);
+
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
+void xe_vram_reserve_memtest_bo(struct xe_device *xe)
+{
+ struct xe_tile *tile;
+ u8 id;
+
+ for_each_tile(tile, xe, id) {
+ u64 vram_size;
+
+ if (!tile->mem.vram)
+ continue;
+
+ if (tile->mem.vram->io_size < tile->mem.vram->usable_size) {
+ drm_info(&xe->drm,
+ "Tile %d: Small-BAR system detected, skipping VRAM memtest\n",
+ id);
+ continue;
+ }
+
+ vram_size = tile->mem.vram->usable_size;
+
+ tile->mem.memtest_bo = xe_bo_create_pin_map_at_novm(xe, tile, SZ_64K,
+ vram_size - SZ_64K,
+ ttm_bo_type_kernel,
+ XE_BO_FLAG_VRAM_IF_DGFX(tile),
+ 0, false);
+ if (IS_ERR(tile->mem.memtest_bo)) {
+ drm_warn(&xe->drm, "Tile %d: Failed to reserve memtest BO\n", id);
+ tile->mem.memtest_bo = NULL;
+ continue;
+ }
+
+ drm_info(&xe->drm, "Tile %d: Reserved memtest BO at offset 0x%llx\n",
+ id, vram_size - SZ_64K);
+ }
+}
+
+void xe_vram_free_memtest_bos(struct xe_device *xe)
+{
+ struct xe_tile *tile;
+ u8 id;
+
+ for_each_tile(tile, xe, id) {
+ if (tile->mem.memtest_bo) {
+ xe_bo_unpin_map_no_vm(tile->mem.memtest_bo);
+ tile->mem.memtest_bo = NULL;
+ }
+ }
+}
+
+int xe_vram_memtest(struct xe_device *xe)
+{
+ struct xe_tile *tile;
+ u8 id;
+ int err = 0;
+
+ for_each_tile(tile, xe, id) {
+ struct xe_bo *last_page_bo = tile->mem.memtest_bo;
+ struct dma_fence *fence;
+ bool overlap = false;
+ int i;
+ u8 val;
+
+ if (!last_page_bo || !tile->migrate)
+ continue;
+
+ drm_info(&xe->drm, "Tile %d: Running VRAM memtest...\n", id);
+
+ /* 1. CPU write and readback first and last byte of the last page */
+ xe_map_wr(xe, &last_page_bo->vmap, 0, u8, 0xA5);
+ xe_map_wr(xe, &last_page_bo->vmap, SZ_64K - 1, u8, 0x5A);
+
+ /* Ensure CPU writes are flushed before CPU reads/GPU execution */
+ wmb();
+ /* Ensure CPU reads see the flushed memory state */
+ rmb();
+
+ val = xe_map_rd(xe, &last_page_bo->vmap, 0, u8);
+ if (drm_WARN(&xe->drm, val != 0xA5,
+ "Tile %d: CPU memtest failed at offset 0 (expected 0xA5, got 0x%02x)\n",
+ id, val)) {
+ err = -EIO;
+ goto unpin;
+ }
+
+ val = xe_map_rd(xe, &last_page_bo->vmap, SZ_64K - 1, u8);
+ if (drm_WARN(&xe->drm, val != 0x5A,
+ "Tile %d: CPU memtest failed at offset 65535 (expected 0x5A, got 0x%02x)\n",
+ id, val)) {
+ err = -EIO;
+ goto unpin;
+ }
+
+ /* 2. Non-CCS access via GPU on the last page */
+ xe_bo_lock(last_page_bo, false);
+ fence = xe_migrate_clear(tile->migrate, last_page_bo,
+ last_page_bo->ttm.resource,
+ XE_MIGRATE_CLEAR_FLAG_BO_DATA);
+ xe_bo_unlock(last_page_bo);
+
+ if (!IS_ERR(fence)) {
+ dma_fence_wait(fence, false);
+ dma_fence_put(fence);
+ } else {
+ err = PTR_ERR(fence);
+ goto unpin;
+ }
+
+ /* Ensure CPU reads see GPU execution results */
+ rmb();
+
+ val = xe_map_rd(xe, &last_page_bo->vmap, 0, u8);
+ if (drm_WARN(&xe->drm, val != 0x00,
+ "Tile %d: GPU memtest clear failed at offset 0 (expected 0x00, got 0x%02x)\n",
+ id, val)) {
+ err = -EIO;
+ goto unpin;
+ }
+
+ if (xe_device_has_flat_ccs(xe)) {
+ struct xe_bo *scratch_bo_before;
+ struct xe_bo *scratch_bo_after;
+
+ scratch_bo_before = xe_bo_create_pin_map_novm(xe, tile, SZ_1M,
+ ttm_bo_type_kernel,
+ XE_BO_FLAG_VRAM_IF_DGFX(tile),
+ false);
+ if (IS_ERR(scratch_bo_before)) {
+ err = PTR_ERR(scratch_bo_before);
+ goto unpin;
+ }
+
+ scratch_bo_after = xe_bo_create_pin_map_novm(xe, tile, SZ_1M,
+ ttm_bo_type_kernel,
+ XE_BO_FLAG_VRAM_IF_DGFX(tile),
+ false);
+ if (IS_ERR(scratch_bo_after)) {
+ xe_bo_unpin_map_no_vm(scratch_bo_before);
+ err = PTR_ERR(scratch_bo_after);
+ goto unpin;
+ }
+
+ /* Step 1: Baseline CCS read */
+ xe_migrate_debug_ccs_overlap(tile->migrate, last_page_bo,
+ scratch_bo_before);
+
+ /* Step 2: CPU write payload to the last page */
+ xe_map_memset(xe, &last_page_bo->vmap, 0, 0xFF, SZ_64K);
+ /* Ensure CPU writes are flushed before GPU execution */
+ wmb();
+
+ /* Step 3: Second CCS read */
+ xe_migrate_debug_ccs_overlap(tile->migrate, last_page_bo, scratch_bo_after);
+ /* Ensure CPU reads see GPU execution results */
+ rmb();
+
+ /*
+ * If the bounds are wrong, the CPU's write to last_page_bo
+ * physically overwrote the CCS metadata of PA 0.
+ * The CCS metadata will have changed between the two reads.
+ */
+ u64 ccs_size = tile->mem.vram->usable_size / 256;
+
+ if (ccs_size > SZ_1M)
+ ccs_size = SZ_1M;
+
+ for (i = 0; i < ccs_size; i += 8) {
+ if (xe_map_rd(xe, &scratch_bo_before->vmap, i, u64) !=
+ xe_map_rd(xe, &scratch_bo_after->vmap, i, u64)) {
+ overlap = true;
+ break;
+ }
+ }
+
+ xe_bo_unpin_map_no_vm(scratch_bo_before);
+ xe_bo_unpin_map_no_vm(scratch_bo_after);
+ }
+
+ if (drm_WARN(&xe->drm, overlap,
+ "Tile %d: VRAM bounds overlap CCS region! VRAM sizing is incorrect.\n",
+ id)) {
+ err = -EINVAL;
+ goto unpin;
+ }
+
+ drm_info(&xe->drm, "Tile %d: VRAM memtest completed.\n", id);
+
+unpin:
+ if (err)
+ break;
+ }
+
+ xe_vram_free_memtest_bos(xe);
+
+ return err;
+}
+#endif
diff --git a/drivers/gpu/drm/xe/xe_vram.h b/drivers/gpu/drm/xe/xe_vram.h
index dd1c8bf17922..0649b21c859a 100644
--- a/drivers/gpu/drm/xe/xe_vram.h
+++ b/drivers/gpu/drm/xe/xe_vram.h
@@ -23,4 +23,14 @@ resource_size_t xe_vram_region_dpa_base(const struct xe_vram_region *vram);
resource_size_t xe_vram_region_usable_size(const struct xe_vram_region *vram);
resource_size_t xe_vram_region_actual_physical_size(const struct xe_vram_region *vram);
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
+void xe_vram_reserve_memtest_bo(struct xe_device *xe);
+void xe_vram_free_memtest_bos(struct xe_device *xe);
+int xe_vram_memtest(struct xe_device *xe);
+#else
+static inline void xe_vram_reserve_memtest_bo(struct xe_device *xe) {}
+static inline void xe_vram_free_memtest_bos(struct xe_device *xe) {}
+static inline int xe_vram_memtest(struct xe_device *xe) { return 0; }
+#endif
+
#endif
--
2.55.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✓ CI.KUnit: success for drm/xe/vram: Add early VRAM health check (rev2)
2026-08-26 15:24 [CI v2] drm/xe/vram: Add early VRAM health check Matthew Auld
@ 2026-08-26 16:34 ` Patchwork
2026-08-26 17:22 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-26 20:54 ` ✗ Xe.CI.FULL: " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2026-08-26 16:34 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
== Series Details ==
Series: drm/xe/vram: Add early VRAM health check (rev2)
URL : https://patchwork.freedesktop.org/series/172786/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:33:10] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:33:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:33:46] Starting KUnit Kernel (1/1)...
[16:33:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:33:47] ================== guc_buf (11 subtests) ===================
[16:33:47] [PASSED] test_smallest
[16:33:47] [PASSED] test_largest
[16:33:47] [PASSED] test_granular
[16:33:47] [PASSED] test_unique
[16:33:47] [PASSED] test_overlap
[16:33:47] [PASSED] test_reusable
[16:33:47] [PASSED] test_too_big
[16:33:47] [PASSED] test_flush
[16:33:47] [PASSED] test_lookup
[16:33:47] [PASSED] test_data
[16:33:47] [PASSED] test_class
[16:33:47] ===================== [PASSED] guc_buf =====================
[16:33:47] =================== guc_dbm (7 subtests) ===================
[16:33:47] [PASSED] test_empty
[16:33:47] [PASSED] test_default
[16:33:47] ======================== test_size ========================
[16:33:47] [PASSED] 4
[16:33:47] [PASSED] 8
[16:33:47] [PASSED] 32
[16:33:47] [PASSED] 256
[16:33:47] ==================== [PASSED] test_size ====================
[16:33:47] ======================= test_reuse ========================
[16:33:47] [PASSED] 4
[16:33:47] [PASSED] 8
[16:33:47] [PASSED] 32
[16:33:47] [PASSED] 256
[16:33:47] =================== [PASSED] test_reuse ====================
[16:33:47] =================== test_range_overlap ====================
[16:33:47] [PASSED] 4
[16:33:47] [PASSED] 8
[16:33:47] [PASSED] 32
[16:33:47] [PASSED] 256
[16:33:47] =============== [PASSED] test_range_overlap ================
[16:33:47] =================== test_range_compact ====================
[16:33:47] [PASSED] 4
[16:33:47] [PASSED] 8
[16:33:47] [PASSED] 32
[16:33:47] [PASSED] 256
[16:33:47] =============== [PASSED] test_range_compact ================
[16:33:47] ==================== test_range_spare =====================
[16:33:47] [PASSED] 4
[16:33:47] [PASSED] 8
[16:33:47] [PASSED] 32
[16:33:47] [PASSED] 256
[16:33:47] ================ [PASSED] test_range_spare =================
[16:33:47] ===================== [PASSED] guc_dbm =====================
[16:33:47] =================== guc_idm (6 subtests) ===================
[16:33:47] [PASSED] bad_init
[16:33:47] [PASSED] no_init
[16:33:47] [PASSED] init_fini
[16:33:47] [PASSED] check_used
[16:33:47] [PASSED] check_quota
[16:33:47] [PASSED] check_all
[16:33:47] ===================== [PASSED] guc_idm =====================
[16:33:47] =============== guc_klv_helpers (9 subtests) ===============
[16:33:47] [PASSED] test_count
[16:33:47] [PASSED] test_encode_u32
[16:33:47] [PASSED] test_encode_u64
[16:33:47] [PASSED] test_encode_string
[16:33:47] [PASSED] test_encode_object_raw
[16:33:47] [PASSED] test_encode_object_klv
[16:33:47] [PASSED] test_encode_object_nested
[16:33:47] [PASSED] test_encode_object_basic
[16:33:47] [PASSED] test_print
[16:33:47] ================= [PASSED] guc_klv_helpers =================
[16:33:47] =================== xe_log (4 subtests) ====================
[16:33:47] [PASSED] demo_cper
[16:33:47] [PASSED] demo_dmesg
[16:33:47] ======================= test_dmesg ========================
[16:33:47] [PASSED] test_fatal
[16:33:47] [PASSED] test_fatal_tile
[16:33:47] [PASSED] test_fatal_gt
[16:33:47] [PASSED] test_fatal_comp
[16:33:47] [PASSED] test_fatal_comp_tile
[16:33:47] [PASSED] test_fatal_comp_gt
[16:33:47] [PASSED] test_fatal_all
[16:33:47] [PASSED] test_recoverable
[16:33:47] [PASSED] test_recoverable_tile
[16:33:47] [PASSED] test_recoverable_gt
[16:33:47] [PASSED] test_recoverable_comp
[16:33:47] [PASSED] test_recoverable_comp_tile
[16:33:47] [PASSED] test_recoverable_comp_gt
[16:33:47] [PASSED] test_recoverable_all
[16:33:47] [PASSED] test_info
[16:33:47] [PASSED] test_info_tile
[16:33:47] [PASSED] test_info_gt
[16:33:47] [PASSED] test_info_err
[16:33:47] [PASSED] test_info_comp
[16:33:47] [PASSED] test_info_comp_tile
[16:33:47] [PASSED] test_info_comp_gt
[16:33:47] [PASSED] test_info_all
[16:33:47] [PASSED] test_hw_fatal
[16:33:47] [PASSED] test_hw_recoverable
[16:33:47] [PASSED] test_hw_corrected
[16:33:47] [PASSED] test_hw_informational
[16:33:47] =================== [PASSED] test_dmesg ====================
[16:33:47] ====================== test_invalid =======================
[16:33:47] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[16:33:47] ================== [SKIPPED] test_invalid ==================
[16:33:47] ===================== [PASSED] xe_log ======================
[16:33:47] ================== no_relay (3 subtests) ===================
[16:33:47] [PASSED] xe_drops_guc2pf_if_not_ready
[16:33:47] [PASSED] xe_drops_guc2vf_if_not_ready
[16:33:47] [PASSED] xe_rejects_send_if_not_ready
[16:33:47] ==================== [PASSED] no_relay =====================
[16:33:47] ================== pf_relay (14 subtests) ==================
[16:33:47] [PASSED] pf_rejects_guc2pf_too_short
[16:33:47] [PASSED] pf_rejects_guc2pf_too_long
[16:33:47] [PASSED] pf_rejects_guc2pf_no_payload
[16:33:47] [PASSED] pf_fails_no_payload
[16:33:47] [PASSED] pf_fails_bad_origin
[16:33:47] [PASSED] pf_fails_bad_type
[16:33:47] [PASSED] pf_txn_reports_error
[16:33:47] [PASSED] pf_txn_sends_pf2guc
[16:33:47] [PASSED] pf_sends_pf2guc
[16:33:47] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:33:47] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:33:47] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:33:47] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:33:47] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:33:47] ==================== [PASSED] pf_relay =====================
[16:33:47] ================== vf_relay (3 subtests) ===================
[16:33:47] [PASSED] vf_rejects_guc2vf_too_short
[16:33:47] [PASSED] vf_rejects_guc2vf_too_long
[16:33:47] [PASSED] vf_rejects_guc2vf_no_payload
[16:33:47] ==================== [PASSED] vf_relay =====================
[16:33:47] ================ pf_gt_config (9 subtests) =================
[16:33:47] [PASSED] fair_contexts_1vf
[16:33:47] [PASSED] fair_doorbells_1vf
[16:33:47] [PASSED] fair_ggtt_1vf
[16:33:47] ====================== fair_vram_1vf ======================
[16:33:47] [PASSED] 3.50 GiB
[16:33:47] [PASSED] 11.5 GiB
[16:33:47] [PASSED] 15.5 GiB
[16:33:47] [PASSED] 31.5 GiB
[16:33:47] [PASSED] 63.5 GiB
[16:33:47] [PASSED] 1.91 GiB
[16:33:47] ================== [PASSED] fair_vram_1vf ==================
[16:33:47] ================ fair_vram_1vf_admin_only =================
[16:33:47] [PASSED] 3.50 GiB
[16:33:47] [PASSED] 11.5 GiB
[16:33:47] [PASSED] 15.5 GiB
[16:33:47] [PASSED] 31.5 GiB
[16:33:47] [PASSED] 63.5 GiB
[16:33:47] [PASSED] 1.91 GiB
[16:33:47] ============ [PASSED] fair_vram_1vf_admin_only =============
[16:33:47] ====================== fair_contexts ======================
[16:33:47] [PASSED] 1 VF
[16:33:47] [PASSED] 2 VFs
[16:33:47] [PASSED] 3 VFs
[16:33:47] [PASSED] 4 VFs
[16:33:47] [PASSED] 5 VFs
[16:33:47] [PASSED] 6 VFs
[16:33:47] [PASSED] 7 VFs
[16:33:47] [PASSED] 8 VFs
[16:33:47] [PASSED] 9 VFs
[16:33:47] [PASSED] 10 VFs
[16:33:47] [PASSED] 11 VFs
[16:33:47] [PASSED] 12 VFs
[16:33:47] [PASSED] 13 VFs
[16:33:47] [PASSED] 14 VFs
[16:33:47] [PASSED] 15 VFs
[16:33:47] [PASSED] 16 VFs
[16:33:47] [PASSED] 17 VFs
[16:33:47] [PASSED] 18 VFs
[16:33:47] [PASSED] 19 VFs
[16:33:47] [PASSED] 20 VFs
[16:33:47] [PASSED] 21 VFs
[16:33:47] [PASSED] 22 VFs
[16:33:47] [PASSED] 23 VFs
[16:33:47] [PASSED] 24 VFs
[16:33:47] [PASSED] 25 VFs
[16:33:47] [PASSED] 26 VFs
[16:33:47] [PASSED] 27 VFs
[16:33:47] [PASSED] 28 VFs
[16:33:47] [PASSED] 29 VFs
[16:33:47] [PASSED] 30 VFs
[16:33:47] [PASSED] 31 VFs
[16:33:47] [PASSED] 32 VFs
[16:33:47] [PASSED] 33 VFs
[16:33:47] [PASSED] 34 VFs
[16:33:47] [PASSED] 35 VFs
[16:33:47] [PASSED] 36 VFs
[16:33:47] [PASSED] 37 VFs
[16:33:47] [PASSED] 38 VFs
[16:33:47] [PASSED] 39 VFs
[16:33:47] [PASSED] 40 VFs
[16:33:47] [PASSED] 41 VFs
[16:33:47] [PASSED] 42 VFs
[16:33:47] [PASSED] 43 VFs
[16:33:47] [PASSED] 44 VFs
[16:33:47] [PASSED] 45 VFs
[16:33:47] [PASSED] 46 VFs
[16:33:47] [PASSED] 47 VFs
[16:33:47] [PASSED] 48 VFs
[16:33:47] [PASSED] 49 VFs
[16:33:47] [PASSED] 50 VFs
[16:33:47] [PASSED] 51 VFs
[16:33:47] [PASSED] 52 VFs
[16:33:47] [PASSED] 53 VFs
[16:33:47] [PASSED] 54 VFs
[16:33:47] [PASSED] 55 VFs
[16:33:47] [PASSED] 56 VFs
[16:33:47] [PASSED] 57 VFs
[16:33:47] [PASSED] 58 VFs
[16:33:47] [PASSED] 59 VFs
[16:33:47] [PASSED] 60 VFs
[16:33:47] [PASSED] 61 VFs
[16:33:47] [PASSED] 62 VFs
[16:33:47] [PASSED] 63 VFs
[16:33:47] ================== [PASSED] fair_contexts ==================
[16:33:47] ===================== fair_doorbells ======================
[16:33:47] [PASSED] 1 VF
[16:33:47] [PASSED] 2 VFs
[16:33:47] [PASSED] 3 VFs
[16:33:47] [PASSED] 4 VFs
[16:33:47] [PASSED] 5 VFs
[16:33:47] [PASSED] 6 VFs
[16:33:47] [PASSED] 7 VFs
[16:33:47] [PASSED] 8 VFs
[16:33:47] [PASSED] 9 VFs
[16:33:47] [PASSED] 10 VFs
[16:33:47] [PASSED] 11 VFs
[16:33:47] [PASSED] 12 VFs
[16:33:47] [PASSED] 13 VFs
[16:33:47] [PASSED] 14 VFs
[16:33:47] [PASSED] 15 VFs
[16:33:47] [PASSED] 16 VFs
[16:33:47] [PASSED] 17 VFs
[16:33:47] [PASSED] 18 VFs
[16:33:47] [PASSED] 19 VFs
[16:33:47] [PASSED] 20 VFs
[16:33:47] [PASSED] 21 VFs
[16:33:47] [PASSED] 22 VFs
[16:33:47] [PASSED] 23 VFs
[16:33:47] [PASSED] 24 VFs
[16:33:47] [PASSED] 25 VFs
[16:33:47] [PASSED] 26 VFs
[16:33:47] [PASSED] 27 VFs
[16:33:47] [PASSED] 28 VFs
[16:33:47] [PASSED] 29 VFs
[16:33:47] [PASSED] 30 VFs
[16:33:47] [PASSED] 31 VFs
[16:33:47] [PASSED] 32 VFs
[16:33:47] [PASSED] 33 VFs
[16:33:47] [PASSED] 34 VFs
[16:33:47] [PASSED] 35 VFs
[16:33:47] [PASSED] 36 VFs
[16:33:47] [PASSED] 37 VFs
[16:33:47] [PASSED] 38 VFs
[16:33:47] [PASSED] 39 VFs
[16:33:47] [PASSED] 40 VFs
[16:33:47] [PASSED] 41 VFs
[16:33:47] [PASSED] 42 VFs
[16:33:47] [PASSED] 43 VFs
[16:33:47] [PASSED] 44 VFs
[16:33:47] [PASSED] 45 VFs
[16:33:47] [PASSED] 46 VFs
[16:33:47] [PASSED] 47 VFs
[16:33:47] [PASSED] 48 VFs
[16:33:47] [PASSED] 49 VFs
[16:33:47] [PASSED] 50 VFs
[16:33:47] [PASSED] 51 VFs
[16:33:47] [PASSED] 52 VFs
[16:33:47] [PASSED] 53 VFs
[16:33:47] [PASSED] 54 VFs
[16:33:47] [PASSED] 55 VFs
[16:33:47] [PASSED] 56 VFs
[16:33:47] [PASSED] 57 VFs
[16:33:47] [PASSED] 58 VFs
[16:33:47] [PASSED] 59 VFs
[16:33:47] [PASSED] 60 VFs
[16:33:47] [PASSED] 61 VFs
[16:33:47] [PASSED] 62 VFs
[16:33:47] [PASSED] 63 VFs
[16:33:47] ================= [PASSED] fair_doorbells ==================
[16:33:47] ======================== fair_ggtt ========================
[16:33:47] [PASSED] 1 VF
[16:33:47] [PASSED] 2 VFs
[16:33:47] [PASSED] 3 VFs
[16:33:47] [PASSED] 4 VFs
[16:33:47] [PASSED] 5 VFs
[16:33:47] [PASSED] 6 VFs
[16:33:47] [PASSED] 7 VFs
[16:33:47] [PASSED] 8 VFs
[16:33:47] [PASSED] 9 VFs
[16:33:47] [PASSED] 10 VFs
[16:33:47] [PASSED] 11 VFs
[16:33:47] [PASSED] 12 VFs
[16:33:47] [PASSED] 13 VFs
[16:33:47] [PASSED] 14 VFs
[16:33:47] [PASSED] 15 VFs
[16:33:47] [PASSED] 16 VFs
[16:33:47] [PASSED] 17 VFs
[16:33:47] [PASSED] 18 VFs
[16:33:47] [PASSED] 19 VFs
[16:33:47] [PASSED] 20 VFs
[16:33:47] [PASSED] 21 VFs
[16:33:47] [PASSED] 22 VFs
[16:33:47] [PASSED] 23 VFs
[16:33:47] [PASSED] 24 VFs
[16:33:47] [PASSED] 25 VFs
[16:33:47] [PASSED] 26 VFs
[16:33:47] [PASSED] 27 VFs
[16:33:47] [PASSED] 28 VFs
[16:33:47] [PASSED] 29 VFs
[16:33:47] [PASSED] 30 VFs
[16:33:47] [PASSED] 31 VFs
[16:33:47] [PASSED] 32 VFs
[16:33:47] [PASSED] 33 VFs
[16:33:47] [PASSED] 34 VFs
[16:33:47] [PASSED] 35 VFs
[16:33:47] [PASSED] 36 VFs
[16:33:47] [PASSED] 37 VFs
[16:33:47] [PASSED] 38 VFs
[16:33:47] [PASSED] 39 VFs
[16:33:47] [PASSED] 40 VFs
[16:33:47] [PASSED] 41 VFs
[16:33:47] [PASSED] 42 VFs
[16:33:47] [PASSED] 43 VFs
[16:33:47] [PASSED] 44 VFs
[16:33:47] [PASSED] 45 VFs
[16:33:47] [PASSED] 46 VFs
[16:33:47] [PASSED] 47 VFs
[16:33:47] [PASSED] 48 VFs
[16:33:47] [PASSED] 49 VFs
[16:33:47] [PASSED] 50 VFs
[16:33:47] [PASSED] 51 VFs
[16:33:47] [PASSED] 52 VFs
[16:33:47] [PASSED] 53 VFs
[16:33:47] [PASSED] 54 VFs
[16:33:47] [PASSED] 55 VFs
[16:33:47] [PASSED] 56 VFs
[16:33:47] [PASSED] 57 VFs
[16:33:47] [PASSED] 58 VFs
[16:33:47] [PASSED] 59 VFs
[16:33:47] [PASSED] 60 VFs
[16:33:47] [PASSED] 61 VFs
[16:33:47] [PASSED] 62 VFs
[16:33:47] [PASSED] 63 VFs
[16:33:47] ==================== [PASSED] fair_ggtt ====================
[16:33:47] ======================== fair_vram ========================
[16:33:47] [PASSED] 1 VF
[16:33:47] [PASSED] 2 VFs
[16:33:47] [PASSED] 3 VFs
[16:33:47] [PASSED] 4 VFs
[16:33:47] [PASSED] 5 VFs
[16:33:47] [PASSED] 6 VFs
[16:33:47] [PASSED] 7 VFs
[16:33:47] [PASSED] 8 VFs
[16:33:47] [PASSED] 9 VFs
[16:33:47] [PASSED] 10 VFs
[16:33:47] [PASSED] 11 VFs
[16:33:47] [PASSED] 12 VFs
[16:33:47] [PASSED] 13 VFs
[16:33:47] [PASSED] 14 VFs
[16:33:47] [PASSED] 15 VFs
[16:33:47] [PASSED] 16 VFs
[16:33:47] [PASSED] 17 VFs
[16:33:47] [PASSED] 18 VFs
[16:33:47] [PASSED] 19 VFs
[16:33:47] [PASSED] 20 VFs
[16:33:47] [PASSED] 21 VFs
[16:33:47] [PASSED] 22 VFs
[16:33:47] [PASSED] 23 VFs
[16:33:47] [PASSED] 24 VFs
[16:33:47] [PASSED] 25 VFs
[16:33:47] [PASSED] 26 VFs
[16:33:47] [PASSED] 27 VFs
[16:33:47] [PASSED] 28 VFs
[16:33:47] [PASSED] 29 VFs
[16:33:47] [PASSED] 30 VFs
[16:33:47] [PASSED] 31 VFs
[16:33:47] [PASSED] 32 VFs
[16:33:47] [PASSED] 33 VFs
[16:33:47] [PASSED] 34 VFs
[16:33:47] [PASSED] 35 VFs
[16:33:47] [PASSED] 36 VFs
[16:33:47] [PASSED] 37 VFs
[16:33:47] [PASSED] 38 VFs
[16:33:47] [PASSED] 39 VFs
[16:33:47] [PASSED] 40 VFs
[16:33:47] [PASSED] 41 VFs
[16:33:47] [PASSED] 42 VFs
[16:33:47] [PASSED] 43 VFs
[16:33:47] [PASSED] 44 VFs
[16:33:47] [PASSED] 45 VFs
[16:33:47] [PASSED] 46 VFs
[16:33:47] [PASSED] 47 VFs
[16:33:47] [PASSED] 48 VFs
[16:33:47] [PASSED] 49 VFs
[16:33:47] [PASSED] 50 VFs
[16:33:47] [PASSED] 51 VFs
[16:33:47] [PASSED] 52 VFs
[16:33:47] [PASSED] 53 VFs
[16:33:47] [PASSED] 54 VFs
[16:33:47] [PASSED] 55 VFs
[16:33:47] [PASSED] 56 VFs
[16:33:47] [PASSED] 57 VFs
[16:33:47] [PASSED] 58 VFs
[16:33:47] [PASSED] 59 VFs
[16:33:47] [PASSED] 60 VFs
[16:33:47] [PASSED] 61 VFs
[16:33:47] [PASSED] 62 VFs
[16:33:47] [PASSED] 63 VFs
[16:33:47] ==================== [PASSED] fair_vram ====================
[16:33:47] ================== [PASSED] pf_gt_config ===================
[16:33:47] ===================== lmtt (1 subtest) =====================
[16:33:47] ======================== test_ops =========================
[16:33:47] [PASSED] 2-level
[16:33:47] [PASSED] multi-level
[16:33:47] ==================== [PASSED] test_ops =====================
[16:33:47] ====================== [PASSED] lmtt =======================
[16:33:47] ================= sriov_packet (1 subtest) =================
[16:33:47] [PASSED] test_descriptor_init
[16:33:47] ================== [PASSED] sriov_packet ===================
[16:33:47] ================= pf_service (11 subtests) =================
[16:33:47] [PASSED] pf_negotiate_any
[16:33:47] [PASSED] pf_negotiate_base_match
[16:33:47] [PASSED] pf_negotiate_base_newer
[16:33:47] [PASSED] pf_negotiate_base_next
[16:33:47] [SKIPPED] pf_negotiate_base_older (no older minor)
[16:33:47] [PASSED] pf_negotiate_base_prev
[16:33:47] [PASSED] pf_negotiate_latest_match
[16:33:47] [PASSED] pf_negotiate_latest_newer
[16:33:47] [PASSED] pf_negotiate_latest_next
[16:33:47] [SKIPPED] pf_negotiate_latest_older (no older minor)
[16:33:47] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[16:33:47] =================== [PASSED] pf_service ====================
[16:33:47] ================= xe_guc_g2g (2 subtests) ==================
[16:33:47] ============== xe_live_guc_g2g_kunit_default ==============
[16:33:47] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[16:33:47] ============== xe_live_guc_g2g_kunit_allmem ===============
[16:33:47] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[16:33:47] =================== [SKIPPED] xe_guc_g2g ===================
[16:33:47] =================== xe_mocs (2 subtests) ===================
[16:33:47] ================ xe_live_mocs_kernel_kunit ================
[16:33:47] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:33:47] ================ xe_live_mocs_reset_kunit =================
[16:33:47] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:33:47] ==================== [SKIPPED] xe_mocs =====================
[16:33:47] ================= xe_migrate (2 subtests) ==================
[16:33:47] ================= xe_migrate_sanity_kunit =================
[16:33:47] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:33:47] ================== xe_validate_ccs_kunit ==================
[16:33:47] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:33:47] =================== [SKIPPED] xe_migrate ===================
[16:33:47] ================== xe_dma_buf (1 subtest) ==================
[16:33:47] ==================== xe_dma_buf_kunit =====================
[16:33:47] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:33:47] =================== [SKIPPED] xe_dma_buf ===================
[16:33:47] ================= xe_bo_shrink (1 subtest) =================
[16:33:47] =================== xe_bo_shrink_kunit ====================
[16:33:47] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:33:47] ================== [SKIPPED] xe_bo_shrink ==================
[16:33:47] ==================== xe_bo (2 subtests) ====================
[16:33:47] ================== xe_ccs_migrate_kunit ===================
[16:33:47] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:33:47] ==================== xe_bo_evict_kunit ====================
[16:33:47] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:33:47] ===================== [SKIPPED] xe_bo ======================
[16:33:47] =================== xe_any (9 subtests) ====================
[16:33:47] [PASSED] test_to_xe
[16:33:47] [PASSED] test_to_dev
[16:33:47] [PASSED] test_to_pdev
[16:33:47] [PASSED] test_to_drm
[16:33:47] [PASSED] test_if_pdev
[16:33:47] [PASSED] test_if_xe
[16:33:47] [PASSED] test_if_tile
[16:33:47] [PASSED] test_if_gt
[16:33:47] [PASSED] test_to_id
[16:33:47] ===================== [PASSED] xe_any ======================
[16:33:47] ==================== args (13 subtests) ====================
[16:33:47] [PASSED] count_args_test
[16:33:47] [PASSED] call_args_example
[16:33:47] [PASSED] call_args_test
[16:33:47] [PASSED] drop_first_arg_example
[16:33:47] [PASSED] drop_first_arg_test
[16:33:47] [PASSED] first_arg_example
[16:33:47] [PASSED] first_arg_test
[16:33:47] [PASSED] last_arg_example
[16:33:47] [PASSED] last_arg_test
[16:33:47] [PASSED] pick_arg_example
[16:33:47] [PASSED] if_args_example
[16:33:47] [PASSED] if_args_test
[16:33:47] [PASSED] sep_comma_example
[16:33:47] ====================== [PASSED] args =======================
[16:33:47] =================== xe_pci (3 subtests) ====================
[16:33:47] ==================== check_graphics_ip ====================
[16:33:47] [PASSED] 12.00 Xe_LP
[16:33:47] [PASSED] 12.10 Xe_LP+
[16:33:47] [PASSED] 12.55 Xe_HPG
[16:33:47] [PASSED] 12.60 Xe_HPC
[16:33:47] [PASSED] 12.70 Xe_LPG
[16:33:47] [PASSED] 12.71 Xe_LPG
[16:33:47] [PASSED] 12.74 Xe_LPG+
[16:33:47] [PASSED] 20.01 Xe2_HPG
[16:33:47] [PASSED] 20.02 Xe2_HPG
[16:33:47] [PASSED] 20.04 Xe2_LPG
[16:33:47] [PASSED] 30.00 Xe3_LPG
[16:33:47] [PASSED] 30.01 Xe3_LPG
[16:33:47] [PASSED] 30.03 Xe3_LPG
[16:33:47] [PASSED] 30.04 Xe3_LPG
[16:33:47] [PASSED] 30.05 Xe3_LPG
[16:33:47] [PASSED] 35.10 Xe3p_LPG
[16:33:47] [PASSED] 35.11 Xe3p_XPC
[16:33:47] ================ [PASSED] check_graphics_ip ================
[16:33:47] ===================== check_media_ip ======================
[16:33:47] [PASSED] 12.00 Xe_M
[16:33:47] [PASSED] 12.55 Xe_HPM
[16:33:47] [PASSED] 13.00 Xe_LPM+
[16:33:47] [PASSED] 13.01 Xe2_HPM
[16:33:47] [PASSED] 20.00 Xe2_LPM
[16:33:47] [PASSED] 30.00 Xe3_LPM
[16:33:47] [PASSED] 30.02 Xe3_LPM
[16:33:47] [PASSED] 35.00 Xe3p_LPM
[16:33:47] [PASSED] 35.03 Xe3p_HPM
[16:33:47] ================= [PASSED] check_media_ip ==================
[16:33:47] =================== check_platform_desc ===================
[16:33:47] [PASSED] 0x9A60 (TIGERLAKE)
[16:33:47] [PASSED] 0x9A68 (TIGERLAKE)
[16:33:47] [PASSED] 0x9A70 (TIGERLAKE)
[16:33:47] [PASSED] 0x9A40 (TIGERLAKE)
[16:33:47] [PASSED] 0x9A49 (TIGERLAKE)
[16:33:47] [PASSED] 0x9A59 (TIGERLAKE)
[16:33:47] [PASSED] 0x9A78 (TIGERLAKE)
[16:33:47] [PASSED] 0x9AC0 (TIGERLAKE)
[16:33:47] [PASSED] 0x9AC9 (TIGERLAKE)
[16:33:47] [PASSED] 0x9AD9 (TIGERLAKE)
[16:33:47] [PASSED] 0x9AF8 (TIGERLAKE)
[16:33:47] [PASSED] 0x4C80 (ROCKETLAKE)
[16:33:47] [PASSED] 0x4C8A (ROCKETLAKE)
[16:33:47] [PASSED] 0x4C8B (ROCKETLAKE)
[16:33:47] [PASSED] 0x4C8C (ROCKETLAKE)
[16:33:47] [PASSED] 0x4C90 (ROCKETLAKE)
[16:33:47] [PASSED] 0x4C9A (ROCKETLAKE)
[16:33:47] [PASSED] 0x4680 (ALDERLAKE_S)
[16:33:47] [PASSED] 0x4682 (ALDERLAKE_S)
[16:33:47] [PASSED] 0x4688 (ALDERLAKE_S)
[16:33:47] [PASSED] 0x468A (ALDERLAKE_S)
[16:33:47] [PASSED] 0x468B (ALDERLAKE_S)
[16:33:47] [PASSED] 0x4690 (ALDERLAKE_S)
[16:33:47] [PASSED] 0x4692 (ALDERLAKE_S)
[16:33:47] [PASSED] 0x4693 (ALDERLAKE_S)
[16:33:47] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46AA (ALDERLAKE_P)
[16:33:47] [PASSED] 0x462A (ALDERLAKE_P)
[16:33:47] [PASSED] 0x4626 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x4628 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:33:47] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:33:47] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:33:47] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:33:47] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:33:47] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:33:47] [PASSED] 0xA721 (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA720 (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:33:47] [PASSED] 0xA780 (ALDERLAKE_S)
[16:33:47] [PASSED] 0xA781 (ALDERLAKE_S)
[16:33:47] [PASSED] 0xA782 (ALDERLAKE_S)
[16:33:47] [PASSED] 0xA783 (ALDERLAKE_S)
[16:33:47] [PASSED] 0xA788 (ALDERLAKE_S)
[16:33:47] [PASSED] 0xA789 (ALDERLAKE_S)
[16:33:47] [PASSED] 0xA78A (ALDERLAKE_S)
[16:33:47] [PASSED] 0xA78B (ALDERLAKE_S)
[16:33:47] [PASSED] 0x4905 (DG1)
[16:33:47] [PASSED] 0x4906 (DG1)
[16:33:47] [PASSED] 0x4907 (DG1)
[16:33:47] [PASSED] 0x4908 (DG1)
[16:33:47] [PASSED] 0x4909 (DG1)
[16:33:47] [PASSED] 0x56C0 (DG2)
[16:33:47] [PASSED] 0x56C2 (DG2)
[16:33:47] [PASSED] 0x56C1 (DG2)
[16:33:47] [PASSED] 0x7D51 (METEORLAKE)
[16:33:47] [PASSED] 0x7DD1 (METEORLAKE)
[16:33:47] [PASSED] 0x7D41 (METEORLAKE)
[16:33:47] [PASSED] 0x7D67 (METEORLAKE)
[16:33:47] [PASSED] 0xB640 (METEORLAKE)
[16:33:47] [PASSED] 0x56A0 (DG2)
[16:33:47] [PASSED] 0x56A1 (DG2)
[16:33:47] [PASSED] 0x56A2 (DG2)
[16:33:47] [PASSED] 0x56BE (DG2)
[16:33:47] [PASSED] 0x56BF (DG2)
[16:33:47] [PASSED] 0x5690 (DG2)
[16:33:47] [PASSED] 0x5691 (DG2)
[16:33:47] [PASSED] 0x5692 (DG2)
[16:33:47] [PASSED] 0x56A5 (DG2)
[16:33:47] [PASSED] 0x56A6 (DG2)
[16:33:47] [PASSED] 0x56B0 (DG2)
[16:33:47] [PASSED] 0x56B1 (DG2)
[16:33:47] [PASSED] 0x56BA (DG2)
[16:33:47] [PASSED] 0x56BB (DG2)
[16:33:47] [PASSED] 0x56BC (DG2)
[16:33:47] [PASSED] 0x56BD (DG2)
[16:33:47] [PASSED] 0x5693 (DG2)
[16:33:47] [PASSED] 0x5694 (DG2)
[16:33:47] [PASSED] 0x5695 (DG2)
[16:33:47] [PASSED] 0x56A3 (DG2)
[16:33:47] [PASSED] 0x56A4 (DG2)
[16:33:47] [PASSED] 0x56B2 (DG2)
[16:33:47] [PASSED] 0x56B3 (DG2)
[16:33:47] [PASSED] 0x5696 (DG2)
[16:33:47] [PASSED] 0x5697 (DG2)
[16:33:47] [PASSED] 0xB69 (PVC)
[16:33:47] [PASSED] 0xB6E (PVC)
[16:33:47] [PASSED] 0xBD4 (PVC)
[16:33:47] [PASSED] 0xBD5 (PVC)
[16:33:47] [PASSED] 0xBD6 (PVC)
[16:33:47] [PASSED] 0xBD7 (PVC)
[16:33:47] [PASSED] 0xBD8 (PVC)
[16:33:47] [PASSED] 0xBD9 (PVC)
[16:33:47] [PASSED] 0xBDA (PVC)
[16:33:47] [PASSED] 0xBDB (PVC)
[16:33:47] [PASSED] 0xBE0 (PVC)
[16:33:47] [PASSED] 0xBE1 (PVC)
[16:33:47] [PASSED] 0xBE5 (PVC)
[16:33:47] [PASSED] 0x7D40 (METEORLAKE)
[16:33:47] [PASSED] 0x7D45 (METEORLAKE)
[16:33:47] [PASSED] 0x7D55 (METEORLAKE)
[16:33:47] [PASSED] 0x7D60 (METEORLAKE)
[16:33:47] [PASSED] 0x7DD5 (METEORLAKE)
[16:33:47] [PASSED] 0x6420 (LUNARLAKE)
[16:33:47] [PASSED] 0x64A0 (LUNARLAKE)
[16:33:47] [PASSED] 0x64B0 (LUNARLAKE)
[16:33:47] [PASSED] 0xE202 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE209 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE20B (BATTLEMAGE)
[16:33:47] [PASSED] 0xE20C (BATTLEMAGE)
[16:33:47] [PASSED] 0xE20D (BATTLEMAGE)
[16:33:47] [PASSED] 0xE210 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE211 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE212 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE216 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE220 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE221 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE222 (BATTLEMAGE)
[16:33:47] [PASSED] 0xE223 (BATTLEMAGE)
[16:33:47] [PASSED] 0xB080 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB081 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB082 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB083 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB084 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB085 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB086 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB087 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB08F (PANTHERLAKE)
[16:33:47] [PASSED] 0xB090 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:33:47] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:33:47] [PASSED] 0xFD80 (PANTHERLAKE)
[16:33:47] [PASSED] 0xFD81 (PANTHERLAKE)
[16:33:47] [PASSED] 0xD740 (NOVALAKE_S)
[16:33:47] [PASSED] 0xD741 (NOVALAKE_S)
[16:33:47] [PASSED] 0xD742 (NOVALAKE_S)
[16:33:47] [PASSED] 0xD743 (NOVALAKE_S)
[16:33:47] [PASSED] 0xD745 (NOVALAKE_S)
[16:33:47] [PASSED] 0xD74A (NOVALAKE_S)
[16:33:47] [PASSED] 0xD74B (NOVALAKE_S)
[16:33:47] [PASSED] 0x674C (CRESCENTISLAND)
[16:33:47] [PASSED] 0x674D (CRESCENTISLAND)
[16:33:47] [PASSED] 0x674E (CRESCENTISLAND)
[16:33:47] [PASSED] 0x674F (CRESCENTISLAND)
[16:33:47] [PASSED] 0x6750 (CRESCENTISLAND)
[16:33:47] [PASSED] 0xD750 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD751 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD752 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD753 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD754 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD755 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD756 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD757 (NOVALAKE_P)
[16:33:47] [PASSED] 0xD75F (NOVALAKE_P)
[16:33:47] =============== [PASSED] check_platform_desc ===============
[16:33:47] ===================== [PASSED] xe_pci ======================
[16:33:47] ============= xe_rtp_tables_test (5 subtests) ==============
[16:33:47] ================== xe_rtp_table_gt_test ===================
[16:33:47] [PASSED] gt_was/14011060649
[16:33:47] [PASSED] gt_was/14011059788
[16:33:47] [PASSED] gt_was/14015795083
[16:33:47] [PASSED] gt_was/16021867713
[16:33:47] [PASSED] gt_was/14019449301
[16:33:47] [PASSED] gt_was/16028005424
[16:33:47] [PASSED] gt_was/14026578760
[16:33:47] [PASSED] gt_was/1409420604
[16:33:47] [PASSED] gt_was/1408615072
[16:33:47] [PASSED] gt_was/22010523718
[16:33:47] [PASSED] gt_was/14011006942
[16:33:47] [PASSED] gt_was/14014830051
[16:33:47] [PASSED] gt_was/18018781329
[16:33:47] [PASSED] gt_was/1509235366
[16:33:47] [PASSED] gt_was/18018781329
[16:33:47] [PASSED] gt_was/16016694945
[16:33:47] [PASSED] gt_was/14018575942
[16:33:47] [PASSED] gt_was/22016670082
[16:33:47] [PASSED] gt_was/22016670082
[16:33:47] [PASSED] gt_was/14017421178
[16:33:47] [PASSED] gt_was/16025250150
[16:33:47] [PASSED] gt_was/14021871409
[16:33:47] [PASSED] gt_was/16021865536
[16:33:47] [PASSED] gt_was/14021486841
[16:33:47] [PASSED] gt_was/14025160223
[16:33:47] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[16:33:47] [PASSED] gt_was/14025635424
[16:33:47] [PASSED] gt_was/16028005424
[16:33:47] ============== [PASSED] xe_rtp_table_gt_test ===============
[16:33:47] ================== xe_rtp_table_gt_test ===================
[16:33:47] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[16:33:47] [PASSED] gt_tunings/Tuning: 32B Access Enable
[16:33:47] [PASSED] gt_tunings/Tuning: L3 cache
[16:33:47] [PASSED] gt_tunings/Tuning: L3 cache - media
[16:33:47] [PASSED] gt_tunings/Tuning: Compression Overfetch
[16:33:47] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[16:33:47] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[16:33:47] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[16:33:47] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[16:33:47] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[16:33:47] [PASSED] gt_tunings/Tuning: Stateless compression control
[16:33:47] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[16:33:47] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[16:33:47] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[16:33:47] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[16:33:47] ============== [PASSED] xe_rtp_table_gt_test ===============
[16:33:47] ================== xe_rtp_table_oob_test ==================
[16:33:47] [PASSED] oob_was/1607983814
[16:33:47] [PASSED] oob_was/16010904313
[16:33:47] [PASSED] oob_was/18022495364
[16:33:47] [PASSED] oob_was/22012773006
[16:33:47] [PASSED] oob_was/14014475959
[16:33:47] [PASSED] oob_was/22011391025
[16:33:47] [PASSED] oob_was/22012727170
[16:33:47] [PASSED] oob_was/22012727685
[16:33:47] [PASSED] oob_was/22016596838
[16:33:47] [PASSED] oob_was/18020744125
[16:33:47] [PASSED] oob_was/1409600907
[16:33:47] [PASSED] oob_was/22014953428
[16:33:47] [PASSED] oob_was/16017236439
[16:33:47] [PASSED] oob_was/14019821291
[16:33:47] [PASSED] oob_was/14015076503
[16:33:47] [PASSED] oob_was/14018913170
[16:33:47] [PASSED] oob_was/14018094691
[16:33:47] [PASSED] oob_was/18024947630
[16:33:47] [PASSED] oob_was/16022287689
[16:33:47] [PASSED] oob_was/13011645652
[16:33:47] [PASSED] oob_was/14022293748
[16:33:47] [PASSED] oob_was/22019794406
[16:33:47] [PASSED] oob_was/22019338487
[16:33:47] [PASSED] oob_was/16023588340
[16:33:47] [PASSED] oob_was/14019789679
[16:33:47] [PASSED] oob_was/14022866841
[16:33:47] [PASSED] oob_was/16021333562
[16:33:47] [PASSED] oob_was/14016712196
[16:33:47] [PASSED] oob_was/14015568240
[16:33:47] [PASSED] oob_was/18013179988
[16:33:47] [PASSED] oob_was/1508761755
[16:33:47] [PASSED] oob_was/16023105232
[16:33:47] [PASSED] oob_was/16026508708
[16:33:47] [PASSED] oob_was/14020001231
[16:33:47] [PASSED] oob_was/16023683509
[16:33:47] [PASSED] oob_was/14025515070
[16:33:47] [PASSED] oob_was/15015404425_disable
[16:33:47] [PASSED] oob_was/16026007364
[16:33:47] [PASSED] oob_was/14020316580
[16:33:47] [PASSED] oob_was/14025883347
[16:33:47] [PASSED] oob_was/16029380221
[16:33:47] [PASSED] oob_was/22022079272
[16:33:47] [PASSED] oob_was/16029897822
[16:33:47] [PASSED] oob_was/14027054324
[16:33:47] ============== [PASSED] xe_rtp_table_oob_test ==============
[16:33:47] ================ xe_rtp_table_dev_oob_test ================
[16:33:47] [PASSED] device_oob_was/22010954014
[16:33:47] [PASSED] device_oob_was/15015404425
[16:33:47] [PASSED] device_oob_was/22019338487_display
[16:33:47] [PASSED] device_oob_was/14022085890
[16:33:47] [PASSED] device_oob_was/14026539277
[16:33:47] [PASSED] device_oob_was/14026633728
[16:33:47] [PASSED] device_oob_was/14026746987
[16:33:47] [PASSED] device_oob_was/14026779378
[16:33:47] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[16:33:47] ========== xe_rtp_table_missing_upper_bound_test ==========
[16:33:47] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[16:33:47] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[16:33:47] [PASSED] register_whitelist/1806527549
[16:33:47] [PASSED] register_whitelist/allow_read_ctx_timestamp
[16:33:47] [PASSED] register_whitelist/allow_read_queue_timestamp
[16:33:47] [PASSED] register_whitelist/16014440446
[16:33:47] [PASSED] register_whitelist/16017236439
[16:33:47] [PASSED] register_whitelist/16020183090
[16:33:47] [PASSED] register_whitelist/14024997852
[16:33:47] [PASSED] register_whitelist/14024997852
[16:33:47] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[16:33:47] =============== [PASSED] xe_rtp_tables_test ================
[16:33:47] =================== xe_rtp (3 subtests) ====================
[16:33:47] =================== xe_rtp_rules_tests ====================
[16:33:47] [PASSED] no
[16:33:47] [PASSED] yes
[16:33:47] [PASSED] no-and-no
[16:33:47] [PASSED] no-and-yes
[16:33:47] [PASSED] yes-and-no
[16:33:47] [PASSED] yes-and-yes
[16:33:47] [PASSED] no-or-no
[16:33:47] [PASSED] no-or-yes
[16:33:47] [PASSED] yes-or-no
[16:33:47] [PASSED] yes-or-yes
[16:33:47] [PASSED] no-yes-or-yes-no
[16:33:47] [PASSED] no-yes-or-yes-yes
[16:33:47] [PASSED] yes-yes-or-no-yes
[16:33:47] [PASSED] yes-yes-or-yes-yes
[16:33:47] [PASSED] no-no-or-yes-or-no
[16:33:47] [PASSED] or
[16:33:47] [PASSED] or-yes
[16:33:47] [PASSED] or-no
[16:33:47] [PASSED] yes-or
[16:33:47] [PASSED] no-or
[16:33:47] [PASSED] no-or-or-yes
[16:33:47] [PASSED] yes-or-or-no
[16:33:47] [PASSED] no-or-or-no
[16:33:47] [PASSED] missing-context-engine-class
[16:33:47] [PASSED] missing-context-engine-class-or-yes
[16:33:47] [PASSED] missing-context-engine-class-or-or-yes
[16:33:47] =============== [PASSED] xe_rtp_rules_tests ================
[16:33:47] =============== xe_rtp_process_to_sr_tests ================
[16:33:47] [PASSED] coalesce-same-reg
[16:33:47] [PASSED] coalesce-same-reg-literal-and-func
[16:33:47] [PASSED] no-match-no-add
[16:33:47] [PASSED] two-regs-two-entries
[16:33:47] [PASSED] clr-one-set-other
[16:33:47] [PASSED] set-field
[16:33:47] [PASSED] conflict-duplicate
[16:33:47] [PASSED] conflict-not-disjoint
[16:33:47] [PASSED] conflict-not-disjoint-literal-and-func
[16:33:47] [PASSED] conflict-reg-type
[16:33:47] [PASSED] bad-mcr-reg-forced-to-regular
[16:33:47] [PASSED] bad-regular-reg-forced-to-mcr
[16:33:47] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:33:47] ================== xe_rtp_process_tests ===================
[16:33:47] [PASSED] active1
[16:33:47] [PASSED] active2
[16:33:47] [PASSED] active-inactive
[16:33:47] [PASSED] inactive-active
[16:33:47] [PASSED] inactive-active-inactive
[16:33:47] [PASSED] inactive-inactive-inactive
[16:33:47] ============== [PASSED] xe_rtp_process_tests ===============
[16:33:47] ===================== [PASSED] xe_rtp ======================
[16:33:47] ==================== xe_wa (1 subtest) =====================
[16:33:47] ======================== xe_wa_gt =========================
[16:33:47] [PASSED] TIGERLAKE B0
[16:33:47] [PASSED] DG1 A0
[16:33:47] [PASSED] DG1 B0
[16:33:47] [PASSED] ALDERLAKE_S A0
[16:33:47] [PASSED] ALDERLAKE_S B0
[16:33:47] [PASSED] ALDERLAKE_S C0
[16:33:47] [PASSED] ALDERLAKE_S D0
[16:33:47] [PASSED] ALDERLAKE_P A0
[16:33:47] [PASSED] ALDERLAKE_P B0
[16:33:47] [PASSED] ALDERLAKE_P C0
[16:33:47] [PASSED] ALDERLAKE_S RPLS D0
[16:33:47] [PASSED] ALDERLAKE_P RPLU E0
[16:33:47] [PASSED] DG2 G10 C0
[16:33:47] [PASSED] DG2 G11 B1
[16:33:47] [PASSED] DG2 G12 A1
[16:33:47] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:33:47] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:33:47] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:33:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[16:33:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:33:47] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:33:47] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:33:47] ==================== [PASSED] xe_wa_gt =====================
[16:33:47] ====================== [PASSED] xe_wa ======================
[16:33:47] ============================================================
[16:33:47] Testing complete. Ran 789 tests: passed: 761, skipped: 28
[16:33:47] Elapsed time: 36.950s total, 4.338s configuring, 31.896s building, 0.677s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:33:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:33:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:34:14] Starting KUnit Kernel (1/1)...
[16:34:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:34:14] ============ drm_test_pick_cmdline (2 subtests) ============
[16:34:14] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:34:14] =============== drm_test_pick_cmdline_named ===============
[16:34:14] [PASSED] NTSC
[16:34:14] [PASSED] NTSC-J
[16:34:14] [PASSED] PAL
[16:34:14] [PASSED] PAL-M
[16:34:14] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:34:14] ============== [PASSED] drm_test_pick_cmdline ==============
[16:34:14] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:34:14] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:34:14] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:34:14] =========== drm_validate_clone_mode (2 subtests) ===========
[16:34:14] ============== drm_test_check_in_clone_mode ===============
[16:34:14] [PASSED] in_clone_mode
[16:34:14] [PASSED] not_in_clone_mode
[16:34:14] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:34:14] =============== drm_test_check_valid_clones ===============
[16:34:14] [PASSED] not_in_clone_mode
[16:34:14] [PASSED] valid_clone
[16:34:14] [PASSED] invalid_clone
[16:34:14] =========== [PASSED] drm_test_check_valid_clones ===========
[16:34:14] ============= [PASSED] drm_validate_clone_mode =============
[16:34:14] ============= drm_validate_modeset (1 subtest) =============
[16:34:14] [PASSED] drm_test_check_connector_changed_modeset
[16:34:14] ============== [PASSED] drm_validate_modeset ===============
[16:34:14] ====== drm_test_bridge_get_current_state (1 subtest) =======
[16:34:14] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:34:14] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:34:14] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:34:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:34:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:34:14] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[16:34:14] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:34:14] ============== drm_bridge_alloc (2 subtests) ===============
[16:34:14] [PASSED] drm_test_drm_bridge_alloc_basic
[16:34:14] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:34:14] ================ [PASSED] drm_bridge_alloc =================
[16:34:14] ============= drm_bridge_bus_fmt (5 subtests) ==============
[16:34:14] [PASSED] drm_test_bridge_rgb_yuv_rgb
[16:34:14] [PASSED] drm_test_bridge_must_convert_to_yuv444
[16:34:14] [PASSED] drm_test_bridge_hdmi_auto_rgb
[16:34:14] [PASSED] drm_test_bridge_auto_first
[16:34:14] [PASSED] drm_test_bridge_rgb_yuv_no_path
[16:34:14] =============== [PASSED] drm_bridge_bus_fmt ================
[16:34:14] ============= drm_cmdline_parser (40 subtests) =============
[16:34:14] [PASSED] drm_test_cmdline_force_d_only
[16:34:14] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:34:14] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:34:14] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:34:14] [PASSED] drm_test_cmdline_force_e_only
[16:34:14] [PASSED] drm_test_cmdline_res
[16:34:14] [PASSED] drm_test_cmdline_res_vesa
[16:34:14] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:34:14] [PASSED] drm_test_cmdline_res_rblank
[16:34:14] [PASSED] drm_test_cmdline_res_bpp
[16:34:14] [PASSED] drm_test_cmdline_res_refresh
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:34:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:34:14] [PASSED] drm_test_cmdline_res_margins_force_on
[16:34:14] [PASSED] drm_test_cmdline_res_vesa_margins
[16:34:14] [PASSED] drm_test_cmdline_name
[16:34:14] [PASSED] drm_test_cmdline_name_bpp
[16:34:14] [PASSED] drm_test_cmdline_name_option
[16:34:14] [PASSED] drm_test_cmdline_name_bpp_option
[16:34:14] [PASSED] drm_test_cmdline_rotate_0
[16:34:14] [PASSED] drm_test_cmdline_rotate_90
[16:34:14] [PASSED] drm_test_cmdline_rotate_180
[16:34:14] [PASSED] drm_test_cmdline_rotate_270
[16:34:14] [PASSED] drm_test_cmdline_hmirror
[16:34:14] [PASSED] drm_test_cmdline_vmirror
[16:34:14] [PASSED] drm_test_cmdline_margin_options
[16:34:14] [PASSED] drm_test_cmdline_multiple_options
[16:34:14] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:34:14] [PASSED] drm_test_cmdline_extra_and_option
[16:34:14] [PASSED] drm_test_cmdline_freestanding_options
[16:34:14] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:34:14] [PASSED] drm_test_cmdline_panel_orientation
[16:34:14] ================ drm_test_cmdline_invalid =================
[16:34:14] [PASSED] margin_only
[16:34:14] [PASSED] interlace_only
[16:34:14] [PASSED] res_missing_x
[16:34:14] [PASSED] res_missing_y
[16:34:14] [PASSED] res_bad_y
[16:34:14] [PASSED] res_missing_y_bpp
[16:34:14] [PASSED] res_bad_bpp
[16:34:14] [PASSED] res_bad_refresh
[16:34:14] [PASSED] res_bpp_refresh_force_on_off
[16:34:14] [PASSED] res_invalid_mode
[16:34:14] [PASSED] res_bpp_wrong_place_mode
[16:34:14] [PASSED] name_bpp_refresh
[16:34:14] [PASSED] name_refresh
[16:34:14] [PASSED] name_refresh_wrong_mode
[16:34:14] [PASSED] name_refresh_invalid_mode
[16:34:14] [PASSED] rotate_multiple
[16:34:14] [PASSED] rotate_invalid_val
[16:34:14] [PASSED] rotate_truncated
[16:34:14] [PASSED] invalid_option
[16:34:14] [PASSED] invalid_tv_option
[16:34:14] [PASSED] truncated_tv_option
[16:34:14] ============ [PASSED] drm_test_cmdline_invalid =============
[16:34:14] =============== drm_test_cmdline_tv_options ===============
[16:34:14] [PASSED] NTSC
[16:34:14] [PASSED] NTSC_443
[16:34:14] [PASSED] NTSC_J
[16:34:14] [PASSED] PAL
[16:34:14] [PASSED] PAL_M
[16:34:14] [PASSED] PAL_N
[16:34:14] [PASSED] SECAM
[16:34:14] [PASSED] MONO_525
[16:34:14] [PASSED] MONO_625
[16:34:14] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:34:14] =============== [PASSED] drm_cmdline_parser ================
[16:34:14] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:34:14] [PASSED] drm_test_connector_hdmi_init_valid
[16:34:14] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:34:14] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:34:14] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:34:14] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:34:14] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:34:14] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:34:14] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:34:14] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:34:14] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:34:14] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:34:14] [PASSED] supported_formats=0x5 yuv420_allowed=1
[16:34:14] [PASSED] supported_formats=0x5 yuv420_allowed=0
[16:34:14] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:34:14] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:34:14] [PASSED] drm_test_connector_hdmi_init_null_product
[16:34:14] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:34:14] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:34:14] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:34:14] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:34:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:34:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:34:14] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:34:14] ========= drm_test_connector_hdmi_init_type_valid =========
[16:34:14] [PASSED] HDMI-A
[16:34:14] [PASSED] HDMI-B
[16:34:14] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:34:14] ======== drm_test_connector_hdmi_init_type_invalid ========
[16:34:14] [PASSED] Unknown
[16:34:14] [PASSED] VGA
[16:34:14] [PASSED] DVI-I
[16:34:14] [PASSED] DVI-D
[16:34:14] [PASSED] DVI-A
[16:34:14] [PASSED] Composite
[16:34:14] [PASSED] SVIDEO
[16:34:14] [PASSED] LVDS
[16:34:14] [PASSED] Component
[16:34:14] [PASSED] DIN
[16:34:14] [PASSED] DP
[16:34:14] [PASSED] TV
[16:34:14] [PASSED] eDP
[16:34:14] [PASSED] Virtual
[16:34:14] [PASSED] DSI
[16:34:14] [PASSED] DPI
[16:34:14] [PASSED] Writeback
[16:34:14] [PASSED] SPI
[16:34:14] [PASSED] USB
[16:34:14] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:34:14] ============ [PASSED] drmm_connector_hdmi_init =============
[16:34:14] ============= drmm_connector_init (3 subtests) =============
[16:34:14] [PASSED] drm_test_drmm_connector_init
[16:34:14] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:34:14] ========= drm_test_drmm_connector_init_type_valid =========
[16:34:14] [PASSED] Unknown
[16:34:14] [PASSED] VGA
[16:34:14] [PASSED] DVI-I
[16:34:14] [PASSED] DVI-D
[16:34:14] [PASSED] DVI-A
[16:34:14] [PASSED] Composite
[16:34:14] [PASSED] SVIDEO
[16:34:14] [PASSED] LVDS
[16:34:14] [PASSED] Component
[16:34:14] [PASSED] DIN
[16:34:14] [PASSED] DP
[16:34:14] [PASSED] HDMI-A
[16:34:14] [PASSED] HDMI-B
[16:34:14] [PASSED] TV
[16:34:14] [PASSED] eDP
[16:34:14] [PASSED] Virtual
[16:34:14] [PASSED] DSI
[16:34:14] [PASSED] DPI
[16:34:14] [PASSED] Writeback
[16:34:14] [PASSED] SPI
[16:34:14] [PASSED] USB
[16:34:14] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:34:14] =============== [PASSED] drmm_connector_init ===============
[16:34:14] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_init
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:34:14] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[16:34:14] [PASSED] Unknown
[16:34:14] [PASSED] VGA
[16:34:14] [PASSED] DVI-I
[16:34:14] [PASSED] DVI-D
[16:34:14] [PASSED] DVI-A
[16:34:14] [PASSED] Composite
[16:34:14] [PASSED] SVIDEO
[16:34:14] [PASSED] LVDS
[16:34:14] [PASSED] Component
[16:34:14] [PASSED] DIN
[16:34:14] [PASSED] DP
[16:34:14] [PASSED] HDMI-A
[16:34:14] [PASSED] HDMI-B
[16:34:14] [PASSED] TV
[16:34:14] [PASSED] eDP
[16:34:14] [PASSED] Virtual
[16:34:14] [PASSED] DSI
[16:34:14] [PASSED] DPI
[16:34:14] [PASSED] Writeback
[16:34:14] [PASSED] SPI
[16:34:14] [PASSED] USB
[16:34:14] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:34:14] ======== drm_test_drm_connector_dynamic_init_name =========
[16:34:14] [PASSED] Unknown
[16:34:14] [PASSED] VGA
[16:34:14] [PASSED] DVI-I
[16:34:14] [PASSED] DVI-D
[16:34:14] [PASSED] DVI-A
[16:34:14] [PASSED] Composite
[16:34:14] [PASSED] SVIDEO
[16:34:14] [PASSED] LVDS
[16:34:14] [PASSED] Component
[16:34:14] [PASSED] DIN
[16:34:14] [PASSED] DP
[16:34:14] [PASSED] HDMI-A
[16:34:14] [PASSED] HDMI-B
[16:34:14] [PASSED] TV
[16:34:14] [PASSED] eDP
[16:34:14] [PASSED] Virtual
[16:34:14] [PASSED] DSI
[16:34:14] [PASSED] DPI
[16:34:14] [PASSED] Writeback
[16:34:14] [PASSED] SPI
[16:34:14] [PASSED] USB
[16:34:14] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:34:14] =========== [PASSED] drm_connector_dynamic_init ============
[16:34:14] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:34:14] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:34:14] ======= drm_connector_dynamic_register (7 subtests) ========
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:34:14] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:34:14] ========= [PASSED] drm_connector_dynamic_register ==========
[16:34:14] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:34:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:34:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:34:14] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:34:14] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:34:14] ========== drm_test_get_tv_mode_from_name_valid ===========
[16:34:14] [PASSED] NTSC
[16:34:14] [PASSED] NTSC-443
[16:34:14] [PASSED] NTSC-J
[16:34:14] [PASSED] PAL
[16:34:14] [PASSED] PAL-M
[16:34:14] [PASSED] PAL-N
[16:34:14] [PASSED] SECAM
[16:34:14] [PASSED] Mono
[16:34:14] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:34:14] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:34:14] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:34:14] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:34:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:34:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:34:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:34:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:34:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:34:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:34:14] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[16:34:14] [PASSED] VIC 96
[16:34:14] [PASSED] VIC 97
[16:34:14] [PASSED] VIC 101
[16:34:14] [PASSED] VIC 102
[16:34:14] [PASSED] VIC 106
[16:34:14] [PASSED] VIC 107
[16:34:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:34:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:34:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:34:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:34:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:34:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:34:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:34:14] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:34:14] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[16:34:14] [PASSED] Automatic
[16:34:14] [PASSED] Full
[16:34:14] [PASSED] Limited 16:235
[16:34:14] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:34:14] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:34:14] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:34:14] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:34:14] === drm_test_drm_hdmi_connector_get_output_format_name ====
[16:34:14] [PASSED] RGB
[16:34:14] [PASSED] YUV 4:2:0
[16:34:14] [PASSED] YUV 4:2:2
[16:34:14] [PASSED] YUV 4:4:4
[16:34:14] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:34:14] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:34:14] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:34:14] ============= drm_damage_helper (21 subtests) ==============
[16:34:14] [PASSED] drm_test_damage_iter_no_damage
[16:34:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:34:14] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:34:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:34:14] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:34:14] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:34:14] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:34:14] [PASSED] drm_test_damage_iter_simple_damage
[16:34:14] [PASSED] drm_test_damage_iter_single_damage
[16:34:14] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:34:14] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:34:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:34:14] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:34:14] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:34:14] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:34:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:34:14] [PASSED] drm_test_damage_iter_damage
[16:34:14] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:34:14] [PASSED] drm_test_damage_iter_damage_one_outside
[16:34:14] [PASSED] drm_test_damage_iter_damage_src_moved
[16:34:14] [PASSED] drm_test_damage_iter_damage_not_visible
[16:34:14] ================ [PASSED] drm_damage_helper ================
[16:34:14] ============== drm_dp_mst_helper (3 subtests) ==============
[16:34:14] ============== drm_test_dp_mst_calc_pbn_mode ==============
[16:34:14] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:34:14] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:34:14] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:34:14] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:34:14] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:34:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:34:14] ============== drm_test_dp_mst_calc_pbn_div ===============
[16:34:14] [PASSED] Link rate 2000000 lane count 4
[16:34:14] [PASSED] Link rate 2000000 lane count 2
[16:34:14] [PASSED] Link rate 2000000 lane count 1
[16:34:14] [PASSED] Link rate 1350000 lane count 4
[16:34:14] [PASSED] Link rate 1350000 lane count 2
[16:34:14] [PASSED] Link rate 1350000 lane count 1
[16:34:14] [PASSED] Link rate 1000000 lane count 4
[16:34:14] [PASSED] Link rate 1000000 lane count 2
[16:34:14] [PASSED] Link rate 1000000 lane count 1
[16:34:14] [PASSED] Link rate 810000 lane count 4
[16:34:14] [PASSED] Link rate 810000 lane count 2
[16:34:14] [PASSED] Link rate 810000 lane count 1
[16:34:14] [PASSED] Link rate 540000 lane count 4
[16:34:14] [PASSED] Link rate 540000 lane count 2
[16:34:14] [PASSED] Link rate 540000 lane count 1
[16:34:14] [PASSED] Link rate 270000 lane count 4
[16:34:14] [PASSED] Link rate 270000 lane count 2
[16:34:14] [PASSED] Link rate 270000 lane count 1
[16:34:14] [PASSED] Link rate 162000 lane count 4
[16:34:14] [PASSED] Link rate 162000 lane count 2
[16:34:14] [PASSED] Link rate 162000 lane count 1
[16:34:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:34:14] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[16:34:14] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:34:14] [PASSED] DP_POWER_UP_PHY with port number
[16:34:14] [PASSED] DP_POWER_DOWN_PHY with port number
[16:34:14] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:34:14] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:34:14] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:34:14] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:34:14] [PASSED] DP_QUERY_PAYLOAD with port number
[16:34:14] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:34:14] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:34:14] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:34:14] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:34:14] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:34:14] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:34:14] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:34:14] [PASSED] DP_REMOTE_I2C_READ with port number
[16:34:14] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:34:14] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:34:14] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:34:14] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:34:14] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:34:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:34:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:34:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:34:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:34:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:34:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:34:14] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:34:14] ================ [PASSED] drm_dp_mst_helper ================
[16:34:14] ================== drm_exec (7 subtests) ===================
[16:34:14] [PASSED] sanitycheck
[16:34:14] [PASSED] test_lock
[16:34:14] [PASSED] test_lock_unlock
[16:34:14] [PASSED] test_duplicates
[16:34:14] [PASSED] test_prepare
[16:34:14] [PASSED] test_prepare_array
[16:34:14] [PASSED] test_multiple_loops
[16:34:14] ==================== [PASSED] drm_exec =====================
[16:34:14] =========== drm_format_helper_test (17 subtests) ===========
[16:34:14] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:34:14] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:34:14] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:34:14] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:34:14] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:34:14] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:34:14] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:34:14] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:34:14] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:34:14] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:34:14] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:34:14] ============== drm_test_fb_xrgb8888_to_mono ===============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:34:14] ==================== drm_test_fb_swab =====================
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ================ [PASSED] drm_test_fb_swab =================
[16:34:14] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:34:14] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[16:34:14] [PASSED] single_pixel_source_buffer
[16:34:14] [PASSED] single_pixel_clip_rectangle
[16:34:14] [PASSED] well_known_colors
[16:34:14] [PASSED] destination_pitch
[16:34:14] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:34:14] ================= drm_test_fb_clip_offset =================
[16:34:14] [PASSED] pass through
[16:34:14] [PASSED] horizontal offset
[16:34:14] [PASSED] vertical offset
[16:34:14] [PASSED] horizontal and vertical offset
[16:34:14] [PASSED] horizontal offset (custom pitch)
[16:34:14] [PASSED] vertical offset (custom pitch)
[16:34:14] [PASSED] horizontal and vertical offset (custom pitch)
[16:34:14] ============= [PASSED] drm_test_fb_clip_offset =============
[16:34:14] =================== drm_test_fb_memcpy ====================
[16:34:14] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:34:14] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:34:14] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:34:14] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:34:14] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:34:14] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:34:14] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:34:14] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:34:14] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:34:14] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:34:14] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:34:14] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:34:14] =============== [PASSED] drm_test_fb_memcpy ================
[16:34:14] ============= [PASSED] drm_format_helper_test ==============
[16:34:14] ================= drm_format (18 subtests) =================
[16:34:14] [PASSED] drm_test_format_block_width_invalid
[16:34:14] [PASSED] drm_test_format_block_width_one_plane
[16:34:14] [PASSED] drm_test_format_block_width_two_plane
[16:34:14] [PASSED] drm_test_format_block_width_three_plane
[16:34:14] [PASSED] drm_test_format_block_width_tiled
[16:34:14] [PASSED] drm_test_format_block_height_invalid
[16:34:14] [PASSED] drm_test_format_block_height_one_plane
[16:34:14] [PASSED] drm_test_format_block_height_two_plane
[16:34:14] [PASSED] drm_test_format_block_height_three_plane
[16:34:14] [PASSED] drm_test_format_block_height_tiled
[16:34:14] [PASSED] drm_test_format_min_pitch_invalid
[16:34:14] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:34:14] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:34:14] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:34:14] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:34:14] [PASSED] drm_test_format_min_pitch_two_plane
[16:34:14] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:34:14] [PASSED] drm_test_format_min_pitch_tiled
[16:34:14] =================== [PASSED] drm_format ====================
[16:34:14] ============== drm_framebuffer (10 subtests) ===============
[16:34:14] ========== drm_test_framebuffer_check_src_coords ==========
[16:34:14] [PASSED] Success: source fits into fb
[16:34:14] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:34:14] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:34:14] [PASSED] Fail: overflowing fb with source width
[16:34:14] [PASSED] Fail: overflowing fb with source height
[16:34:14] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:34:14] [PASSED] drm_test_framebuffer_cleanup
[16:34:14] =============== drm_test_framebuffer_create ===============
[16:34:14] [PASSED] ABGR8888 normal sizes
[16:34:14] [PASSED] ABGR8888 max sizes
[16:34:14] [PASSED] ABGR8888 pitch greater than min required
[16:34:14] [PASSED] ABGR8888 pitch less than min required
[16:34:14] [PASSED] ABGR8888 Invalid width
[16:34:14] [PASSED] ABGR8888 Invalid buffer handle
[16:34:14] [PASSED] No pixel format
[16:34:14] [PASSED] ABGR8888 Width 0
[16:34:14] [PASSED] ABGR8888 Height 0
[16:34:14] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:34:14] [PASSED] ABGR8888 Large buffer offset
[16:34:14] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:34:14] [PASSED] ABGR8888 Invalid flag
[16:34:14] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:34:14] [PASSED] ABGR8888 Valid buffer modifier
[16:34:14] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:34:14] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:34:14] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:34:14] [PASSED] NV12 Normal sizes
[16:34:14] [PASSED] NV12 Max sizes
[16:34:14] [PASSED] NV12 Invalid pitch
[16:34:14] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:34:14] [PASSED] NV12 different modifier per-plane
[16:34:14] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:34:14] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:34:14] [PASSED] NV12 Modifier for inexistent plane
[16:34:14] [PASSED] NV12 Handle for inexistent plane
[16:34:14] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:34:14] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:34:14] [PASSED] YVU420 Normal sizes
[16:34:14] [PASSED] YVU420 Max sizes
[16:34:14] [PASSED] YVU420 Invalid pitch
[16:34:14] [PASSED] YVU420 Different pitches
[16:34:14] [PASSED] YVU420 Different buffer offsets/pitches
[16:34:14] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:34:14] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:34:14] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:34:14] [PASSED] YVU420 Valid modifier
[16:34:14] [PASSED] YVU420 Different modifiers per plane
[16:34:14] [PASSED] YVU420 Modifier for inexistent plane
[16:34:14] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:34:14] [PASSED] X0L2 Normal sizes
[16:34:14] [PASSED] X0L2 Max sizes
[16:34:14] [PASSED] X0L2 Invalid pitch
[16:34:14] [PASSED] X0L2 Pitch greater than minimum required
[16:34:14] [PASSED] X0L2 Handle for inexistent plane
[16:34:14] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:34:14] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:34:14] [PASSED] X0L2 Valid modifier
[16:34:14] [PASSED] X0L2 Modifier for inexistent plane
[16:34:14] =========== [PASSED] drm_test_framebuffer_create ===========
[16:34:14] [PASSED] drm_test_framebuffer_free
[16:34:14] [PASSED] drm_test_framebuffer_init
[16:34:14] [PASSED] drm_test_framebuffer_init_bad_format
[16:34:14] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:34:14] [PASSED] drm_test_framebuffer_lookup
[16:34:14] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:34:14] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:34:14] ================= [PASSED] drm_framebuffer =================
[16:34:14] ================ drm_gem_shmem (8 subtests) ================
[16:34:14] [PASSED] drm_gem_shmem_test_obj_create
[16:34:14] [PASSED] drm_gem_shmem_test_obj_create_private
[16:34:14] [PASSED] drm_gem_shmem_test_pin_pages
[16:34:14] [PASSED] drm_gem_shmem_test_vmap
[16:34:14] [PASSED] drm_gem_shmem_test_get_sg_table
[16:34:14] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:34:14] [PASSED] drm_gem_shmem_test_madvise
[16:34:14] [PASSED] drm_gem_shmem_test_purge
[16:34:14] ================== [PASSED] drm_gem_shmem ==================
[16:34:14] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:34:14] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[16:34:14] [PASSED] Automatic
[16:34:14] [PASSED] Full
[16:34:14] [PASSED] Limited 16:235
[16:34:14] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:34:14] [PASSED] drm_test_check_disable_connector
[16:34:14] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:34:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:34:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:34:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:34:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:34:14] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:34:14] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:34:14] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:34:14] [PASSED] drm_test_check_output_bpc_dvi
[16:34:14] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:34:14] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:34:14] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:34:14] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:34:14] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:34:14] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:34:14] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:34:14] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:34:14] ============ drm_test_check_hdmi_color_format =============
[16:34:14] [PASSED] AUTO -> RGB
[16:34:14] [PASSED] YCBCR422 -> YUV422
[16:34:14] [PASSED] YCBCR420 -> YUV420
[16:34:14] [PASSED] YCBCR444 -> YUV444
[16:34:14] [PASSED] RGB -> RGB
[16:34:14] ======== [PASSED] drm_test_check_hdmi_color_format =========
[16:34:14] ======== drm_test_check_hdmi_color_format_420_only ========
[16:34:14] [PASSED] RGB should fail
[16:34:14] [PASSED] YUV444 should fail
[16:34:14] [PASSED] YUV422 should fail
[16:34:14] [PASSED] YUV420 should work
[16:34:14] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[16:34:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:34:14] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:34:14] [PASSED] drm_test_check_broadcast_rgb_value
[16:34:14] [PASSED] drm_test_check_bpc_8_value
[16:34:14] [PASSED] drm_test_check_bpc_10_value
[16:34:14] [PASSED] drm_test_check_bpc_12_value
[16:34:14] [PASSED] drm_test_check_format_value
[16:34:14] [PASSED] drm_test_check_tmds_char_value
[16:34:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:34:14] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[16:34:14] [PASSED] drm_test_check_mode_valid
[16:34:14] [PASSED] drm_test_check_mode_valid_reject
[16:34:14] [PASSED] drm_test_check_mode_valid_reject_rate
[16:34:14] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:34:14] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[16:34:14] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[16:34:14] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[16:34:14] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:34:14] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[16:34:14] [PASSED] drm_test_check_infoframes
[16:34:14] [PASSED] drm_test_check_reject_avi_infoframe
[16:34:14] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[16:34:14] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[16:34:14] [PASSED] drm_test_check_reject_audio_infoframe
[16:34:14] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[16:34:14] ================= drm_managed (2 subtests) =================
[16:34:14] [PASSED] drm_test_managed_release_action
[16:34:14] [PASSED] drm_test_managed_run_action
[16:34:14] =================== [PASSED] drm_managed ===================
[16:34:14] =================== drm_mm (6 subtests) ====================
[16:34:14] [PASSED] drm_test_mm_init
[16:34:14] [PASSED] drm_test_mm_debug
[16:34:14] [PASSED] drm_test_mm_align32
[16:34:14] [PASSED] drm_test_mm_align64
[16:34:14] [PASSED] drm_test_mm_lowest
[16:34:14] [PASSED] drm_test_mm_highest
[16:34:14] ===================== [PASSED] drm_mm ======================
[16:34:14] ============= drm_modes_analog_tv (5 subtests) =============
[16:34:14] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:34:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:34:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:34:14] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:34:14] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:34:14] =============== [PASSED] drm_modes_analog_tv ===============
[16:34:14] ============== drm_plane_helper (2 subtests) ===============
[16:34:14] =============== drm_test_check_plane_state ================
[16:34:14] [PASSED] clipping_simple
[16:34:14] [PASSED] clipping_rotate_reflect
[16:34:14] [PASSED] positioning_simple
[16:34:14] [PASSED] upscaling
[16:34:14] [PASSED] downscaling
[16:34:14] [PASSED] rounding1
[16:34:14] [PASSED] rounding2
[16:34:14] [PASSED] rounding3
[16:34:14] [PASSED] rounding4
[16:34:14] =========== [PASSED] drm_test_check_plane_state ============
[16:34:14] =========== drm_test_check_invalid_plane_state ============
[16:34:14] [PASSED] positioning_invalid
[16:34:14] [PASSED] upscaling_invalid
[16:34:14] [PASSED] downscaling_invalid
[16:34:14] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:34:14] ================ [PASSED] drm_plane_helper =================
[16:34:14] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:34:14] ====== drm_test_connector_helper_tv_get_modes_check =======
[16:34:14] [PASSED] None
[16:34:14] [PASSED] PAL
[16:34:14] [PASSED] NTSC
[16:34:14] [PASSED] Both, NTSC Default
[16:34:14] [PASSED] Both, PAL Default
[16:34:14] [PASSED] Both, NTSC Default, with PAL on command-line
[16:34:14] [PASSED] Both, PAL Default, with NTSC on command-line
[16:34:14] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:34:14] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:34:14] ================== drm_rect (9 subtests) ===================
[16:34:14] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:34:14] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:34:14] [PASSED] drm_test_rect_clip_scaled_clipped
[16:34:14] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:34:14] ================= drm_test_rect_intersect =================
[16:34:14] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:34:14] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:34:14] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:34:14] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:34:14] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:34:14] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:34:14] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:34:14] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:34:14] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:34:14] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:34:14] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:34:14] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:34:14] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:34:14] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:34:14] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:34:14] ============= [PASSED] drm_test_rect_intersect =============
[16:34:14] ================ drm_test_rect_calc_hscale ================
[16:34:14] [PASSED] normal use
[16:34:14] [PASSED] out of max range
[16:34:14] [PASSED] out of min range
[16:34:14] [PASSED] zero dst
[16:34:14] [PASSED] negative src
[16:34:14] [PASSED] negative dst
[16:34:14] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:34:14] ================ drm_test_rect_calc_vscale ================
[16:34:14] [PASSED] normal use
[16:34:14] [PASSED] out of max range
[16:34:14] [PASSED] out of min range
[16:34:14] [PASSED] zero dst
[16:34:14] [PASSED] negative src
[16:34:14] [PASSED] negative dst
[16:34:14] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:34:14] ================== drm_test_rect_rotate ===================
[16:34:14] [PASSED] reflect-x
[16:34:14] [PASSED] reflect-y
[16:34:14] [PASSED] rotate-0
[16:34:14] [PASSED] rotate-90
[16:34:14] [PASSED] rotate-180
[16:34:14] [PASSED] rotate-270
[16:34:14] ============== [PASSED] drm_test_rect_rotate ===============
[16:34:14] ================ drm_test_rect_rotate_inv =================
[16:34:14] [PASSED] reflect-x
[16:34:14] [PASSED] reflect-y
[16:34:14] [PASSED] rotate-0
[16:34:14] [PASSED] rotate-90
[16:34:14] [PASSED] rotate-180
[16:34:14] [PASSED] rotate-270
[16:34:14] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:34:14] ==================== [PASSED] drm_rect =====================
[16:34:14] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:34:14] ============ drm_test_sysfb_build_fourcc_list =============
[16:34:14] [PASSED] no native formats
[16:34:14] [PASSED] XRGB8888 as native format
[16:34:14] [PASSED] remove duplicates
[16:34:14] [PASSED] convert alpha formats
[16:34:14] [PASSED] random formats
[16:34:14] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:34:14] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:34:14] ================== drm_fixp (2 subtests) ===================
[16:34:14] [PASSED] drm_test_int2fixp
[16:34:14] [PASSED] drm_test_sm2fixp
[16:34:14] ==================== [PASSED] drm_fixp =====================
[16:34:14] ============================================================
[16:34:14] Testing complete. Ran 637 tests: passed: 637
[16:34:14] Elapsed time: 26.687s total, 1.828s configuring, 24.691s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:34:14] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:34:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:34:26] Starting KUnit Kernel (1/1)...
[16:34:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:34:26] ================= ttm_device (5 subtests) ==================
[16:34:26] [PASSED] ttm_device_init_basic
[16:34:26] [PASSED] ttm_device_init_multiple
[16:34:26] [PASSED] ttm_device_fini_basic
[16:34:26] [PASSED] ttm_device_init_no_vma_man
[16:34:26] ================== ttm_device_init_pools ==================
[16:34:26] [PASSED] No DMA allocations, no DMA32 required
[16:34:26] [PASSED] DMA allocations, DMA32 required
[16:34:26] [PASSED] No DMA allocations, DMA32 required
[16:34:26] [PASSED] DMA allocations, no DMA32 required
[16:34:26] ============== [PASSED] ttm_device_init_pools ==============
[16:34:26] =================== [PASSED] ttm_device ====================
[16:34:26] ================== ttm_pool (8 subtests) ===================
[16:34:26] ================== ttm_pool_alloc_basic ===================
[16:34:26] [PASSED] One page
[16:34:26] [PASSED] More than one page
[16:34:26] [PASSED] Above the allocation limit
[16:34:26] [PASSED] One page, with coherent DMA mappings enabled
[16:34:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:34:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:34:26] ============== ttm_pool_alloc_basic_dma_addr ==============
[16:34:26] [PASSED] One page
[16:34:26] [PASSED] More than one page
[16:34:26] [PASSED] Above the allocation limit
[16:34:26] [PASSED] One page, with coherent DMA mappings enabled
[16:34:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:34:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:34:26] [PASSED] ttm_pool_alloc_order_caching_match
[16:34:26] [PASSED] ttm_pool_alloc_caching_mismatch
[16:34:26] [PASSED] ttm_pool_alloc_order_mismatch
[16:34:26] [PASSED] ttm_pool_free_dma_alloc
[16:34:26] [PASSED] ttm_pool_free_no_dma_alloc
[16:34:26] [PASSED] ttm_pool_fini_basic
[16:34:26] ==================== [PASSED] ttm_pool =====================
[16:34:26] ================ ttm_resource (8 subtests) =================
[16:34:26] ================= ttm_resource_init_basic =================
[16:34:26] [PASSED] Init resource in TTM_PL_SYSTEM
[16:34:26] [PASSED] Init resource in TTM_PL_VRAM
[16:34:26] [PASSED] Init resource in a private placement
[16:34:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:34:26] ============= [PASSED] ttm_resource_init_basic =============
[16:34:26] [PASSED] ttm_resource_init_pinned
[16:34:26] [PASSED] ttm_resource_fini_basic
[16:34:26] [PASSED] ttm_resource_manager_init_basic
[16:34:26] [PASSED] ttm_resource_manager_usage_basic
[16:34:26] [PASSED] ttm_resource_manager_set_used_basic
[16:34:26] [PASSED] ttm_sys_man_alloc_basic
[16:34:26] [PASSED] ttm_sys_man_free_basic
[16:34:26] ================== [PASSED] ttm_resource ===================
[16:34:26] =================== ttm_tt (15 subtests) ===================
[16:34:26] ==================== ttm_tt_init_basic ====================
[16:34:26] [PASSED] Page-aligned size
[16:34:26] [PASSED] Extra pages requested
[16:34:26] ================ [PASSED] ttm_tt_init_basic ================
[16:34:26] [PASSED] ttm_tt_init_misaligned
[16:34:26] [PASSED] ttm_tt_fini_basic
[16:34:26] [PASSED] ttm_tt_fini_sg
[16:34:26] [PASSED] ttm_tt_fini_shmem
[16:34:26] [PASSED] ttm_tt_create_basic
[16:34:26] [PASSED] ttm_tt_create_invalid_bo_type
[16:34:26] [PASSED] ttm_tt_create_ttm_exists
[16:34:26] [PASSED] ttm_tt_create_failed
[16:34:26] [PASSED] ttm_tt_destroy_basic
[16:34:26] [PASSED] ttm_tt_populate_null_ttm
[16:34:26] [PASSED] ttm_tt_populate_populated_ttm
[16:34:26] [PASSED] ttm_tt_unpopulate_basic
[16:34:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:34:26] [PASSED] ttm_tt_swapin_basic
[16:34:26] ===================== [PASSED] ttm_tt ======================
[16:34:26] =================== ttm_bo (14 subtests) ===================
[16:34:26] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[16:34:26] [PASSED] Cannot be interrupted and sleeps
[16:34:26] [PASSED] Cannot be interrupted, locks straight away
[16:34:26] [PASSED] Can be interrupted, sleeps
[16:34:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:34:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:34:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:34:26] [PASSED] ttm_bo_reserve_double_resv
[16:34:26] [PASSED] ttm_bo_reserve_interrupted
[16:34:26] [PASSED] ttm_bo_reserve_deadlock
[16:34:26] [PASSED] ttm_bo_unreserve_basic
[16:34:26] [PASSED] ttm_bo_unreserve_pinned
[16:34:26] [PASSED] ttm_bo_unreserve_bulk
[16:34:26] [PASSED] ttm_bo_fini_basic
[16:34:26] [PASSED] ttm_bo_fini_shared_resv
[16:34:26] [PASSED] ttm_bo_pin_basic
[16:34:26] [PASSED] ttm_bo_pin_unpin_resource
[16:34:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:34:26] ===================== [PASSED] ttm_bo ======================
[16:34:26] ============== ttm_bo_validate (22 subtests) ===============
[16:34:26] ============== ttm_bo_init_reserved_sys_man ===============
[16:34:26] [PASSED] Buffer object for userspace
[16:34:26] [PASSED] Kernel buffer object
[16:34:26] [PASSED] Shared buffer object
[16:34:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:34:26] ============== ttm_bo_init_reserved_mock_man ==============
[16:34:26] [PASSED] Buffer object for userspace
[16:34:26] [PASSED] Kernel buffer object
[16:34:26] [PASSED] Shared buffer object
[16:34:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:34:26] [PASSED] ttm_bo_init_reserved_resv
[16:34:26] ================== ttm_bo_validate_basic ==================
[16:34:26] [PASSED] Buffer object for userspace
[16:34:26] [PASSED] Kernel buffer object
[16:34:26] [PASSED] Shared buffer object
[16:34:26] ============== [PASSED] ttm_bo_validate_basic ==============
[16:34:26] [PASSED] ttm_bo_validate_invalid_placement
[16:34:26] ============= ttm_bo_validate_same_placement ==============
[16:34:26] [PASSED] System manager
[16:34:26] [PASSED] VRAM manager
[16:34:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:34:26] [PASSED] ttm_bo_validate_failed_alloc
[16:34:26] [PASSED] ttm_bo_validate_pinned
[16:34:26] [PASSED] ttm_bo_validate_busy_placement
[16:34:26] ================ ttm_bo_validate_multihop =================
[16:34:26] [PASSED] Buffer object for userspace
[16:34:26] [PASSED] Kernel buffer object
[16:34:26] [PASSED] Shared buffer object
[16:34:26] ============ [PASSED] ttm_bo_validate_multihop =============
[16:34:26] ========== ttm_bo_validate_no_placement_signaled ==========
[16:34:26] [PASSED] Buffer object in system domain, no page vector
[16:34:26] [PASSED] Buffer object in system domain with an existing page vector
[16:34:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:34:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[16:34:26] [PASSED] Buffer object for userspace
[16:34:26] [PASSED] Kernel buffer object
[16:34:26] [PASSED] Shared buffer object
[16:34:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:34:26] [PASSED] ttm_bo_validate_move_fence_signaled
[16:34:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[16:34:26] [PASSED] Waits for GPU
[16:34:26] [PASSED] Tries to lock straight away
[16:34:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:34:26] [PASSED] ttm_bo_validate_swapout
[16:34:26] [PASSED] ttm_bo_validate_happy_evict
[16:34:26] [PASSED] ttm_bo_validate_all_pinned_evict
[16:34:26] [PASSED] ttm_bo_validate_allowed_only_evict
[16:34:26] [PASSED] ttm_bo_validate_deleted_evict
[16:34:26] [PASSED] ttm_bo_validate_busy_domain_evict
[16:34:26] [PASSED] ttm_bo_validate_evict_gutting
[16:34:26] [PASSED] ttm_bo_validate_recrusive_evict
[16:34:26] ================= [PASSED] ttm_bo_validate =================
[16:34:26] ============================================================
[16:34:26] Testing complete. Ran 102 tests: passed: 102
[16:34:26] Elapsed time: 11.921s total, 1.825s configuring, 9.881s building, 0.178s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[16:34:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:34:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:34:36] Starting KUnit Kernel (1/1)...
[16:34:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:34:36] =============== dma-buf-fence (12 subtests) ================
[16:34:36] [PASSED] test_sanitycheck
[16:34:36] [PASSED] test_signaling
[16:34:36] [PASSED] test_add_callback
[16:34:36] [PASSED] test_late_add_callback
[16:34:36] [PASSED] test_rm_callback
[16:34:36] [PASSED] test_late_rm_callback
[16:34:36] [PASSED] test_status
[16:34:36] [PASSED] test_error
[16:34:37] [PASSED] test_wait
[16:34:37] [PASSED] test_wait_timeout
[16:34:37] [PASSED] test_stub
[16:34:37] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[16:34:37] ================== [PASSED] dma-buf-fence ==================
[16:34:37] ============ dma-buf-fence-chain (11 subtests) =============
[16:34:37] [PASSED] test_sanitycheck
[16:34:37] [PASSED] test_find_seqno
[16:34:37] [PASSED] test_find_signaled
[16:34:37] [PASSED] test_find_out_of_order
[16:34:42] [PASSED] test_find_gap
[16:34:42] [PASSED] test_find_race
[16:34:42] [PASSED] test_signal_forward
[16:34:42] [PASSED] test_signal_backward
[16:34:42] [PASSED] test_wait_forward
[16:34:42] [PASSED] test_wait_backward
[16:34:42] [PASSED] test_wait_random
[16:34:42] =============== [PASSED] dma-buf-fence-chain ===============
[16:34:42] ============ dma-buf-fence-unwrap (10 subtests) ============
[16:34:42] [PASSED] test_sanitycheck
[16:34:42] [PASSED] test_unwrap_array
[16:34:42] [PASSED] test_unwrap_chain
[16:34:42] [PASSED] test_unwrap_chain_array
[16:34:42] [PASSED] test_unwrap_merge
[16:34:42] [PASSED] test_unwrap_merge_duplicate
[16:34:42] [PASSED] test_unwrap_merge_seqno
[16:34:42] [PASSED] test_unwrap_merge_order
[16:34:42] [PASSED] test_unwrap_merge_complex
[16:34:42] [PASSED] test_unwrap_merge_complex_seqno
[16:34:42] ============== [PASSED] dma-buf-fence-unwrap ===============
[16:34:42] ================ dma-buf-resv (5 subtests) =================
[16:34:42] [PASSED] test_sanitycheck
[16:34:42] ===================== test_signaling ======================
[16:34:42] [PASSED] kernel
[16:34:42] [PASSED] write
[16:34:42] [PASSED] read
[16:34:42] [PASSED] bookkeep
[16:34:42] ================= [PASSED] test_signaling ==================
[16:34:42] ====================== test_for_each ======================
[16:34:42] [PASSED] kernel
[16:34:42] [PASSED] write
[16:34:42] [PASSED] read
[16:34:42] [PASSED] bookkeep
[16:34:42] ================== [PASSED] test_for_each ==================
[16:34:42] ================= test_for_each_unlocked ==================
[16:34:42] [PASSED] kernel
[16:34:42] [PASSED] write
[16:34:42] [PASSED] read
[16:34:42] [PASSED] bookkeep
[16:34:42] ============= [PASSED] test_for_each_unlocked ==============
[16:34:42] ===================== test_get_fences =====================
[16:34:42] [PASSED] kernel
[16:34:42] [PASSED] write
[16:34:42] [PASSED] read
[16:34:42] [PASSED] bookkeep
[16:34:42] ================= [PASSED] test_get_fences =================
[16:34:42] ================== [PASSED] dma-buf-resv ===================
[16:34:42] ============================================================
[16:34:42] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[16:34:42] Elapsed time: 15.705s total, 1.797s configuring, 8.586s building, 5.286s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 4+ messages in thread
* ✗ Xe.CI.BAT: failure for drm/xe/vram: Add early VRAM health check (rev2)
2026-08-26 15:24 [CI v2] drm/xe/vram: Add early VRAM health check Matthew Auld
2026-08-26 16:34 ` ✓ CI.KUnit: success for drm/xe/vram: Add early VRAM health check (rev2) Patchwork
@ 2026-08-26 17:22 ` Patchwork
2026-08-26 20:54 ` ✗ Xe.CI.FULL: " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2026-08-26 17:22 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2110 bytes --]
== Series Details ==
Series: drm/xe/vram: Add early VRAM health check (rev2)
URL : https://patchwork.freedesktop.org/series/172786/
State : failure
== Summary ==
CI Bug Log - changes from xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6_BAT -> xe-pw-172786v2_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-172786v2_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-172786v2_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-172786v2_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unbind-rebind:
- bat-bmg-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
- bat-bmg-1: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
Build changes
-------------
* Linux: xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6 -> xe-pw-172786v2
IGT_9076: 8f42b0189d73d9912ad58c99cfaa4ff46c20fcc3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6: 4a47d4b5bf957bd7e34d8d3ab7096c42161892c6
xe-pw-172786v2: 172786v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/index.html
[-- Attachment #2: Type: text/html, Size: 2703 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/xe/vram: Add early VRAM health check (rev2)
2026-08-26 15:24 [CI v2] drm/xe/vram: Add early VRAM health check Matthew Auld
2026-08-26 16:34 ` ✓ CI.KUnit: success for drm/xe/vram: Add early VRAM health check (rev2) Patchwork
2026-08-26 17:22 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-08-26 20:54 ` Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2026-08-26 20:54 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 15686 bytes --]
== Series Details ==
Series: drm/xe/vram: Add early VRAM health check (rev2)
URL : https://patchwork.freedesktop.org/series/172786/
State : failure
== Summary ==
CI Bug Log - changes from xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6_FULL -> xe-pw-172786v2_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-172786v2_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-172786v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-172786v2_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unplug-rescan:
- shard-bmg: [PASS][1] -> [ABORT][2] +11 other tests abort
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-4/igt@core_hotunplug@unplug-rescan.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-3/igt@core_hotunplug@unplug-rescan.html
#### Warnings ####
* igt@xe_module_load@load:
- shard-bmg: ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [SKIP][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28]) ([Intel XE#2457] / [Intel XE#7405]) -> ([PASS][29], [DMESG-FAIL][30], [DMESG-FAIL][31], [DMESG-FAIL][32], [PASS][33], [PASS][34], [DMESG-FAIL][35], [DMESG-FAIL][36], [DMESG-FAIL][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [DMESG-FAIL][46], [DMESG-FAIL][47], [DMESG-FAIL][48], [DMESG-FAIL][49], [PASS][50], [PASS][51], [DMESG-FAIL][52], [DMESG-FAIL][53])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-8/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-1/igt@xe_module_load@load.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-1/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-1/igt@xe_module_load@load.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-1/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-6/igt@xe_module_load@load.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-3/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-6/igt@xe_module_load@load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-6/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-4/igt@xe_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-4/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-10/igt@xe_module_load@load.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-10/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-5/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-3/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-5/igt@xe_module_load@load.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-7/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-7/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-7/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-9/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-8/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-3/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-2/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-2/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-2/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-9/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-5/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-6/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-6/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-6/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-3/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-2/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-2/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-2/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-2/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-9/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-7/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-7/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-1/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-1/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-1/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-10/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-8/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-8/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-8/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-5/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-5/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-4/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-4/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-5/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-5/igt@xe_module_load@load.html
New tests
---------
New tests have been introduced between xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6_FULL and xe-pw-172786v2_FULL:
### New IGT tests (23) ###
* igt@kms_flip@absolute-wf_vblank-interruptible@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.11] s
* igt@kms_flip@absolute-wf_vblank-interruptible@b-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.11] s
* igt@kms_flip@absolute-wf_vblank-interruptible@c-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.07] s
* igt@kms_flip@blocking-wf_vblank@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.42] s
* igt@kms_flip@blocking-wf_vblank@b-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.41] s
* igt@kms_flip@blocking-wf_vblank@c-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.40] s
* igt@kms_flip@dpms-vs-vblank-race-interruptible@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [1.79] s
* igt@kms_flip@dpms-vs-vblank-race-interruptible@b-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [1.78] s
* igt@kms_flip@dpms-vs-vblank-race-interruptible@c-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [1.81] s
* igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.42] s
* igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.42] s
* igt@kms_flip@flip-vs-absolute-wf_vblank@c-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.41] s
* igt@kms_flip@flip-vs-dpms-off-vs-modeset@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.80] s
* igt@kms_flip@flip-vs-dpms-off-vs-modeset@b-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.81] s
* igt@kms_flip@flip-vs-dpms-off-vs-modeset@c-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.83] s
* igt@kms_flip@flip-vs-modeset-vs-hang@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.79] s
* igt@kms_flip@flip-vs-panning-vs-hang@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.80] s
* igt@kms_flip@flip-vs-rmfb-interruptible@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [3.99] s
* igt@kms_flip@flip-vs-rmfb-interruptible@b-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [4.01] s
* igt@kms_flip@flip-vs-rmfb-interruptible@c-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [3.99] s
* igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@a-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.73] s
* igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@b-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.73] s
* igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@c-hdmi-a3:
- Statuses : 1 pass(s)
- Exec time: [0.73] s
Known issues
------------
Here are the changes found in xe-pw-172786v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][54] -> [FAIL][55] ([Intel XE#301])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_vrr@flipline:
- shard-lnl: [PASS][56] -> [FAIL][57] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-lnl-3/igt@kms_vrr@flipline.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-lnl-2/igt@kms_vrr@flipline.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [PASS][58] -> [INCOMPLETE][59] ([Intel XE#6321] / [Intel XE#8355])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute:
- shard-bmg: [PASS][60] -> [ABORT][61] ([Intel XE#8007]) +1 other test abort
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-bmg-4/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-bmg-10/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][62] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][63] +2 other tests pass
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_pm_dc@dc6-dpms:
- shard-lnl: [FAIL][64] ([Intel XE#8399]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-lnl-2/igt@kms_pm_dc@dc6-dpms.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-lnl-6/igt@kms_pm_dc@dc6-dpms.html
#### Warnings ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][66] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][67] ([Intel XE#301])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
[Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
Build changes
-------------
* Linux: xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6 -> xe-pw-172786v2
IGT_9076: 8f42b0189d73d9912ad58c99cfaa4ff46c20fcc3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5647-4a47d4b5bf957bd7e34d8d3ab7096c42161892c6: 4a47d4b5bf957bd7e34d8d3ab7096c42161892c6
xe-pw-172786v2: 172786v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172786v2/index.html
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2026-08-26 15:24 [CI v2] drm/xe/vram: Add early VRAM health check Matthew Auld
2026-08-26 16:34 ` ✓ CI.KUnit: success for drm/xe/vram: Add early VRAM health check (rev2) Patchwork
2026-08-26 17:22 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-26 20:54 ` ✗ Xe.CI.FULL: " Patchwork
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