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From: Chinmay Rath <rathc@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	harshpb@linux.ibm.com, milesg@linux.ibm.com
Cc: npiggin@gmail.com, richard.henderson@linaro.org,
	vishalc@linux.ibm.com, tshah@linux.ibm.com,
	shivangu@linux.ibm.com, ojaswin@linux.ibm.com,
	aboorvad@linux.ibm.com, amachhiw@linux.ibm.com,
	shivani@linux.ibm.com, mkchauras@gmail.com, uverma@linux.ibm.com,
	nikhilks@linux.ibm.com, Chinmay Rath <rathc@linux.ibm.com>
Subject: [PATCH v3 16/37] target/ppc: Fix TRANS* macro variadic arguments handling
Date: Thu, 27 Aug 2026 18:59:31 +0530	[thread overview]
Message-ID: <20260827133010.278889-17-rathc@linux.ibm.com> (raw)
In-Reply-To: <20260827133010.278889-1-rathc@linux.ibm.com>

From: Ojaswin Mujoo <ojaswin@linux.ibm.com>

Use ##__VA_ARGS__ in TRANS* macros to allow variadic arguments to be
optional instead of mandatory. "##" removes the preceding comma when
__VA_ARGS__ is empty, enabling macros to work with functions that don't
need extra parameters.

This avoid compilation errors when using a pattern like below:

  static bool do_wait(DisasContext *ctx, arg_X_wait *a)
  {...}

  TRANS_FLAGS(WAIT, WAIT_ISA_2_X, do_wait)

Compilation Error:
../target/ppc/translate.c:5526:40: error: expected expression before ‘)’ token
 5526 |         return FUNC(ctx, a, __VA_ARGS__);                      \
      |                                        ^
../target/ppc/translate/storage-ctrl-impl.c.inc:368:1: note: in expansion of macro ‘TRANS_FLAGS’
  368 | TRANS_FLAGS(WAIT, WAIT_ISA_2_X, do_wait)

Signed-off-by: Ojaswin Mujoo <ojaswin@linux.ibm.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Amit Machhiwal <amachhiw@linux.ibm.com>
Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
---
 target/ppc/translate.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index f5b1446d7a..322870dc0d 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4749,29 +4749,29 @@ static int64_t dw_compose_ea(DisasContext *ctx, int x)
  */
 #define TRANS(NAME, FUNC, ...) \
     static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \
-    { return FUNC(ctx, a, __VA_ARGS__); }
+    { return FUNC(ctx, a, ##__VA_ARGS__); }
 #define TRANS_FLAGS(FLAGS, NAME, FUNC, ...) \
     static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \
     {                                                          \
         REQUIRE_INSNS_FLAGS(ctx, FLAGS);                       \
-        return FUNC(ctx, a, __VA_ARGS__);                      \
+        return FUNC(ctx, a, ##__VA_ARGS__);                    \
     }
 #define TRANS_FLAGS2(FLAGS2, NAME, FUNC, ...) \
     static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \
     {                                                          \
         REQUIRE_INSNS_FLAGS2(ctx, FLAGS2);                     \
-        return FUNC(ctx, a, __VA_ARGS__);                      \
+        return FUNC(ctx, a, ##__VA_ARGS__);                    \
     }
 
 #define TRANS64(NAME, FUNC, ...) \
     static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \
-    { REQUIRE_64BIT(ctx); return FUNC(ctx, a, __VA_ARGS__); }
+    { REQUIRE_64BIT(ctx); return FUNC(ctx, a, ##__VA_ARGS__); }
 #define TRANS64_FLAGS2(FLAGS2, NAME, FUNC, ...) \
     static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \
     {                                                          \
         REQUIRE_64BIT(ctx);                                    \
         REQUIRE_INSNS_FLAGS2(ctx, FLAGS2);                     \
-        return FUNC(ctx, a, __VA_ARGS__);                      \
+        return FUNC(ctx, a, ##__VA_ARGS__);                    \
     }
 
 /* TODO: More TRANS* helpers for extra insn_flags checks. */
-- 
2.55.0



  parent reply	other threads:[~2026-08-27 13:32 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-27 13:29 [PATCH v3 00/37] target/ppc: PPC TCG Improvements (decodetree migrations + ISA 2.07 flag updates) Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 01/37] target/ppc: Migrate extswsli to decodetree Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 02/37] target/ppc: Migrate atomic loads " Chinmay Rath
2026-08-27 14:29   ` Amit Machhiwal
2026-08-27 13:29 ` [PATCH v3 03/37] target/ppc: Convert cache instructions " Chinmay Rath
2026-08-27 14:56   ` Amit Machhiwal
2026-08-27 13:29 ` [PATCH v3 04/37] target/ppc: Move vector merge " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 05/37] target/ppc: Move vector pack " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 06/37] target/ppc: Move st{b, h, w, d, q}cx " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 07/37] target/ppc: convert slw, srw instruction via decode spec Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 08/37] target/ppc: convert sraw[i] " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 09/37] target/ppc: Convert mcrf to decode tree Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 10/37] target/ppc: Move fixed-point Shift insns to decodetree Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 11/37] target/ppc: Move fixed-point byte-reversal store " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 12/37] target/ppc: Move GPR atomic load/store instructions " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 13/37] target/ppc: Move isync instruction " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 14/37] target/ppc: Convert b{a, l, la} to decode tree Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 15/37] target/ppc: move various conditional branch insns to decodetree Chinmay Rath
2026-08-27 13:29 ` Chinmay Rath [this message]
2026-08-27 13:29 ` [PATCH v3 17/37] target/ppc: Move wait instruction " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 18/37] target/ppc: Move sleep & friends " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 19/37] target/ppc: Refactor sleep and its variants to use a common helper Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 20/37] target/ppc: Move Condition Register access instructions to decodetree Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 21/37] target/ppc: Move Condition Register logical " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 22/37] target/ppc: make do_ea_calc_ra available for 32 bit builds Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 23/37] target/ppc: Move Fixed-Point Load/Store String instructions to decodetree Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 24/37] target/ppc: Move VMX integer arithmetic and BCD " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 25/37] target/ppc: Move rlwimi, rlwinm " Chinmay Rath
2026-08-27 15:37   ` Amit Machhiwal
2026-08-27 13:29 ` [PATCH v3 26/37] target/ppc: Move lmw, stmw " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 27/37] target/ppc: Move mfmsr, mtmsr[d] " Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 28/37] target/ppc: Move byte-reverse " Chinmay Rath
2026-08-27 15:40   ` Amit Machhiwal
2026-08-27 13:29 ` [PATCH v3 29/37] target/ppc: Move system call and rfi " Chinmay Rath
2026-08-27 16:00   ` Amit Machhiwal
2026-08-28  4:30     ` Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 30/37] target/ppc: Replace PPC2_VSX207 flag with PPC2_ISA207 Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 31/37] target/ppc: Use PPC2_ISA207 instead of PPC2_BCTAR_ISA207 Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 32/37] target/ppc: Use PPC2_ISA207 instead of PPC2_LSQ_ISA207 Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 33/37] target/ppc: Use PPC2_ISA207 instead of PPC2_ALTIVEC_207 Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 34/37] target/ppc: Use PPC2_ISA207 instead of PPC2_ISA207S Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 35/37] target/ppc: Reorder PPC2 flags Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 36/37] target/ppc: Add ICBT support for ISA version 2.07 Chinmay Rath
2026-08-27 13:29 ` [PATCH v3 37/37] target/ppc: Add self as maintainer for PowerPC TCG CPUs Chinmay Rath
2026-08-27 13:37 ` [PATCH v3 00/37] target/ppc: PPC TCG Improvements (decodetree migrations + ISA 2.07 flag updates) Chinmay Rath
2026-08-28  5:23 ` Aniket Sahu

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