Re: [PATCH 3/4] hw/riscv/virt: Provide a 32-bit MMIO window for CXL host bridges

[Chen Pei <cp0613@linux.alibaba.com>]

Hi Junjie,

Thanks a lot for the careful review, and especially for taking the time
to actually run this and trace the root cause rather than just pointing
at the symptom.

You are right, and I should correct my earlier judgement: I had convinced
myself the firmware had no way to learn about the expander bus, so I went
down the simulate-in-QEMU route. The real root cause sits one level up --
riscv virt simply never advertises the expander root bus to the firmware.

Thanks for the new direction and for the groundwork you have already done
along this line. That is clearly the better approach, and it matches the
"fix UEFI to perform required initialization" option Igor raised on v2.

I will rework 3/4 following your guidance. Before respinning, I will also
do the end-to-end verification you flagged as missing -- on a booting CXL
guest -- and I will sync back with you once I have the result.

Thanks again,
Pei