[PATCH v2 04/16] KVM: x86/pmu: Gate BUFFER_OVF reserved bit on guest DS

[Zide Chen <zide.chen@intel.com>]

global_status_rsvd unconditionally clears GLOBAL_STATUS_BUFFER_OVF
(bit 62), even when the guest does not have X86_FEATURE_DS feature.
Clear it only when guest_cpu_cap_has(vcpu, X86_FEATURE_DS), matching
hardware behavior.

Fixes: f5132b01386b ("KVM: Expose a version 2 architectural PMU to a guests")
Signed-off-by: Zide Chen <zide.chen@intel.com>
---
v2: new patch.
---
 arch/x86/kvm/vmx/pmu_intel.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 11c9161dc853..9fdae437e569 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -576,8 +576,16 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
 			 ((BIT_ULL(pmu->nr_arch_fixed_counters) - 1) << KVM_FIXED_PMC_BASE_IDX));
 	pmu->global_ctrl_rsvd = counter_rsvd;
 
-	pmu->global_status_rsvd = pmu->global_ctrl_rsvd
-			& ~(GLOBAL_STATUS_BUFFER_OVF | GLOBAL_STATUS_COND_CHG);
+	/*
+	 * Layout of bits 48:0 in IA32_PERF_GLOBAL_CTRL is identical to
+	 * IA32_PERF_GLOBAL_STATUS, but IA32_PERF_GLOBAL_STATUS has additional
+	 * bits.
+	 */
+	pmu->global_status_rsvd = pmu->global_ctrl_rsvd;
+	if (guest_cpu_cap_has(vcpu, X86_FEATURE_DS))
+		pmu->global_status_rsvd &= ~GLOBAL_STATUS_BUFFER_OVF;
+	pmu->global_status_rsvd &= ~GLOBAL_STATUS_COND_CHG;
+
 	if (vmx_pt_mode_is_host_guest())
 		pmu->global_status_rsvd &= ~GLOBAL_STATUS_TRACE_TOPAPMI;
 
-- 
2.55.0